Re: [Freedreno] [PATCH v2 5/7] drm/msm/dsi: 28nm PHY: Get ref clock from the DT

Hi, On Mon, Nov 26, 2018 at 3:12 PM Matthias Kaehlcke wrote: > > Get the ref clock of the PHY from the device tree instead of > hardcoding its name and rate. > > Signed-off-by: Matthias Kaehlcke > --- > Changes in v2: > - patch added to the series > --- > drivers/gpu/drm/msm/dsi/pll/dsi_pll_28n

Re: [Freedreno] [PATCH v2 7/7] drm/msm/dsi: 10nm PHY: Get ref clock from the DT

Hi, On Mon, Nov 26, 2018 at 3:12 PM Matthias Kaehlcke wrote: > > Get the ref clock of the PHY from the device tree instead of > hardcoding its name and rate. > > Signed-off-by: Matthias Kaehlcke > --- > Changes in v2: > - remove anonymous array in clk_init_data assignment > - log error code if d

Re: [Freedreno] [PATCH v2 6/7] arm64: dts: sdm845: Set 'bi_tcxo' as ref clock of the DSI PHYs

Hi, On Mon, Nov 26, 2018 at 3:12 PM Matthias Kaehlcke wrote: > > Add 'bi_tcxo' as ref clock for the DSI PHYs, it was previously > hardcoded in the PLL 'driver' for the 10nm PHY. > > Signed-off-by: Matthias Kaehlcke > --- > based on "[v4,1/3] arm64: dts: qcom: sdm845: Add dpu to sdm845 dts file"

Re: [Freedreno] [PATCH v2 4/7] arm64: dts: qcom: msm8916: Set 'xo_board' as ref clock of the DSI PHY

Hi, On Mon, Nov 26, 2018 at 3:12 PM Matthias Kaehlcke wrote: > > Add 'xo_board' as ref clock for the DSI PHYs, it was previously > hardcoded in the PLL 'driver' for the 28nm PHY. Note: presumably your series should have one more patch to fix "arch/arm/boot/dts/qcom-apq8064.dtsi" too? > Signed-

Re: [Freedreno] [PATCH v2 3/7] drm/msm/dsi: 28nm 8960 PHY: Get ref clock from the DT

Hi, On Mon, Nov 26, 2018 at 3:12 PM Matthias Kaehlcke wrote: > @@ -409,8 +410,9 @@ static void dsi_pll_28nm_destroy(struct msm_dsi_pll *pll) > static int pll_28nm_register(struct dsi_pll_28nm *pll_28nm) > { > char *clk_name, *parent_name, *vco_name; > + const char *ref_clk_name =

Re: [Freedreno] [PATCH v2 2/7] drm/msm/dsi: 14nm PHY: Get ref clock from the DT

Hi, On Mon, Nov 26, 2018 at 3:12 PM Matthias Kaehlcke wrote: > > Get the ref clock of the PHY from the device tree instead of > hardcoding its name and rate. In the case of the 14nm PHY I think it's OK that you break compatibility with old device tree files (as this patch does) since the 14nm su

Re: [Freedreno] [PATCH v2 1/7] dt-bindings: msm/dsi: Add ref clock for PHYs

Hi, On Mon, Nov 26, 2018 at 3:12 PM Matthias Kaehlcke wrote: > > Allow the PHY drivers to get the ref clock from the DT. > > Signed-off-by: Matthias Kaehlcke > --- > Changes in v2: > - add the ref clock for all PHYs, not only the 10nm one > - updated commit message > --- > Documentation/devicet

Re: [Freedreno] [PATCH v2 1/1] drm: msm: Replace dma_map_sg with dma_sync_sg*

Hi Vivek, On Tue, Nov 27, 2018 at 6:37 AM Vivek Gautam wrote: > > dma_map_sg() expects a DMA domain. However, the drm devices > have been traditionally using unmanaged iommu domain which > is non-dma type. Using dma mapping APIs with that domain is bad. > > Replace dma_map_sg() calls with dma_syn

[Freedreno] [PATCH] drm/msm/dpu: set geometry for iommu domain

Specify geometry for DPU iommu domain which sets the address space for gem allocations. Signed-off-by: Jeykumar Sankaran Suggested-by: Jordan Crouse Suggested-by: Vivek Gautam --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/msm

[Freedreno] [PATCH v2] drm/msm/dpu: add display port support in DPU

Add display port support in DPU by creating hooks for DP encoder enumeration and encoder mode initialization. This change is based on the SDM845 Display port driver changes[1]. changes in v2: - rebase on [2] (Sean Paul) - remove unwanted error checks and switch cases (Jo

[Freedreno] [PATCH v18 4/5] dt-bindings: arm-smmu: Add bindings for qcom, smmu-v2

Add bindings doc for Qcom's smmu-v2 implementation. Signed-off-by: Vivek Gautam Reviewed-by: Tomasz Figa Tested-by: Srinivas Kandagatla Reviewed-by: Rob Herring Reviewed-by: Robin Murphy --- .../devicetree/bindings/iommu/arm,smmu.txt | 39 ++ 1 file changed, 39 in

[Freedreno] [PATCH v18 5/5] iommu/arm-smmu: Add support for qcom, smmu-v2 variant

qcom,smmu-v2 is an arm,smmu-v2 implementation with specific clock and power requirements. On msm8996, multiple cores, viz. mdss, video, etc. use this smmu. On sdm845, this smmu is used with gpu. Add bindings for the same. Signed-off-by: Vivek Gautam Reviewed-by: Rob Herring Reviewed-by: Tomasz F

[Freedreno] [PATCH v18 3/5] iommu/arm-smmu: Add the device_link between masters and smmu

From: Sricharan R Finally add the device link between the master device and smmu, so that the smmu gets runtime enabled/disabled only when the master needs it. This is done from add_device callback which gets called once when the master is added to the smmu. Signed-off-by: Sricharan R Signed-of

[Freedreno] [PATCH v18 2/5] iommu/arm-smmu: Invoke pm_runtime during probe, add/remove device

From: Sricharan R The smmu device probe/remove and add/remove master device callbacks gets called when the smmu is not linked to its master, that is without the context of the master device. So calling runtime apis in those places separately. Global locks are also initialized before enabling runt

[Freedreno] [PATCH v18 0/5] iommu/arm-smmu: Add runtime pm/sleep support

Looks like this is going to be the final respin before this support finally lands. The change isn't much from v17_resend series [1] besides taking Thor's change [2] for clocks. Changes since v17: - Addressing Will's comment to embed Thor's change [2] for pulling clocks information from device

[Freedreno] [PATCH v18 1/5] iommu/arm-smmu: Add pm_runtime/sleep ops

From: Sricharan R The smmu needs to be functional only when the respective master's using it are active. The device_link feature helps to track such functional dependencies, so that the iommu gets powered when the master device enables itself using pm_runtime. So by adapting the smmu driver for r