Switch to state based resource management. This patch
overhauls the resource manager and HW allocation methods by
maintaining the global resource pool and allocated hw
blocks in respective drm component states.
Global resource manager(RM) is tracked in private object.
Allocation strategy is switch
Subclass drm private state for DPU for handling driver
specific data. Adds atomic private object and private object
lock to dpu kms. Provides helper function to retrieve DPU
private data from current atomic state.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 66
resource pool manager utility was introduced to manage
rotator sessions. Removing the support as the rotator
feature doesn't exist.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 494 ---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 84
cleans up left out scalar config definitions from headers
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h| 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h | 10 --
2 files changed, 11 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
This patchset introduces drm private object in KMS to manage HW
resource management. It modifies the resource manager by
introducing API's to do per DRM object resource allocation/cleanups.
The patchset is based on: https://patchwork.kernel.org/patch/10461375/
Jeykumar Sankaran (4):
drm/msm/dpu
On Mon, Jun 11, 2018 at 11:26 AM Jordan Crouse wrote:
>
> Now that the IOMMU is the master of it's own power we don't need to bring
> up the GPU to do IOMMU operations. This is good because bringing up a6xx
> requires the GMU so calling pm_runtime_get_sync() too early in the process
> gets us into
Quoting spa...@codeaurora.org (2018-06-05 21:50:16)
> On 2018-06-05 20:50, Rob Herring wrote:
> > On Tue, Jun 05, 2018 at 11:10:16AM +0530, Sandeep Panda wrote:
> >> Document the bindings used for the sn65dsi86 DSI to eDP bridge.
[...]
> >> and
> >> + the second cell is used to sp
Quoting Rob Herring (2018-06-05 08:20:50)
> > +
> > +- ddc-i2c-bus: phandle of the I2C controller used for DDC EDID probing
> > +
> > +- gpio-controller: Marks the device has a GPIO controller.
> > +- #gpio-cells: Should be two. The first cell is the pin number and
> > + the s
