Re: Are there SPARC [or other] aligned memory access requirements to avoid exceptions? [now that 11.0's armv6/v7 is allowing more unaligned accesses]

ailoring possibly involved). I have > some other submittals that might face the same type of question. > > === > Mark Millard > markmi at dsl-only.net > > ___ > freebsd-spar...@freebsd.org mailing list > https://lists.freebsd.org/mailman/listinfo/freebsd-spar

Re: Are there SPARC [or other] aligned memory access requirements to avoid exceptions? [now that 11.0's armv6/v7 is allowing more unaligned accesses]

e risk that they are unimplemented in the actual hardware and trigger emulation traps. Ced On 27 May 2016 at 05:59, Mark Millard wrote: > On 2016-May-26, at 8:21 PM, Cedric Blancher wrote: > >> All pure RISC implementations enforce 'natural alignment' - a 32bit >> data t