on 25/08/2010 18:02 Andriy Gapon said the following:
> on 25/08/2010 15:23 John Baldwin said the following:
>> That is because machine checks for corrected errors have to be polled and
>> the
>> kernel polls once an hour. On newer Intel CPUs (such as Nehalem) there is a
>> separate interrupt (C
on 25/08/2010 15:23 John Baldwin said the following:
> That is because machine checks for corrected errors have to be polled and the
> kernel polls once an hour. On newer Intel CPUs (such as Nehalem) there is a
> separate interrupt (CMCI) that can fire for corrected errors.
I think that on AMD
On Wednesday, August 25, 2010 7:01:19 am Andriy Gapon wrote:
> on 25/08/2010 13:41 Dan Langille said the following:
> > On 8/25/2010 3:11 AM, Andriy Gapon wrote:
> >
> >> Have you read the decoded message?
> >> Please re-read it.
> >>
> >> I still recommend reading at least the summary of the RAM
On Tuesday, August 24, 2010 7:13:23 pm Dan Langille wrote:
> On 8/22/2010 9:18 PM, Dan Langille wrote:
> > What does this mean?
> >
> > kernel: MCA: Bank 4, Status 0x940c4001fe080813
> > kernel: MCA: Global Cap 0x0105, Status 0x
> > kernel: MCA: Vendor "AuthenticAMD", ID
On Wednesday, August 25, 2010 12:05:09 am Matthew D. Fuller wrote:
> On Tue, Aug 24, 2010 at 11:06:43AM -0400 I heard the voice of
> John Baldwin, and lo! it spake thus:
> >
> > It is actually public at perforce.freebsd.org. :) However, it is
> > tedious to download the files.
>
> Oh, I'd appare
on 25/08/2010 13:41 Dan Langille said the following:
> On 8/25/2010 3:11 AM, Andriy Gapon wrote:
>
>> Have you read the decoded message?
>> Please re-read it.
>>
>> I still recommend reading at least the summary of the RAM ECC research
>> article
>> to make your own judgment about need to replace
On 8/25/2010 3:11 AM, Andriy Gapon wrote:
Have you read the decoded message?
Please re-read it.
I still recommend reading at least the summary of the RAM ECC research article
to make your own judgment about need to replace DRAM.
Andriy: What is your interpretation of the decoded message? Wha
On Tue, Aug 24, 2010 at 4:06 PM, John Baldwin wrote:
> On Monday, August 23, 2010 5:35:40 pm Matthew D. Fuller wrote:
>> On Mon, Aug 23, 2010 at 08:20:35AM -0400 I heard the voice of
>> John Baldwin, and lo! it spake thus:
>> >
>> > It is not private, it is in //depot/projects/mcelog/... in p4.
>>
on 25/08/2010 02:38 Jeremy Chadwick said the following:
> On Tue, Aug 24, 2010 at 07:13:23PM -0400, Dan Langille wrote:
>> On 8/22/2010 9:18 PM, Dan Langille wrote:
>>> What does this mean?
>>>
>>> kernel: MCA: Bank 4, Status 0x940c4001fe080813
>>> kernel: MCA: Global Cap 0x0105, Status
On Tue, Aug 24, 2010 at 11:06:43AM -0400 I heard the voice of
John Baldwin, and lo! it spake thus:
>
> It is actually public at perforce.freebsd.org. :) However, it is
> tedious to download the files.
Oh, I'd apparently blocked out of my mind that you could clicky-clicky
files one at a time from
On 8/24/2010 7:38 PM, Jeremy Chadwick wrote:
On Tue, Aug 24, 2010 at 07:13:23PM -0400, Dan Langille wrote:
On 8/22/2010 9:18 PM, Dan Langille wrote:
What does this mean?
kernel: MCA: Bank 4, Status 0x940c4001fe080813
kernel: MCA: Global Cap 0x0105, Status 0x
kernel:
On Tue, Aug 24, 2010 at 07:13:23PM -0400, Dan Langille wrote:
> On 8/22/2010 9:18 PM, Dan Langille wrote:
> >What does this mean?
> >
> >kernel: MCA: Bank 4, Status 0x940c4001fe080813
> >kernel: MCA: Global Cap 0x0105, Status 0x
> >kernel: MCA: Vendor "AuthenticAMD", ID
On 8/22/2010 9:18 PM, Dan Langille wrote:
What does this mean?
kernel: MCA: Bank 4, Status 0x940c4001fe080813
kernel: MCA: Global Cap 0x0105, Status 0x
kernel: MCA: Vendor "AuthenticAMD", ID 0xf5a, APIC ID 0
kernel: MCA: CPU 0 COR BUSLG Source RD Memory
kernel: MCA: A
on 24/08/2010 22:51 Artem Belevich said the following:
> IMHO the key here is whether hardware is broken or not. The only case
> where correctable ECC errors are OK is when a bit gets flipped by a
> high-energy particle. That's a normal but fairly rare event. If you
> get bit flips often enough tha
IMHO the key here is whether hardware is broken or not. The only case
where correctable ECC errors are OK is when a bit gets flipped by a
high-energy particle. That's a normal but fairly rare event. If you
get bit flips often enough that you can recall details of more then
one of them on the same h
On Monday, August 23, 2010 5:35:40 pm Matthew D. Fuller wrote:
> On Mon, Aug 23, 2010 at 08:20:35AM -0400 I heard the voice of
> John Baldwin, and lo! it spake thus:
> >
> > It is not private, it is in //depot/projects/mcelog/... in p4.
>
> Which may as well be Siberia for us lowly non-developers.
on 24/08/2010 09:14 Ronald Klop said the following:
>
> A little off topic, but what is 'a low rate of corrected ECC errors'? At work
> one machine has them like ones per day, but runs ok. Is ones per day much?
That's up to your judgment. It's like after how many remapped sectors do you
replace
On Mon, 23 Aug 2010 14:20:35 +0200, John Baldwin wrote:
On Monday, August 23, 2010 2:44:38 am Andriy Gapon wrote:
on 23/08/2010 05:05 Dan Langille said the following:
> On 8/22/2010 9:18 PM, Dan Langille wrote:
>> What does this mean?
>>
>> kernel: MCA: Bank 4, Status 0x940c4001fe080813
>> ker
On 8/23/2010 7:47 PM, Andriy Gapon wrote:
on 24/08/2010 02:43 Dan Langille said the following:
On 8/22/2010 10:05 PM, Dan Langille wrote:
On 8/22/2010 9:18 PM, Dan Langille wrote:
What does this mean?
kernel: MCA: Bank 4, Status 0x940c4001fe080813
kernel: MCA: Global Cap 0x0105, S
on 24/08/2010 02:43 Dan Langille said the following:
> On 8/22/2010 10:05 PM, Dan Langille wrote:
>> On 8/22/2010 9:18 PM, Dan Langille wrote:
>>> What does this mean?
>>>
>>> kernel: MCA: Bank 4, Status 0x940c4001fe080813
>>> kernel: MCA: Global Cap 0x0105, Status 0x
>>
On 8/22/2010 10:05 PM, Dan Langille wrote:
On 8/22/2010 9:18 PM, Dan Langille wrote:
What does this mean?
kernel: MCA: Bank 4, Status 0x940c4001fe080813
kernel: MCA: Global Cap 0x0105, Status 0x
kernel: MCA: Vendor "AuthenticAMD", ID 0xf5a, APIC ID 0
kernel: MCA: CPU
On Mon, Aug 23, 2010 at 08:20:35AM -0400 I heard the voice of
John Baldwin, and lo! it spake thus:
>
> It is not private, it is in //depot/projects/mcelog/... in p4.
Which may as well be Siberia for us lowly non-developers. Any chance
you could stick a tarball or a patch against upstream mcelog
s
On Monday, August 23, 2010 2:44:38 am Andriy Gapon wrote:
> on 23/08/2010 05:05 Dan Langille said the following:
> > On 8/22/2010 9:18 PM, Dan Langille wrote:
> >> What does this mean?
> >>
> >> kernel: MCA: Bank 4, Status 0x940c4001fe080813
> >> kernel: MCA: Global Cap 0x0105, Status 0
on 23/08/2010 05:05 Dan Langille said the following:
> On 8/22/2010 9:18 PM, Dan Langille wrote:
>> What does this mean?
>>
>> kernel: MCA: Bank 4, Status 0x940c4001fe080813
>> kernel: MCA: Global Cap 0x0105, Status 0x
>> kernel: MCA: Vendor "AuthenticAMD", ID 0xf5a, API
On 8/22/2010 9:18 PM, Dan Langille wrote:
What does this mean?
kernel: MCA: Bank 4, Status 0x940c4001fe080813
kernel: MCA: Global Cap 0x0105, Status 0x
kernel: MCA: Vendor "AuthenticAMD", ID 0xf5a, APIC ID 0
kernel: MCA: CPU 0 COR BUSLG Source RD Memory
kernel: MCA: A
On 23/08/2010, at 10:48, Dan Langille wrote:
> What does this mean?
>
> kernel: MCA: Bank 4, Status 0x940c4001fe080813
> kernel: MCA: Global Cap 0x0105, Status 0x
> kernel: MCA: Vendor "AuthenticAMD", ID 0xf5a, APIC ID 0
> kernel: MCA: CPU 0 COR BUSLG Source RD Memory
26 matches
Mail list logo
