On Wed, Sep 14, 2016 at 07:08:02PM +0300, Konstantin Belousov wrote:
> On Wed, Sep 14, 2016 at 05:02:21PM +0300, Andriy Gapon wrote:
> > On 14/09/2016 15:49, Slawa Olhovchenkov wrote:
> > > MSR_APICBASE = 0xfee00d00
> > > x2APIC is prohibited but turned on by BIOS
> >
> > Kostik, ^
>
On 14/09/2016 19:08, Konstantin Belousov wrote:
> Well, the following might work, but I have no good idea what to do
> when BIOS does handoff with x2APIC enabled and directs us to not
> enable it. Switching to xAPIC mode is not an option, I suspect.
The specification describes a way to transition
On Wed, Sep 14, 2016 at 05:02:21PM +0300, Andriy Gapon wrote:
> On 14/09/2016 15:49, Slawa Olhovchenkov wrote:
> > MSR_APICBASE = 0xfee00d00
> > x2APIC is prohibited but turned on by BIOS
>
> Kostik, ^
Well, the following might work, but I have no good idea what to do
when BIOS does h
On 14/09/2016 15:49, Slawa Olhovchenkov wrote:
> MSR_APICBASE = 0xfee00d00
> x2APIC is prohibited but turned on by BIOS
Kostik, ^
P.S. the format string for the value should have been 0x%016jx.
--
Andriy Gapon
___
freebsd-stable@freebsd.or
On Wed, Sep 14, 2016 at 03:35:39PM +0300, Andriy Gapon wrote:
> On 14/09/2016 15:33, Slawa Olhovchenkov wrote:
> > On Wed, Sep 14, 2016 at 03:22:17PM +0300, Andriy Gapon wrote:
> >
> >> On 14/09/2016 14:36, Konstantin Belousov wrote:
> >>> On Tue, Sep 13, 2016 at 06:52:19PM +0300, Andriy Gapon wr
On 14/09/2016 15:33, Slawa Olhovchenkov wrote:
> On Wed, Sep 14, 2016 at 03:22:17PM +0300, Andriy Gapon wrote:
>
>> On 14/09/2016 14:36, Konstantin Belousov wrote:
>>> On Tue, Sep 13, 2016 at 06:52:19PM +0300, Andriy Gapon wrote:
On 13/09/2016 18:22, Konstantin Belousov wrote:
> Any acces
On Wed, Sep 14, 2016 at 03:22:17PM +0300, Andriy Gapon wrote:
> On 14/09/2016 14:36, Konstantin Belousov wrote:
> > On Tue, Sep 13, 2016 at 06:52:19PM +0300, Andriy Gapon wrote:
> >> On 13/09/2016 18:22, Konstantin Belousov wrote:
> >>> Any access
> >>> to the LAPIC registers page in x2APIC mode f
On 13/09/2016 17:59, Slawa Olhovchenkov wrote:
> Goggling on X2APIC_OPT_OUT take same result: other OS in this case
> downgrade to xAPIC mode.
It still does not make any sense for BIOS to turn on x2APIC and then instruct
the OS that x2APIC must not be used.
--
Andriy Gapon
__
On 14/09/2016 14:36, Konstantin Belousov wrote:
> On Tue, Sep 13, 2016 at 06:52:19PM +0300, Andriy Gapon wrote:
>> On 13/09/2016 18:22, Konstantin Belousov wrote:
>>> Any access
>>> to the LAPIC registers page in x2APIC mode faults.
>>
>> Is this a fact?
>> I read the following in the specification
On Wed, Sep 14, 2016 at 02:36:34PM +0300, Konstantin Belousov wrote:
> On Tue, Sep 13, 2016 at 06:52:19PM +0300, Andriy Gapon wrote:
> > On 13/09/2016 18:22, Konstantin Belousov wrote:
> > > Any access
> > > to the LAPIC registers page in x2APIC mode faults.
> >
> > Is this a fact?
> > I read the
On Tue, Sep 13, 2016 at 06:52:19PM +0300, Andriy Gapon wrote:
> On 13/09/2016 18:22, Konstantin Belousov wrote:
> > Any access
> > to the LAPIC registers page in x2APIC mode faults.
>
> Is this a fact?
> I read the following in the specification:
>
> In x2APIC mode, the memory mapped interface
On 13/09/2016 18:22, Konstantin Belousov wrote:
> Any access
> to the LAPIC registers page in x2APIC mode faults.
Is this a fact?
I read the following in the specification:
In x2APIC mode, the memory mapped interface is not available and any
access to the MMIO interface will behave similar to
On Tue, Sep 13, 2016 at 05:54:26PM +0300, Andriy Gapon wrote:
> On 13/09/2016 17:21, Slawa Olhovchenkov wrote:
> > boot failed:
> >
> > set hw.x2apic_enable=0
> > loading required module 'krpc'
> > /boot/kernel.VSTREAM/krpc.ko size 0x2a210 at 0x134e000
> > loading required module 'opensolaris'
> >
On Tue, Sep 13, 2016 at 05:54:26PM +0300, Andriy Gapon wrote:
> On 13/09/2016 17:21, Slawa Olhovchenkov wrote:
> > boot failed:
> >
> > set hw.x2apic_enable=0
> > loading required module 'krpc'
> > /boot/kernel.VSTREAM/krpc.ko size 0x2a210 at 0x134e000
> > loading required module 'opensolaris'
>
On 13/09/2016 17:21, Slawa Olhovchenkov wrote:
> boot failed:
>
> set hw.x2apic_enable=0
> loading required module 'krpc'
> /boot/kernel.VSTREAM/krpc.ko size 0x2a210 at 0x134e000
> loading required module 'opensolaris'
> ^@/boot/kernel.VSTREAM/opensolaris.ko size 0xadb8 at 0x1379000
> /boot/kerne
On Tue, Sep 13, 2016 at 03:57:39PM +0300, Andriy Gapon wrote:
> On 13/09/2016 15:42, Slawa Olhovchenkov wrote:
> > On Tue, Sep 13, 2016 at 03:38:17PM +0300, Andriy Gapon wrote:
> >
> >> On 13/09/2016 15:11, Slawa Olhovchenkov wrote:
> >>> On Tue, Sep 13, 2016 at 03:04:13PM +0300, Andriy Gapon wro
On 13/09/2016 15:42, Slawa Olhovchenkov wrote:
> On Tue, Sep 13, 2016 at 03:38:17PM +0300, Andriy Gapon wrote:
>
>> On 13/09/2016 15:11, Slawa Olhovchenkov wrote:
>>> On Tue, Sep 13, 2016 at 03:04:13PM +0300, Andriy Gapon wrote:
>>>
On 12/09/2016 20:53, Slawa Olhovchenkov wrote:
> boot_cp
On Tue, Sep 13, 2016 at 03:38:17PM +0300, Andriy Gapon wrote:
> On 13/09/2016 15:11, Slawa Olhovchenkov wrote:
> > On Tue, Sep 13, 2016 at 03:04:13PM +0300, Andriy Gapon wrote:
> >
> >> On 12/09/2016 20:53, Slawa Olhovchenkov wrote:
> >>> boot_cpu_id = 255
> >>
> >> I think that this points towar
On 13/09/2016 15:11, Slawa Olhovchenkov wrote:
> On Tue, Sep 13, 2016 at 03:04:13PM +0300, Andriy Gapon wrote:
>
>> On 12/09/2016 20:53, Slawa Olhovchenkov wrote:
>>> boot_cpu_id = 255
>>
>> I think that this points towards the BIOS not configuring the BSP LAPIC
>> correctly when you select that c
On Tue, Sep 13, 2016 at 03:04:13PM +0300, Andriy Gapon wrote:
> On 12/09/2016 20:53, Slawa Olhovchenkov wrote:
> > boot_cpu_id = 255
>
> I think that this points towards the BIOS not configuring the BSP LAPIC
> correctly when you select that combination of BIOS options.
> That's weird, but I fail
On 12/09/2016 20:53, Slawa Olhovchenkov wrote:
> boot_cpu_id = 255
I think that this points towards the BIOS not configuring the BSP LAPIC
correctly when you select that combination of BIOS options.
That's weird, but I fail to find any other explanation.
If wonder what would happen if you disable
On Mon, Sep 12, 2016 at 08:05:33PM +0300, Andriy Gapon wrote:
> On 12/09/2016 19:44, Slawa Olhovchenkov wrote:
> > I am not kernel developer: please point what I am need insert and file
> > for edit.
>
> In sys/amd64/amd64/mp_machdep.c (assuming you use amd64), in function
> cpu_mp_start, in this
On 12/09/2016 19:44, Slawa Olhovchenkov wrote:
> I am not kernel developer: please point what I am need insert and file
> for edit.
In sys/amd64/amd64/mp_machdep.c (assuming you use amd64), in function
cpu_mp_start, in this place
/* Set boot_cpu_id if needed. */
if (boot_cpu_id ==
On Mon, Sep 12, 2016 at 04:44:09PM +0300, Andriy Gapon wrote:
> On 12/09/2016 12:39, Slawa Olhovchenkov wrote:
> > On Sun, Sep 04, 2016 at 08:14:07PM +0300, Andriy Gapon wrote:
> >
> >> On 04/09/2016 19:29, Konstantin Belousov wrote:
> >>> This is possible, of course. But it would not affect "SM
On 12/09/2016 12:39, Slawa Olhovchenkov wrote:
> On Sun, Sep 04, 2016 at 08:14:07PM +0300, Andriy Gapon wrote:
>
>> On 04/09/2016 19:29, Konstantin Belousov wrote:
>>> This is possible, of course. But it would not affect "SMP: Added CPU ..."
>>> lines.
>>
>> Well, looking at the code it seems tha
On Sun, Sep 04, 2016 at 08:14:07PM +0300, Andriy Gapon wrote:
> On 04/09/2016 19:29, Konstantin Belousov wrote:
> > This is possible, of course. But it would not affect "SMP: Added CPU ..."
> > lines.
>
> Well, looking at the code it seems that only if mptable is used, then those
> lines are exp
On Tue, Sep 06, 2016 at 05:08:28PM +0300, Konstantin Belousov wrote:
> On Tue, Sep 06, 2016 at 04:13:05PM +0300, Slawa Olhovchenkov wrote:
> > On Sun, Sep 04, 2016 at 11:19:16AM +0300, Andriy Gapon wrote:
> >
> > > On 01/09/2016 15:13, Slawa Olhovchenkov wrote:
> > > > DMAR: Found table at 0x79b3
On Tue, Sep 06, 2016 at 04:13:05PM +0300, Slawa Olhovchenkov wrote:
> On Sun, Sep 04, 2016 at 11:19:16AM +0300, Andriy Gapon wrote:
>
> > On 01/09/2016 15:13, Slawa Olhovchenkov wrote:
> > > DMAR: Found table at 0x79b32798
> > > x2APIC available but disabled by DMAR table
> >
> > > Event timer "L
On Sun, Sep 04, 2016 at 11:19:16AM +0300, Andriy Gapon wrote:
> On 01/09/2016 15:13, Slawa Olhovchenkov wrote:
> > DMAR: Found table at 0x79b32798
> > x2APIC available but disabled by DMAR table
>
> > Event timer "LAPIC" quality 600
> > LAPIC: ipi_wait() us multiplier 1 (r 116268019 tsc 220004385
On 04/09/2016 19:29, Konstantin Belousov wrote:
> This is possible, of course. But it would not affect "SMP: Added CPU ..."
> lines.
Well, looking at the code it seems that only if mptable is used, then those
lines are expected to correctly identify a BSP. With MADT there is no
information to id
On Sun, Sep 04, 2016 at 06:49:43PM +0300, Andriy Gapon wrote:
> On 04/09/2016 18:14, Konstantin Belousov wrote:
> > On Sun, Sep 04, 2016 at 11:19:16AM +0300, Andriy Gapon wrote:
> >> Kostik, I see one strange thing which is common to both successful and
> >> unsuccessful configurations. All "SMP:
On 04/09/2016 18:14, Konstantin Belousov wrote:
> On Sun, Sep 04, 2016 at 11:19:16AM +0300, Andriy Gapon wrote:
>> Kostik, I see one strange thing which is common to both successful and
>> unsuccessful configurations. All "SMP: Added CPU..." lines have "AP" in
>> them.
>> It seems like the platfo
On Sun, Sep 04, 2016 at 11:19:16AM +0300, Andriy Gapon wrote:
> On 01/09/2016 15:13, Slawa Olhovchenkov wrote:
> > DMAR: Found table at 0x79b32798
> > x2APIC available but disabled by DMAR table
>
> > Event timer "LAPIC" quality 600
> > LAPIC: ipi_wait() us multiplier 1 (r 116268019 tsc 2200043851
On Sun, Sep 04, 2016 at 11:19:16AM +0300, Andriy Gapon wrote:
> On 01/09/2016 15:13, Slawa Olhovchenkov wrote:
> > DMAR: Found table at 0x79b32798
> > x2APIC available but disabled by DMAR table
>
> > Event timer "LAPIC" quality 600
> > LAPIC: ipi_wait() us multiplier 1 (r 116268019 tsc 220004385
On 01/09/2016 15:13, Slawa Olhovchenkov wrote:
> DMAR: Found table at 0x79b32798
> x2APIC available but disabled by DMAR table
> Event timer "LAPIC" quality 600
> LAPIC: ipi_wait() us multiplier 1 (r 116268019 tsc 2200043851)
> ACPI APIC Table:
> Package ID shift: 5
> L3 cache ID shift: 5
> L2 ca
> > > Sorry, don't cleanly understund, what combination of BIOS setting I am
> > > need to probe?
> > > And what I am need to check?
> >
> > Set 'Hyper-Threading' to Enabled.
> > Set 'X2APIC_OPT_OUT' to Enabled.
> > Try to boot.
>
> Crashed at same point.
A comment about X2APIC, on a different
On Thu, Sep 01, 2016 at 09:37:29PM +0200, sth...@nethelp.no wrote:
> > > > Sorry, don't cleanly understund, what combination of BIOS setting I am
> > > > need to probe?
> > > > And what I am need to check?
> > >
> > > Set 'Hyper-Threading' to Enabled.
> > > Set 'X2APIC_OPT_OUT' to Enabled.
> > >
On Thu, Sep 01, 2016 at 09:19:15PM +0300, Konstantin Belousov wrote:
> On Thu, Sep 01, 2016 at 09:00:14PM +0300, Slawa Olhovchenkov wrote:
> > Sorry, don't cleanly understund, what combination of BIOS setting I am need
> > to probe?
> > And what I am need to check?
>
> Set 'Hyper-Threading' to E
On Thu, Sep 01, 2016 at 09:00:14PM +0300, Slawa Olhovchenkov wrote:
> Sorry, don't cleanly understund, what combination of BIOS setting I am need
> to probe?
> And what I am need to check?
Set 'Hyper-Threading' to Enabled.
Set 'X2APIC_OPT_OUT' to Enabled.
Try to boot.
On Thu, Sep 01, 2016 at 08:50:49PM +0300, Konstantin Belousov wrote:
> On Thu, Sep 01, 2016 at 08:31:49PM +0300, Slawa Olhovchenkov wrote:
> > On Thu, Sep 01, 2016 at 08:26:32PM +0300, Konstantin Belousov wrote:
> >
> > > On Thu, Sep 01, 2016 at 03:13:00PM +0300, Slawa Olhovchenkov wrote:
> > > >
On Thu, Sep 01, 2016 at 08:31:49PM +0300, Slawa Olhovchenkov wrote:
> On Thu, Sep 01, 2016 at 08:26:32PM +0300, Konstantin Belousov wrote:
>
> > On Thu, Sep 01, 2016 at 03:13:00PM +0300, Slawa Olhovchenkov wrote:
> > > On Thu, Sep 01, 2016 at 02:45:00PM +0300, Konstantin Belousov wrote:
> > > As I
On Thu, Sep 01, 2016 at 08:26:32PM +0300, Konstantin Belousov wrote:
> On Thu, Sep 01, 2016 at 03:13:00PM +0300, Slawa Olhovchenkov wrote:
> > On Thu, Sep 01, 2016 at 02:45:00PM +0300, Konstantin Belousov wrote:
> > As I point before: 'X2APIC_OPT_OUT Flag'.
> > Hidden before 'X2APIC' set to '[Enab
On Thu, Sep 01, 2016 at 03:13:00PM +0300, Slawa Olhovchenkov wrote:
> On Thu, Sep 01, 2016 at 02:45:00PM +0300, Konstantin Belousov wrote:
> As I point before: 'X2APIC_OPT_OUT Flag'.
> Hidden before 'X2APIC' set to '[Enable]'
>
> https://s15.postimg.org/3k5l7z397/bios_x2.jpg
>
> > Show complete v
On Thu, Sep 01, 2016 at 02:45:00PM +0300, Konstantin Belousov wrote:
> On Thu, Sep 01, 2016 at 02:27:24PM +0300, Slawa Olhovchenkov wrote:
> > On Sat, Dec 12, 2015 at 03:35:13PM +0200, Konstantin Belousov wrote:
> >
> > > On Sat, Dec 12, 2015 at 04:06:15PM +0300, Slawa Olhovchenkov wrote:
> > > >
On Thu, Sep 01, 2016 at 02:27:24PM +0300, Slawa Olhovchenkov wrote:
> On Sat, Dec 12, 2015 at 03:35:13PM +0200, Konstantin Belousov wrote:
>
> > On Sat, Dec 12, 2015 at 04:06:15PM +0300, Slawa Olhovchenkov wrote:
> > > Does STABLE support X2APIC?
> > > I see X2APIC related commits in CURRENT, what
On Sat, Dec 12, 2015 at 03:35:13PM +0200, Konstantin Belousov wrote:
> On Sat, Dec 12, 2015 at 04:06:15PM +0300, Slawa Olhovchenkov wrote:
> > Does STABLE support X2APIC?
> > I see X2APIC related commits in CURRENT, what is status for STABLE?
> > I am try to enable X2APIC support on X10DRi and see
On Sat, Dec 12, 2015 at 04:06:15PM +0300, Slawa Olhovchenkov wrote:
> Does STABLE support X2APIC?
> I see X2APIC related commits in CURRENT, what is status for STABLE?
> I am try to enable X2APIC support on X10DRi and see kernel trap on
> boot.
x2APIC is only supported in HEAD. The code to parse
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