You're right. A write memory barrier is needed there.
Thanks
On Thu, Sep 22, 2011 at 12:43 AM, Arnaud Lacombe wrote:
> Hi,
>
> On Mon, Sep 19, 2011 at 8:46 AM, K. Macy wrote:
>> If the value lags next by one then it is ours. This rule applies to
>> all callers so the rule holds consistently.
>>
Hi,
On Mon, Sep 19, 2011 at 8:46 AM, K. Macy wrote:
> If the value lags next by one then it is ours. This rule applies to
> all callers so the rule holds consistently.
>
I think you do not understand what I mean, which is that the following:
while (br->br_prod_tail != prod_head)
If the value lags next by one then it is ours. This rule applies to
all callers so the rule holds consistently.
On Mon, Sep 19, 2011 at 5:53 AM, Arnaud Lacombe wrote:
> Hi,
>
> On Fri, Sep 16, 2011 at 10:41 AM, K. Macy wrote:
>> On Fri, Sep 16, 2011 at 3:02 AM, Arnaud Lacombe wrote:
>>> Hi,
>>>
Hi,
On Fri, Sep 16, 2011 at 10:41 AM, K. Macy wrote:
> On Fri, Sep 16, 2011 at 3:02 AM, Arnaud Lacombe wrote:
>> Hi,
>>
>> On Wed, Sep 14, 2011 at 10:53 PM, Arnaud Lacombe wrote:
>>> Hi Kip,
>>>
>>> I've got a few question about the buf_ring(9) API.
>>>
>>> 1) what means the 'drbr_' prefix. I c
On Fri, Sep 16, 2011 at 3:02 AM, Arnaud Lacombe wrote:
> Hi,
>
> On Wed, Sep 14, 2011 at 10:53 PM, Arnaud Lacombe wrote:
>> Hi Kip,
>>
>> I've got a few question about the buf_ring(9) API.
>>
>> 1) what means the 'drbr_' prefix. I can guess the two last letter, 'b'
>> and 'r', for Buffer Ring, bu
Hi,
On Wed, Sep 14, 2011 at 10:53 PM, Arnaud Lacombe wrote:
> Hi Kip,
>
> I've got a few question about the buf_ring(9) API.
>
> 1) what means the 'drbr_' prefix. I can guess the two last letter, 'b'
> and 'r', for Buffer Ring, but what about 'd' and 'r' ?
>
> 2) in `sys/sys/buf_ring.h', you defi
Hi,
On Thu, Sep 15, 2011 at 5:21 PM, Robert Watson wrote:
> On Thu, 15 Sep 2011, K. Macy wrote:
>
>>> Why are you making an MD guess, the amount of padding to fit the size of
>>> a cache line, in MI API ? Strangely enough, you did not make this assumption
>>> in, say r205488 (picked randomly).
>>
On Thu, 15 Sep 2011, K. Macy wrote:
Why are you making an MD guess, the amount of padding to fit the size of a
cache line, in MI API ? Strangely enough, you did not make this assumption
in, say r205488 (picked randomly).
It has been several years, and I haven't done any work in svn in over a
On Thu, Sep 15, 2011 at 4:53 AM, Arnaud Lacombe wrote:
> Hi Kip,
>
> I've got a few question about the buf_ring(9) API.
>
> 1) what means the 'drbr_' prefix. I can guess the two last letter, 'b'
> and 'r', for Buffer Ring, but what about 'd' and 'r' ?
DRiver BufRing
> 2) in `sys/sys/buf_ring.h',
Hi Kip,
I've got a few question about the buf_ring(9) API.
1) what means the 'drbr_' prefix. I can guess the two last letter, 'b'
and 'r', for Buffer Ring, but what about 'd' and 'r' ?
2) in `sys/sys/buf_ring.h', you defined 'struct buf_ring' as:
struct buf_ring {
volatile uint32_t
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