Re: ARM + CACHE_LINE_SIZE + DMA

2012-05-23 Thread Warner Losh
Hi Svatopluk, That looks very interesting. You may be interested in the efforts of various people to bring up the armv6 multi-core boards. You can checkout the source from http://svn.freebsd.org/base/projects/armv6 to see where we are in that effort. I believe that many of these issues have b

Re: ARM + CACHE_LINE_SIZE + DMA

2012-05-23 Thread Svatopluk Kraus
Hi, with respect to your replies and among other things, the following summary could be made: There are three kinds of DMA buffers according to their origin: 1. driver buffers As Alexander wrote, the buffers should be allocated by bus_dmamap_alloc(). The function should be implemented to allocat

Re: ARM + CACHE_LINE_SIZE + DMA

2012-05-23 Thread Svatopluk Kraus
On Mon, May 21, 2012 at 6:20 PM, Ian Lepore wrote: >> ... >> Some more notes. >> >> SMP makes things worse and ARM11mpcore is about SMP too. For example, >> another thread could be open about that how to flush caches (exclusive >> L1 cache) in SMP case. >> >> I'm not sure how to correctly change m

Re: ARM + CACHE_LINE_SIZE + DMA

2012-05-22 Thread Alexander Kabaev
On Tue, 22 May 2012 07:56:42 +0200 Hans Petter Selasky wrote: > On Tuesday 22 May 2012 01:35:48 Alexander Kabaev wrote: > > On Thu, 17 May 2012 11:01:34 -0500 > > > > Mark Tinguely wrote: > > > On Thu, May 17, 2012 at 8:20 AM, Svatopluk Kraus > > > > > > > > > wrote: > > > > Hi, > > > > > >

Re: ARM + CACHE_LINE_SIZE + DMA

2012-05-21 Thread Hans Petter Selasky
On Tuesday 22 May 2012 01:35:48 Alexander Kabaev wrote: > On Thu, 17 May 2012 11:01:34 -0500 > > Mark Tinguely wrote: > > On Thu, May 17, 2012 at 8:20 AM, Svatopluk Kraus > > > > wrote: > > > Hi, > > > > > > I'm working on DMA bus implementation for ARM11mpcore platform. I've > > > looked at i

Re: ARM + CACHE_LINE_SIZE + DMA

2012-05-21 Thread Alexander Kabaev
On Thu, 17 May 2012 11:01:34 -0500 Mark Tinguely wrote: > On Thu, May 17, 2012 at 8:20 AM, Svatopluk Kraus > wrote: > > Hi, > > > > I'm working on DMA bus implementation for ARM11mpcore platform. I've > > looked at implementation in ARM tree, but IMHO it only works with > > some assumptions. The

Re: ARM + CACHE_LINE_SIZE + DMA

2012-05-21 Thread Mark Tinguely
On Mon, May 21, 2012 at 11:20 AM, Ian Lepore wrote: > On Fri, 2012-05-18 at 16:13 +0200, Svatopluk Kraus wrote: >> On Thu, May 17, 2012 at 10:07 PM, Ian Lepore >> wrote: >> > On Thu, 2012-05-17 at 15:20 +0200, Svatopluk Kraus wrote: >> >> Hi, >> >> >> >> I'm working on DMA bus implementation for

Re: ARM + CACHE_LINE_SIZE + DMA

2012-05-21 Thread Daan Vreeken
Hi Ian (and list), just commenting on the mbuf part : On Monday 21 May 2012 18:20:21 Ian Lepore wrote: > On Fri, 2012-05-18 at 16:13 +0200, Svatopluk Kraus wrote: > > On Thu, May 17, 2012 at 10:07 PM, Ian Lepore > > wrote: > > > On Thu, 2012-05-17 at 15:20 +0200, Svatopluk Kraus wrote: > > >> Hi

Re: ARM + CACHE_LINE_SIZE + DMA

2012-05-21 Thread Ian Lepore
On Fri, 2012-05-18 at 16:13 +0200, Svatopluk Kraus wrote: > On Thu, May 17, 2012 at 10:07 PM, Ian Lepore > wrote: > > On Thu, 2012-05-17 at 15:20 +0200, Svatopluk Kraus wrote: > >> Hi, > >> > >> I'm working on DMA bus implementation for ARM11mpcore platform. I've > >> looked at implementation in A

Re: ARM + CACHE_LINE_SIZE + DMA

2012-05-18 Thread Svatopluk Kraus
On Thu, May 17, 2012 at 10:07 PM, Ian Lepore wrote: > On Thu, 2012-05-17 at 15:20 +0200, Svatopluk Kraus wrote: >> Hi, >> >> I'm working on DMA bus implementation for ARM11mpcore platform. I've >> looked at implementation in ARM tree, but IMHO it only works with some >> assumptions. There is a pro

Re: ARM + CACHE_LINE_SIZE + DMA

2012-05-17 Thread Ian Lepore
On Thu, 2012-05-17 at 15:20 +0200, Svatopluk Kraus wrote: > Hi, > > I'm working on DMA bus implementation for ARM11mpcore platform. I've > looked at implementation in ARM tree, but IMHO it only works with some > assumptions. There is a problem with DMA on memory block which is not > aligned on CAC

Re: ARM + CACHE_LINE_SIZE + DMA

2012-05-17 Thread Mark Tinguely
On Thu, May 17, 2012 at 8:20 AM, Svatopluk Kraus wrote: > Hi, > > I'm working on DMA bus implementation for ARM11mpcore platform. I've > looked at implementation in ARM tree, but IMHO it only works with some > assumptions. There is a problem with DMA on memory block which is not > aligned on CACHE