Aaro Koskinen writes:
> > My question is: What the heck could the SMP kernel be doing which
> > causes the DMA to "complete" faster?
>
> The chipset probably uses PCI bus (MSI-like mechanism) to deliver the
> interrupt from the IO APIC to the local APIC, which means that the PCI
> bridge(s
Hello,
> I was toying with a programmable PCI card and wrote some code
> which DMAs a small block of data to the host, and then interrupts the
> host. The host checks the end of the block, and sees if it gets the
> value it expects.
> On an SMP P4 (hyperthreaded, with ServerWorks chipset) FreeBSD
On Wed, Sep 17, 2003 at 06:12:44PM -0400, Andrew Gallatin wrote:
>My question is: What the heck could the SMP kernel be doing which
>causes the DMA to "complete" faster?
My guess is that this is a coherency issue rather than a timing issue.
The SMP kernels are far more careful about ensuring co
I was toying with a programmable PCI card and wrote some code
which DMAs a small block of data to the host, and then interrupts the
host. The host checks the end of the block, and sees if it gets the
value it expects.
On an SMP P4 (hyperthreaded, with ServerWorks chipset) FreeBSD 4.8 UP,
and
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