Intel SE7500CW2

2002-08-30 Thread jrf4772
Has anyone got this to work yet? Is it something that will get fixed with fbsd, or will it tack a bios upgrade from intel? I was wondering if there is a way to just hardcode this value for the time being, I know that my box has two Intel SE7500CW2 CPUs in it. Could this whole problem be

Re: SMP on Intel SE7500CW2

2002-08-27 Thread Craig Hawco
02:54 PM 27/08/2002 -0700, you wrote: >On Tue, 27 Aug 2002, Craig Hawco wrote: > > > I've been looking into PR i386/40564 as I'm the owner of an Intel > > SE7500CW2. I managed to track it down to start_ap in mp_machdep.c. > >Can you grab an mptable(8) output for t

Re: SMP on Intel SE7500CW2

2002-08-27 Thread Doug White
On Tue, 27 Aug 2002, Craig Hawco wrote: > I've been looking into PR i386/40564 as I'm the owner of an Intel > SE7500CW2. I managed to track it down to start_ap in mp_machdep.c. Can you grab an mptable(8) output for this board? I wasn't aware that these were broken, I&#x

Re: SMP on Intel SE7500CW2

2002-08-27 Thread Terry Lambert
Craig Hawco wrote: > I've been looking into PR i386/40564 as I'm the owner of an Intel > SE7500CW2. I managed to track it down to start_ap in mp_machdep.c. > > snippet from start_ap(): > > while (read_apic_timer()) >

SMP on Intel SE7500CW2

2002-08-27 Thread Craig Hawco
Hello, I've been looking into PR i386/40564 as I'm the owner of an Intel SE7500CW2. I managed to track it down to start_ap in mp_machdep.c. snippet from start_ap(): while (read_apic_timer()) if (mp_ncpus > cpus) return 1;