Hi there,
On Wed, Sep 01, 2004 at 08:25:20AM -0500, Bagus wrote:
>
> Hi, is anyone able to help me problem solve on this? Is this the right
> forum for this kind of question? If not, could someone please send me a
> pointer to an organization that might be able to help. I have a small budget
> t
Hi,
On Mon, Feb 23, 2004 at 10:46:07AM -0600, D J Hawkey Jr wrote:
> On Feb 23, at 09:12 AM, M. Warner Losh wrote:
> >
> > In message: <[EMAIL PROTECTED]>
> > D J Hawkey Jr <[EMAIL PROTECTED]> writes:
> > : True or False: Setting CPUTYPE to the lowest target CPU ("p2") in
> > : a buil
Hi there,
Note this only applies to -STABLE as the error handling & status prints
have changed quite a bit when looking at -HEAD.
Currently I got this:
ad2s1e: hard error reading fsbn 32383 of 16160-16415 (ad2s1 bn 32383; cn 4 tn 34 sn 1)
ad2: success setting PIO4 on generic chip
trying PIO mod
Hi,
>> I think I could configure the card to use the range 0xd -
0xd3fff
>> for the SRAM and then 0xd4000 - 0xd5fff for the MMIO, thus having
a
>> continuous block between 0xd and 0xd5fff that I might be able
to
>> allocate in one hit. This however seems t
will give back an IRQ value of 11, which
causes problems later as the card is using 9. I can read the IRQ value
that the card is set to, but I'm not sure on the correct procedure to
request that specific IRQ for my driver?
Any suggestions would be most welcome.
Regards,
Tony Frank
To Un
5 matches
Mail list logo