On 10/13/12 03:26, Robert Watson wrote:
On Fri, 12 Oct 2012, Carl Delsey wrote:
Indeed -- and on non-x86, where there are uncached direct map
segments, and TLB entries that disable caching, reading 2x 32-bit vs
1x 64-bit have quite different effects in terms of atomicity. Where
uncached I
On 10/12/2012 9:04 AM, Robert Watson wrote:
On Fri, 12 Oct 2012, John Baldwin wrote:
I believe it was because bus reads weren't guaranteed to be atomic
on i386. don't know if that's still the case or a concern, but it
was an intentional omission.
True. If you are on a 32-bit system you can r
Sorry for the slow response. I was dealing with a bit of a family
emergency. Responses inline below.
On 10/09/12 08:54, John Baldwin wrote:
On Monday, October 08, 2012 4:59:24 pm Warner Losh wrote:
On Oct 5, 2012, at 10:08 AM, John Baldwin wrote:
I think cxgb* already have an implementation
I noticed that the bus_space_*_8 functions are unimplemented for x86.
Looking at the code, it seems this is intentional.
Is this done because on 32-bit systems we don't know, in the general
case, whether to read the upper or lower 32-bits first?
If that's the reason, I was thinking we could p
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