Call for bi-monthly status reports

2003-09-24 Thread Scott Long
All, After a long hiatus, Robert Watson and I would like to start up the bi-monthly status reports again. As before, the template is at http://www.freebsd.org/news/status/report-sample.xml, with submissions going to [EMAIL PROTECTED] While this report is primarily for projects that are in-progre

Re: Any workarounds for Verisign .com/.net highjacking?

2003-09-24 Thread Clifton Royston
On Fri, Sep 19, 2003 at 12:09:22PM +0200, Roman Neuhauser wrote: > # [EMAIL PROTECTED] / 2003-09-16 16:58:06 -0400: > > At 10:23 AM -1000 9/16/03, Clifton Royston wrote: > > > In the meantime I'm trying to figure out if there's some > > >simple hack to disregard these wildcard A records, short of

Re: SimpleTech USB HDD driver

2003-09-24 Thread Scott Mitchell
On Tue, Sep 23, 2003 at 08:33:15AM +0200, Devon H. O'Dell wrote: > Scott Mitchell wrote: > > >This is fine - just an informational message rather than anything > >actually wrong. > > > > > Out of curiosity, what does that indicate (or where can I find comments > in the source)? As I understand i

RE: PCI bridges & interrupts

2003-09-24 Thread Steve Watt
On Sep 24, 18:17, John Baldwin wrote: } Subject: RE: PCI bridges & interrupts } } On 24-Sep-2003 Steve Watt wrote: } > On Sep 24, 16:38, John Baldwin wrote: } > } Subject: RE: PCI bridges & interrupts } > } > And if I were clever, I would've mentioned that it's in the } > same slot. And the IRQ

VIA EPIA-M10000 board "just works" with FreeBSD 4.8

2003-09-24 Thread Clifton Royston
For anyone who's interested, I've been running FreeBSD 4.8 on the EPIA-1M mini-ITX for at least a couple months now; it's available for as little as $160 with CPU + motherboard + case + p/s bought integrated as the FIC Falcon CR53, and there's a surprising amount of I/O integrated onboard. F

Re: PCI bridges & interrupts

2003-09-24 Thread John Baldwin
On 24-Sep-2003 M. Warner Losh wrote: > You might want to make sure that you have an up to date stable. There > was a fix to the PCI bridge interrupt swizzle. Ah yes, that's true. However, it doesn't seem that his interrupt is being routed, but I could be wrong. Also, there is another bug in th

RE: PCI bridges & interrupts

2003-09-24 Thread John Baldwin
On 24-Sep-2003 Steve Watt wrote: > On Sep 24, 16:38, John Baldwin wrote: > } Subject: RE: PCI bridges & interrupts > > And if I were clever, I would've mentioned that it's in the > same slot. And the IRQ that gets assigned (by reading the > dmesg, as well as reading out the register from config

Re: BUS DMA sync

2003-09-24 Thread Vincent Jardin
Thanks, What's about PREREAD ? What kind of CPU synchronization is required prior a DMA read ? There is no cache during a device to host memory process, isn't it ? Vincent Le Mercredi 24 Septembre 2003 23:54, Maxime Henrion a écrit : > Vincent Jardin wrote: > > Hi, > > > > I try to understan

RE: PCI bridges & interrupts

2003-09-24 Thread Steve Watt
On Sep 24, 16:38, John Baldwin wrote: } Subject: RE: PCI bridges & interrupts } } On 24-Sep-2003 Steve Watt wrote: } > [ Too advanced for -questions? Trying again. ] } > } > I'm having a strange problem with interrupts, PCI bridges, and } > FreeBSD 4-STABLE (cvsupped from a few months ago). } >

Re: BUS DMA sync

2003-09-24 Thread Maxime Henrion
Vincent Jardin wrote: > Hi, > > I try to understand the purpose of the PRE sync (BUS_DMASYNC_PREREAD, > BUS_DMASYNC_PREWRITE). > > I understand POST synchronization (BUS_DMASYNC_POSTREAD, > BUS_DMASYNC_POSTWRITE) when a device to memory or a memory to device > transfert needs to be synchroniz

Re: PCI bridges & interrupts

2003-09-24 Thread M. Warner Losh
You might want to make sure that you have an up to date stable. There was a fix to the PCI bridge interrupt swizzle. Warner ___ [EMAIL PROTECTED] mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-hackers To unsubscribe, send any mail to "[

BUS DMA sync

2003-09-24 Thread Vincent Jardin
Hi, I try to understand the purpose of the PRE sync (BUS_DMASYNC_PREREAD, BUS_DMASYNC_PREWRITE). I understand POST synchronization (BUS_DMASYNC_POSTREAD, BUS_DMASYNC_POSTWRITE) when a device to memory or a memory to device transfert needs to be synchronized. However, what does a synchronizati

Re: PCI bridges & interrupts

2003-09-24 Thread Aaro Koskinen
On Wed, 24 Sep 2003, Steve Watt wrote: > Buddy, can you spare a clue? Why isn't the ISR running? Check the PCI interrupt routing. A. -- Aaro Koskinen E-mail: [EMAIL PROTECTED]"I'm the ocean, I'm the giant undertow." http://www.iki.fi/aaro ___

RE: PCI bridges & interrupts

2003-09-24 Thread John Baldwin
On 24-Sep-2003 Steve Watt wrote: > [ Too advanced for -questions? Trying again. ] > > I'm having a strange problem with interrupts, PCI bridges, and > FreeBSD 4-STABLE (cvsupped from a few months ago). > > The motherboard is a Supermicro X5DL8-GG, dual-Xeon capable (only one is > populated). T

PCI bridges & interrupts

2003-09-24 Thread Steve Watt
[ Too advanced for -questions? Trying again. ] I'm having a strange problem with interrupts, PCI bridges, and FreeBSD 4-STABLE (cvsupped from a few months ago). The motherboard is a Supermicro X5DL8-GG, dual-Xeon capable (only one is populated). The BIOS is AMIBIOS 7.00.00. The BIOS settings h

Re: USB card overcurrent problems...

2003-09-24 Thread Bernd Walter
On Wed, Sep 24, 2003 at 06:32:42PM +0200, Barry Bouwsma wrote: > [Drop hostname part of IPv6-only address above to obtain IPv4-capable e-mail, > or just drop me from the recipients and I'll catch up from the archives] > > > Hello every last one of you, > > First, before I spout off in the wrong

Re: mbuf doubts

2003-09-24 Thread Giovanni P. Tirloni
* Jerry Toung ([EMAIL PROTECTED]) wrote: > Giovani, > > you will find the answer to your question in "tcp/ip illustrated, volume 2: > the implementation" in chapter 2. > > But to briefly answer your question, yes, there are 4 different types of > mbufs, depending on the m_flags value. > 1) m_fl

Re: Any workarounds for Verisign .com/.net highjacking?

2003-09-24 Thread Barry Bouwsma
[obligatory From: address is IPv6-only; to obtain IPv4-mailable address, remove hostname part. Even then no guarantee mail won't bounce -- I follow the list archives in my copious offline time] > > > In the meantime I'm trying to figure out if there's some > > >simple hack to disregard these

Re: Machine wedges solid after one serial-port source-lineaddition...

2003-09-24 Thread Barry Bouwsma
[Drop hostname part of IPv6-only address above to obtain IPv4-capable e-mail, or just drop me from the recipients and I'll catch up from the archives] Terry Lambert writes: > I remember wakeup() being bad. Taking any time to do anything > at all more than just queueing data and going away is p

Kernel module problems/questions

2003-09-24 Thread Barry Bouwsma
[You know the drill: drop my hostname from the above IPv6-only address to get an IPv4-capable address; drop me entirely to avoid bounces and I'll catch the archives before your mail might reach me if it doesn't bounce] Some stupid kernel module questions. Kernel source from a few days ago, REL

USB card overcurrent problems...

2003-09-24 Thread Barry Bouwsma
[Drop hostname part of IPv6-only address above to obtain IPv4-capable e-mail, or just drop me from the recipients and I'll catch up from the archives] Hello every last one of you, First, before I spout off in the wrong forum, is there a better or preferred location for USB-hardware-related ques

Re: mbuf doubts

2003-09-24 Thread Jerry Toung
Giovani, you will find the answer to your question in "tcp/ip illustrated, volume 2: the implementation" in chapter 2. But to briefly answer your question, yes, there are 4 different types of mbufs, depending on the m_flags value. 1) m_flags = 0 and mbuf contains only data up to 108 bytes. 2) m