Title: EMPRESAS - Base de datos de las 500Empresas más grandes, (por ventas),
del país con los siguientes campos: razón social, sigla
EMPRESAS - Base de datos con las
1.000 Empresas más grandes de Colombia (ventas superiores a $20.000 millones
anuales), con los siguientes campos: razón soc
In message <[EMAIL PROTECTED]> lists writes:
: I tried your suggestion below, and for some reason its still assigning the
: same interrupt (whichever one I pick) to both the network card and the
: wavelan card, and interstingly enough even if I remove one of them, its
: still trying to get a route
Hi Mike,
I tried your suggestion below, and for some reason its still assigning the
same interrupt (whichever one I pick) to both the network card and the
wavelan card, and interstingly enough even if I remove one of them, its
still trying to get a routeable interrupt and the wavelan still doesnt
Sorry if this is a duplicate
Hello,
Does anyone have any patches for preliminary support of the Linksys
WDT11/WPC11 wireless ethernet combo? The WDT card uses the PLX PCI9052
chipset and shows up under -STABLE's dmesg as:
pci0: (vendor=0x16ab, dev=0x1102) at 19.0 irq 12
With what I ha
On Sun, Aug 05, 2001 at 10:33:08PM +0100, Nik Clayton wrote:
> On Sun, Aug 05, 2001 at 12:20:36PM -0700, Matt Dillon wrote:
> > It's a good description but it might be better to simplify it a bit.
> > You don't need to go into that level of detail. There is a short
> > page coloring e
Matt Dillon wrote:
>
> Well, first of all the page coloring is not pointless with the
> sizes hardwired. The cache characteristics do not have to
> match exactly for page coloring to work. The effectiveness is
> like a log-graph, and you don't lose a lot by guessing wrong.
>
> Yes, I understand that. I'm just trying to find out why Mike keeps
> saying we cannot determine the processor cache characteristics at
> runtime.
Because I believed we couldn't. It appears I'm wrong. 8)
The only question left really then is whether it's worth actually trying
to tune for cac
On Sun, Aug 05, 2001 at 12:20:36PM -0700, Matt Dillon wrote:
> It's a good description but it might be better to simplify it a bit.
> You don't need to go into that level of detail. There is a short
> page coloring explanation at the end of my VM article which might
> be more suit
:I should have guessed the reason. Matthew Dillon answered this question on
:Fri, 2 Jun 2000 as follows:
:
:
:The VM routines that manage pages associated with objects are not
:protected against interrupts, so interrupts aren't allowed to change
:page-object associations. Otherwi
In article <[EMAIL PROTECTED]>,
Matt Dillon <[EMAIL PROTECTED]> wrote:
> :Yes, I understand that. I'm just trying to find out why Mike keeps
> :saying we cannot determine the processor cache characteristics at
> :runtime.
> :
> :John
>
> You can find out from the cpuid or something like tha
:> Since most L1 caches these days are at least 16K and most L2 caches
:> these days are at least 64K (and often much higher, such as on the IA32),
:> our hardwired page coloring constants wind up being about 95% effective
:> across the entire range of chips our OS currently runs
:
:If I added this to a man page would I be telling the truth :).
:
:Note, these are my notes and not the exact text that I would
:add, and I have not bother with anything to do with object
:coloring etc. I just want to make sure I've got this part
:down.
:
:Chad
It's a good description but
In article <[EMAIL PROTECTED]>,
Matt Dillon <[EMAIL PROTECTED]> wrote:
> :In article <[EMAIL PROTECTED]>,
> :Mike Smith <[EMAIL PROTECTED]> wrote:
> :>
> :> It looks about right, but page colouring is pointless unless and until we
> :> can determine the processor cache characteristics at runti
:In article <[EMAIL PROTECTED]>,
:Mike Smith <[EMAIL PROTECTED]> wrote:
:>
:> It looks about right, but page colouring is pointless unless and until we
:> can determine the processor cache characteristics at runtime.
:>
:> Which we can't.
:
:Why can't we do this at least on the i386 with the
In article <[EMAIL PROTECTED]>,
Mike Smith <[EMAIL PROTECTED]> wrote:
>
> It looks about right, but page colouring is pointless unless and until we
> can determine the processor cache characteristics at runtime.
>
> Which we can't.
Why can't we do this at least on the i386 with the CPUID inst
> Hi Mike, ok my pci->pcmcia bridge is in slot 0, my network card is in slot
> 3, below are the dmesg outputs from both oldcard and newcard,
Ok; this is different from the "linked" dmesg you were showing before,
and what it's highlighting is the weakness in the algorithm that we use
for picking
> hi, there!
>
> On Sat, 4 Aug 2001, Richard Seaman, Jr. wrote:
>
>> There are some gethostby_r, getnetby_r, ... etc routines in the
>> linuxthreads port (/usr/ports/devel/linuxthreads/files). These
>> came from the original linuxthreads package, and have no copyright
>> on them. I never resea
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