Re: [PATCH] PCI bus number management

2014-02-11 Thread Michael Butler
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 02/06/14 14:37, John Baldwin wrote: > I would like to commit this to HEAD soon but thought I would post it for some > pre-commit testing for the brave. :) If you are really brave, try booting > with 'hw.pci.clear_buses=1' which will force the ker

Re: [PATCH] PCI bus number management

2014-02-07 Thread Ranjan1018 .
Works fine setting all 3 on a Samsung ATIV BOOK 2 model NP270E5E-K02IT on FreeBSD 11.0-CURRENT amd64 r261561 with NEWCONS. Maurizio ___ freebsd-current@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-current To unsubscribe, sen

Re: [PATCH] PCI bus number management

2014-02-07 Thread John Baldwin
On Thursday, February 06, 2014 8:58:42 pm David Shane Holden wrote: > On 02/06/14 14:37, John Baldwin wrote: > > I have a patch to teach the PCI bus code and PCI-PCI bridge driver to > > manage PCI bus numbers. The approach is somewhat similar to how > > NEW_PCIB manages I/O windows for briges. E

Re: [PATCH] PCI bus number management

2014-02-07 Thread John Baldwin
On Friday, February 07, 2014 7:43:51 am Julian Stecklina wrote: > On 02/06/2014 08:37 PM, John Baldwin wrote: > > I would like to commit this to HEAD soon but thought I would post it for > > some > > pre-commit testing for the brave. :) If you are really brave, try booting > > with 'hw.pci.clea

Re: [PATCH] PCI bus number management

2014-02-07 Thread Julian Stecklina
On 02/06/2014 08:37 PM, John Baldwin wrote: > I would like to commit this to HEAD soon but thought I would post it for some > pre-commit testing for the brave. :) If you are really brave, try booting > with 'hw.pci.clear_buses=1' which will force the kernel to renumber all buses > in the system

Re: [PATCH] PCI bus number management

2014-02-06 Thread David Shane Holden
On 02/06/14 14:37, John Baldwin wrote: I have a patch to teach the PCI bus code and PCI-PCI bridge driver to manage PCI bus numbers. The approach is somewhat similar to how NEW_PCIB manages I/O windows for briges. Each bridge creates an rman to manage the bus numbers for all buses and bridges t

Re: [PATCH] PCI bus number management

2014-02-06 Thread John Baldwin
On Thursday, February 06, 2014 2:47:09 pm Thomas Hoffmann wrote: > On Thu, Feb 6, 2014 at 2:37 PM, John Baldwin wrote: > > > I have a patch to teach the PCI bus code and PCI-PCI bridge driver to > > manage > > PCI bus numbers. The approach is somewhat similar to how NEW_PCIB manages > > I/O > >

Re: [PATCH] PCI bus number management

2014-02-06 Thread Thomas Hoffmann
On Thu, Feb 6, 2014 at 2:47 PM, Thomas Hoffmann wrote: > On Thu, Feb 6, 2014 at 2:37 PM, John Baldwin wrote: > >> I have a patch to teach the PCI bus code and PCI-PCI bridge driver to >> manage >> PCI bus numbers. The approach is somewhat similar to how NEW_PCIB >> manages I/O >> windows for br

Re: [PATCH] PCI bus number management

2014-02-06 Thread Thomas Hoffmann
On Thu, Feb 6, 2014 at 2:37 PM, John Baldwin wrote: > I have a patch to teach the PCI bus code and PCI-PCI bridge driver to > manage > PCI bus numbers. The approach is somewhat similar to how NEW_PCIB manages > I/O > windows for briges. Each bridge creates an rman to manage the bus numbers > fo

[PATCH] PCI bus number management

2014-02-06 Thread John Baldwin
I have a patch to teach the PCI bus code and PCI-PCI bridge driver to manage PCI bus numbers. The approach is somewhat similar to how NEW_PCIB manages I/O windows for briges. Each bridge creates an rman to manage the bus numbers for all buses and bridges that live below it. Each bus allocates