Le 5 sept. 2012 à 20:12, Peter Grehan a écrit :
> Another system:
>
> CPU: Intel(R) Core(TM) i7-3770 CPU @ 3.40GHz (3392.36-MHz K8-class CPU)
> Origin = "GenuineIntel" Id = 0x306a9 Family = 6 Model = 3a Stepping = 9
> Features=0xbfebfbff
> Features2=0x7fbae3ff
> AMD Features=0x28100800
> A
Another system:
CPU: Intel(R) Core(TM) i7-3770 CPU @ 3.40GHz (3392.36-MHz K8-class CPU)
Origin = "GenuineIntel" Id = 0x306a9 Family = 6 Model = 3a
Stepping = 9
Features=0xbfebfbff
Features2=0x7fbae3ff
AMD Features=0x28100800
AMD Features2=0x1
TSC: P-state invariant, performance sta
On Wed, Sep 05, 2012 at 09:33:55AM +0200, Fabien Thomas wrote:
> >
> > Hi,
> >
> > here are the results
> >
> > # pmccontrol -L
> > SOFT
> >CLOCK.STAT
> >CLOCK.HARD
> >LOCK.FAILED
> >PAGE_FAULT.WRITE
> >PAGE_FAULT.READ
> >PAGE_FAULT.ALL
> >
> Seem
>
> Hi,
>
> here are the results
>
> # pmccontrol -L
> SOFT
>CLOCK.STAT
>CLOCK.HARD
>LOCK.FAILED
>PAGE_FAULT.WRITE
>PAGE_FAULT.READ
>PAGE_FAULT.ALL
>
Seems that the CPU was not detected can you dump the dmesg with CPU: section ?
As Davide ask, if
On Tue, Sep 04, 2012 at 10:02:06PM +0200, Davide Italiano wrote:
> [trimming old mails]
>
> >
> > Hi,
> >
> > here are the results
> >
> > # pmccontrol -L
> > SOFT
> > CLOCK.STAT
> > CLOCK.HARD
> > LOCK.FAILED
> > PAGE_FAULT.WRITE
> > PAGE_FAULT.READ
> >
[trimming old mails]
>
> Hi,
>
> here are the results
>
> # pmccontrol -L
> SOFT
> CLOCK.STAT
> CLOCK.HARD
> LOCK.FAILED
> PAGE_FAULT.WRITE
> PAGE_FAULT.READ
> PAGE_FAULT.ALL
>
> # pmcstat -SOFF_CORE_RESPONSE_0,rsp=REQ_DMND_DATA_RD+RES_ANY -w1 -T
> p
On Tue, Sep 04, 2012 at 09:35:07AM +0200, Fabien Thomas wrote:
>
> Le 3 sept. 2012 à 23:23, Baptiste Daroussin a écrit :
>
> > On Mon, Sep 03, 2012 at 02:04:21PM +0200, Fabien Thomas wrote:
> >>Hi,
> >>
> >> Find a patch that add Intel Ivy Bridge support to hwpmc(9).
> >> The patch also sup
On Tue, Sep 4, 2012 at 9:35 AM, Fabien Thomas wrote:
>
> Le 3 sept. 2012 à 23:23, Baptiste Daroussin a écrit :
>
>> On Mon, Sep 03, 2012 at 02:04:21PM +0200, Fabien Thomas wrote:
>>> Hi,
>>>
>>> Find a patch that add Intel Ivy Bridge support to hwpmc(9).
>>> The patch also support offcore RS
Le 3 sept. 2012 à 23:23, Baptiste Daroussin a écrit :
> On Mon, Sep 03, 2012 at 02:04:21PM +0200, Fabien Thomas wrote:
>> Hi,
>>
>> Find a patch that add Intel Ivy Bridge support to hwpmc(9).
>> The patch also support offcore RSP token for Sandy Bridge.
>> Note: No uncore support.
>>
>> T
On Mon, Sep 03, 2012 at 02:04:21PM +0200, Fabien Thomas wrote:
> Hi,
>
> Find a patch that add Intel Ivy Bridge support to hwpmc(9).
> The patch also support offcore RSP token for Sandy Bridge.
> Note: No uncore support.
>
> Tested on:
> Intel(R) Xeon(R) CPU E3-1265L V2 @ 2.50GHz (2494.35-
Hi,
Find a patch that add Intel Ivy Bridge support to hwpmc(9).
The patch also support offcore RSP token for Sandy Bridge.
Note: No uncore support.
Tested on:
Intel(R) Xeon(R) CPU E3-1265L V2 @ 2.50GHz (2494.35-MHz K8-class CPU)
Origin = "GenuineIntel" Id = 0x306a9 Family = 6 Model =
11 matches
Mail list logo