Jonas Maebe via fpc-pascal wrote:
See e.g. the explanation of "data dependency barrier" at
https://www.sobyte.net/post/2022-08/cpu-cache-and-memory-barriers/ . In
Interesting stuff to read.
Regards,
Adriaan van Os
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Jonas Maebe via fpc-pascal schrieb am
Mo., 14. Aug. 2023, 21:02:
> On 14/08/2023 18:19, denisgolovan via fpc-pascal wrote:
> > Now we have "volatile" intrinsic for assignments in place, I'd like to
> ask for another clarification.
>
> Just to make sure given your questions below: using volatile i
On 14/08/2023 21:55, denisgolovan via fpc-pascal wrote:
On 14/08/2023 18:19, denisgolovan via fpc-pascal wrote:
ReadDependencyBarrier - which one is that?
You cannot express a ReadDependencyBarrier in terms of acquire/release.
See e.g. the explanation of "data dependency barrier" at
https:/
> On 14/08/2023 18:19, denisgolovan via fpc-pascal wrote:
>
>> Now we have "volatile" intrinsic for assignments in place, I'd like to ask
>> for another clarification.
>
> Just to make sure given your questions below: using volatile in the
> context of multithreaded code is completely wrong i
On 14/08/2023 18:19, denisgolovan via fpc-pascal wrote:
Now we have "volatile" intrinsic for assignments in place, I'd like to ask for
another clarification.
Just to make sure given your questions below: using volatile in the
context of multithreaded code is completely wrong in 99.9% of the c
Hi all
Now we have "volatile" intrinsic for assignments in place, I'd like to ask for
another clarification.
Documentation states we have following barriers - ReadBarrier, WriteBarrier,
ReadDependencyBarrier, ReadWriteBarrier.
I'd like to get an idea how those related to more common / standard
