Hello everyone,
I would like to get in touch with people interested on reviewing
freepascal code for the torokernel. I have been working on this project
since 2006. However, my contributions were mostly only reviewed by me. I
think this has to change. I think the quality of the code would be
impr
On Wed, Mar 29, 2023 at 11:07:18PM +0200, Jonas Maebe via fpc-pascal wrote:
> On 29/03/2023 16:00, Matias Ezequiel Vara Larsen via fpc-pascal wrote:
> > So if I have a type like:
> >
> > test = record
> >r: DWord;
> >s: Word;
> > end;
> >
On Wed, Mar 29, 2023 at 08:11:40PM +0700, Hairy Pixels via fpc-pascal wrote:
>
>
> > On Mar 29, 2023, at 1:33 PM, Sven Barth via fpc-pascal
> > wrote:
> >
> > No, array types are defined as never having padding between the elements.
> > You need to make sure that the element is appropriately
On Wed, Mar 29, 2023 at 08:33:58AM +0200, Sven Barth via fpc-pascal wrote:
> Matias Ezequiel Vara Larsen via fpc-pascal
> schrieb am Mi., 29. März 2023, 00:27:
>
> > Hello,
> >
> > On Mon, Mar 27, 2023 at 09:35:38PM +0200, Jonas Maebe via fpc-pascal wrote:
> > &g
On Mon, Mar 27, 2023 at 08:52:40PM +0200, Jonas Maebe via fpc-pascal wrote:
> On 27/03/2023 09:28, Matias Ezequiel Vara Larsen via fpc-pascal wrote:
> > Apologies in the case this subject has been already discussed. I require
> > that some global variables be cache-line ali
On Wed, Mar 29, 2023 at 08:33:58AM +0200, Sven Barth via fpc-pascal wrote:
> Matias Ezequiel Vara Larsen via fpc-pascal
> schrieb am Mi., 29. März 2023, 00:27:
>
> > Hello,
> >
> > On Mon, Mar 27, 2023 at 09:35:38PM +0200, Jonas Maebe via fpc-pascal wrote:
> > &g
Hello,
On Mon, Mar 27, 2023 at 09:35:38PM +0200, Jonas Maebe via fpc-pascal wrote:
> On 27/03/2023 21:25, denisgolovan via fpc-pascal wrote:
>
> > But it's still not possible to attach alignment to type itself instead of
> > variable, right?
>
> It is possible
> (https://gitlab.com/freepascal.
Hello everyone,
Apologies in the case this subject has been already discussed. I require
that some global variables be cache-line aligned. This is a requirement
for per-CPU variables that are statically defined to prevent cache
ping-pong. Is there any way to do this at fpc when the record is
decl
