Currently, there's an optimisation that tries to relocate MOV
instructions so they appear before CMP and TEST instructions (you can
see it occurring in the code sample). This is usually generated by the
"J(c)Mov0JmpMov1 -> Set(c)" optimisation if the destination is not an
8-bit register, in wh
Keep in mind that usually test/cmp and jcc instructions are macrofused
but only if they are directly adjacent.
Am 01.10.2021 um 18:10 schrieb J. Gareth Moreton via fpc-devel:
Hi everyone,
I've started playing around with an optimisation on x86 platforms that
looks for common instructions that
