> Am 30.12.2021 um 21:07 schrieb Jonas Maebe via fpc-devel
> :
>
> On 30/12/2021 21:03, Florian Klämpfl via fpc-devel wrote:
>>> Am 30.12.2021 um 20:57 schrieb Jonas Maebe via fpc-devel
>>> :
>>>
>>> On 30/12/2021 20:55, Martin Frb via fpc-devel wrote:
On 30/12/2021 20:46, Jonas Maebe vi
On 30/12/2021 21:28, Martin Frb via fpc-devel wrote:
Well the issue is, that at some time it needs to be extended, as the
full expression is
Result := Result + (pn8^ shr 7) and ((not pn8^) shr 6);
Result is either 64 or 32 depending on architecture.
pn8 is pint8
On intel
- only the byte is
On 30/12/2021 21:07, Jonas Maebe via fpc-devel wrote:
On 30/12/2021 21:03, Florian Klämpfl via fpc-devel wrote:
Yes, but the question is: if we load a shortint into a register, do
we need to sign extend it to 32/64 bit or not? I tend more and more
to say that we shouldn’t require this.
Neit
On 30/12/2021 21:07, Jonas Maebe via fpc-devel wrote:
On 30/12/2021 21:03, Florian Klämpfl via fpc-devel wrote:
Yes, but the question is: if we load a shortint into a register, do we
need to sign extend it to 32/64 bit or not? I tend more and more to
say that we shouldn’t require this.
Neithe
On 30/12/2021 21:03, Florian Klämpfl via fpc-devel wrote:
Am 30.12.2021 um 20:57 schrieb Jonas Maebe via fpc-devel
:
On 30/12/2021 20:55, Martin Frb via fpc-devel wrote:
On 30/12/2021 20:46, Jonas Maebe via fpc-devel wrote:
On 30/12/2021 18:06, Florian Klämpfl via fpc-devel wrote:
Ah yes
> Am 30.12.2021 um 20:57 schrieb Jonas Maebe via fpc-devel
> :
>
> On 30/12/2021 20:55, Martin Frb via fpc-devel wrote:
>> On 30/12/2021 20:46, Jonas Maebe via fpc-devel wrote:
>>> On 30/12/2021 18:06, Florian Klämpfl via fpc-devel wrote:
Ah yes, or like this. Nevertheless, the quest
On 30/12/2021 20:57, Jonas Maebe via fpc-devel wrote:
On 30/12/2021 20:55, Martin Frb via fpc-devel wrote:
On 30/12/2021 20:46, Jonas Maebe via fpc-devel wrote:
On 30/12/2021 18:06, Florian Klämpfl via fpc-devel wrote:
Ah yes, or like this. Nevertheless, the question is whether the
ldrsb w0,
On 30/12/2021 20:55, Martin Frb via fpc-devel wrote:
On 30/12/2021 20:46, Jonas Maebe via fpc-devel wrote:
On 30/12/2021 18:06, Florian Klämpfl via fpc-devel wrote:
Ah yes, or like this. Nevertheless, the question is whether the ldrsb
w0,[x0] is correct or not.
Yes, I was unclear: with the
On 30/12/2021 20:46, Jonas Maebe via fpc-devel wrote:
On 30/12/2021 18:06, Florian Klämpfl via fpc-devel wrote:
Ah yes, or like this. Nevertheless, the question is whether the ldrsb
w0,[x0] is correct or not.
Yes, I was unclear: with the "I don't know/remember where this is
done" I meant "c
On 30/12/2021 18:06, Florian Klämpfl via fpc-devel wrote:
Ah yes, or like this. Nevertheless, the question is whether the ldrsb
w0,[x0] is correct or not.
Yes, I was unclear: with the "I don't know/remember where this is done"
I meant "changing the load of the unsigned byte type into a signe
On 30/12/2021 17:16, Florian Klämpfl via fpc-devel wrote:
Am 30.12.21 um 14:52 schrieb Jonas Maebe via fpc-devel:
On 29/12/2021 00:48, Martin Frb via fpc-devel wrote:
I don't have an M1 myself, but according to the data from the thread
on the lazarus mail list, there is a bug in the 3.3.1 asm g
> Am 30.12.2021 um 17:51 schrieb Jonas Maebe via fpc-devel
> :
>
> On 30/12/2021 17:16, Florian Klämpfl via fpc-devel wrote:
>> Am 30.12.21 um 14:52 schrieb Jonas Maebe via fpc-devel:
>>> On 29/12/2021 00:48, Martin Frb via fpc-devel wrote:
I don't have an M1 myself, but according to the d
On 30/12/2021 17:16, Florian Klämpfl via fpc-devel wrote:
Am 30.12.21 um 14:52 schrieb Jonas Maebe via fpc-devel:
On 29/12/2021 00:48, Martin Frb via fpc-devel wrote:
I don't have an M1 myself, but according to the data from the thread
on the lazarus mail list, there is a bug in the 3.3.1 asm g
Am 30.12.21 um 14:52 schrieb Jonas Maebe via fpc-devel:
On 29/12/2021 00:48, Martin Frb via fpc-devel wrote:
I don't have an M1 myself, but according to the data from the thread
on the lazarus mail list, there is a bug in the 3.3.1 asm generator
for M1
var pn8: pint8; // pointer signed byte
On 29/12/2021 00:48, Martin Frb via fpc-devel wrote:
I don't have an M1 myself, but according to the data from the thread on
the lazarus mail list, there is a bug in the 3.3.1 asm generator for M1
var pn8: pint8; // pointer signed byte
In the below expression ...(not pn8^)...
"pn8^" is loaded
I don't have an M1 myself, but according to the data from the thread on
the lazarus mail list, there is a bug in the 3.3.1 asm generator for M1
var pn8: pint8; // pointer signed byte
In the below expression ...(not pn8^)...
"pn8^" is loaded to w0 and sign extended. From this point onwards
ope
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