Re: [fpc-devel] Guidance for code generation for shift operations for AVR target

2019-08-24 Thread Christo Crause
On Mon, Aug 19, 2019 at 10:36 PM Florian Klaempfl wrote: > Am 19.08.2019 um 22:20 schrieb Christo Crause: > > I'm interested in trying to improve the code generated for shift > > operations (in particular involving a compile time constant shift) for > > the AVR target. > For me the idea looks goo

Re: [fpc-devel] Guidance for code generation for shift operations for AVR target

2019-08-19 Thread Florian Klaempfl
Am 19.08.2019 um 22:20 schrieb Christo Crause: > I'm interested in trying to improve the code generated for shift > operations (in particular involving a compile time constant shift) for > the AVR target.  The AVR processor doesn't have a barrel shifter, > instead it can only shift a single bit pos

[fpc-devel] Guidance for code generation for shift operations for AVR target

2019-08-19 Thread Christo Crause
I'm interested in trying to improve the code generated for shift operations (in particular involving a compile time constant shift) for the AVR target. The AVR processor doesn't have a barrel shifter, instead it can only shift a single bit position per clock cycle. Currently the compiler by defaul