The LEA and ADD times are close enough that I can consider them
identical. And Braswell (the architecture behind that brand of Celeron)
doesn't support AVX, I don't think, so that lines up with COREI having a
fast LEA instruction but not COREAVX.
Given the many different x86-compatible CPUs,
On Tue, Oct 10, 2023 at 11:13 AM J. Gareth Moreton via fpc-devel
wrote:
>
> Thanks Tomas,
>
> Nothing is broken, but the timing measurement isn't precise enough.
>
> Normally I have a much higher iteration count (e.g. 1,000,000), but I
> had reduced it to 10,000 because, coupled with the 1,000 ite
Sweet, thank you. Would you be willing to share your modified test's
source? I was worried that if CPUID wasn't present it would cause a SIGILL.
Kit
On 11/10/2023 01:47, Tomas Hajny via fpc-devel wrote:
On 2023-10-10 13:24, J. Gareth Moreton via fpc-devel wrote:
I'm all for receiving results
On 2023-10-10 13:24, J. Gareth Moreton via fpc-devel wrote:
I'm all for receiving results for all kinds of processor, as it helps
me to make more informed choices on flags as well as confirming that
Agner Fog''s instruction tables are correct. Also, results for older
processors can be hard to com
On 18.08.23 00:09, Mattias Gaertner via fpc-devel wrote:
[...]
Another point where it could wrong, is a generic method.
For example:
type
TBird = class
procedure Fly; // fpc does not yet allow this
end;
var
a: TBird;
b: TBird;
begin
a:=b;
a.Fly; // this might call the wrong s
I'm all for receiving results for all kinds of processor, as it helps me
to make more informed choices on flags as well as confirming that Agner
Fog''s instruction tables are correct. Also, results for older
processors can be hard to come by sometimes.
Currently, most architectures have a fast
On 2023-10-10 12:19, Marco van de Voort via fpc-devel wrote:
Op 10-10-2023 om 11:13 schreef J. Gareth Moreton via fpc-devel:
Thanks Tomas,
Nothing is broken, but the timing measurement isn't precise enough.
Normally I have a much higher iteration count (e.g. 1,000,000), but I
had reduced it t
Op 10-10-2023 om 11:13 schreef J. Gareth Moreton via fpc-devel:
Thanks Tomas,
Nothing is broken, but the timing measurement isn't precise enough.
Normally I have a much higher iteration count (e.g. 1,000,000), but I
had reduced it to 10,000 because, coupled with the 1,000 iterations in
the s
Ooo, that might be just what we need. Thank you Stefan.
Kit
On 10/10/2023 10:57, Stefan Glienke via fpc-devel wrote:
Be my guest making https://github.com/spring4d/benchmark compatible for all
platforms you need it for.
On 10/10/2023 11:13 CEST J. Gareth Moreton via fpc-devel
wrote:
T
Be my guest making https://github.com/spring4d/benchmark compatible for all
platforms you need it for.
> On 10/10/2023 11:13 CEST J. Gareth Moreton via fpc-devel
> wrote:
>
>
> Thanks Tomas,
>
> Nothing is broken, but the timing measurement isn't precise enough.
>
> Normally I have a much
Looking at the text log, the results are a bit strange and I can't
easily explain it. Normally a system interrupt would increase the time
taken.
Let me know if increasing the iteration count fixes it or not.
Kit
On 10/10/2023 09:57, Tomas Hajny wrote:
On 2023-10-09 20:51, J. Gareth Moreton
Thanks Tomas,
Nothing is broken, but the timing measurement isn't precise enough.
Normally I have a much higher iteration count (e.g. 1,000,000), but I
had reduced it to 10,000 because, coupled with the 1,000 iterations in
the subroutines themselves, would have led to 1,000,000,000 passes and
On 2023-10-09 20:51, J. Gareth Moreton via fpc-devel wrote:
Hi Kit,
I updated the "blea" test in the merge request so it now displays the
processor brand name on x86_64; however, it is not fetched under i386
because CPUID was not introduced until later 486 processors. I've
attached it to this
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