[FFmpeg-cvslog] avcodec/x86/mathops: clip constants used with shift instructions within inline assembly

ffmpeg | branch: release/3.4 | Rémi Denis-Courmont | Sun Jul 16 18:18:02 2023 +0300| [9983d098ff0ee54bc3b77676dd885883bfbe4ffb] | committer: James Almer avcodec/x86/mathops: clip constants used with shift instructions within inline assembly Fixes assembling with binutil as >= 2.41 Sig

[FFmpeg-cvslog] lavc/h264dsp: R-V V intra loop filter

ffmpeg | branch: master | Rémi Denis-Courmont | Tue Dec 3 21:44:45 2024 +0200| [bd226fdd743c302d76dd99f00d38eb00a9044a06] | committer: Rémi Denis-Courmont lavc/h264dsp: R-V V intra loop filter As with the inter loop filter, performance metrics seem to be biased in favour of the C

[FFmpeg-cvslog] riscv: test for assembler support

ffmpeg | branch: release/6.0 | Rémi Denis-Courmont | Tue Dec 5 17:54:26 2023 +0200| [b98349b2055a93b2a22381bc1a4c09c229f2b3cb] | committer: Brad Smith riscv: test for assembler support This should fix the build on LLVM 16 and earlier, at the cost of turning all non-RVV optimisations off

[FFmpeg-cvslog] riscv: test for assembler support

ffmpeg | branch: release/6.1 | Rémi Denis-Courmont | Tue Dec 5 17:54:26 2023 +0200| [30cd0d7bd0605db6249fdae056ddc0d83a3d9774] | committer: Brad Smith riscv: test for assembler support This should fix the build on LLVM 16 and earlier, at the cost of turning all non-RVV optimisations off

[FFmpeg-cvslog] lavu/float_dsp: fix compilation with RISC-V ILP32 ABI

ffmpeg | branch: master | Rémi Denis-Courmont | Wed Nov 20 20:30:56 2024 +0200| [63922ba5dc77b85033d4926a86f090c9023aff2a] | committer: Rémi Denis-Courmont lavu/float_dsp: fix compilation with RISC-V ILP32 ABI > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavc/h264idct: fix compilation for RV32IMA

ffmpeg | branch: master | Rémi Denis-Courmont | Wed Nov 20 20:48:01 2024 +0200| [f8e91ab05ff3d111626ab8a3b5d570865a934f07] | committer: Rémi Denis-Courmont lavc/h264idct: fix compilation for RV32IMA > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] riscv: remove unnecessary #include's

ffmpeg | branch: master | Rémi Denis-Courmont | Wed Nov 20 20:16:21 2024 +0200| [da1ab7940ebc6c2e7ebf0ea8197ea5e0703168ab] | committer: Rémi Denis-Courmont riscv: remove unnecessary #include's > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commit;h=da1ab7940ebc6c2e7ebf0ea8197ea5e0

[FFmpeg-cvslog] lavc/vp8dsp: fix compilation for RV32IMA

ffmpeg | branch: master | Rémi Denis-Courmont | Wed Nov 20 20:37:49 2024 +0200| [f2b945147d10a2aa054679a276f90ac8ed21a806] | committer: Rémi Denis-Courmont lavc/vp8dsp: fix compilation for RV32IMA > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavc/pixblockdsp: fix compilation for RV32IMA

ffmpeg | branch: master | Rémi Denis-Courmont | Wed Nov 20 20:36:03 2024 +0200| [d3acffae7a48321a4a6223f5a9e6760f45d42e42] | committer: Rémi Denis-Courmont lavc/pixblockdsp: fix compilation for RV32IMA > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavu/riscv: fix compilation without Vector support

ffmpeg | branch: release/7.1 | Rémi Denis-Courmont | Sun Nov 17 11:15:01 2024 +0200| [20c8a3f5ff83e06fa6fc66dc18cedbc8f43d938b] | committer: Rémi Denis-Courmont lavu/riscv: fix compilation without Vector support The half-baked assembler in Clang 16 and earlier can't process our R

[FFmpeg-cvslog] riscv/h264dsp: remove spurious instruction

ffmpeg | branch: master | Rémi Denis-Courmont | Sat Oct 19 10:32:11 2024 +0300| [607d4cca8e213d7b331e9aca6619d18fa6a587f0] | committer: Rémi Denis-Courmont riscv/h264dsp: remove spurious instruction > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavc/h264dsp: fix R-V V weight_pixels pointer arithmetic

ffmpeg | branch: master | Rémi Denis-Courmont | Sun Nov 17 21:21:44 2024 +0200| [b75dff0e201ebe89f63f9ffb2c38f38e310b7333] | committer: Rémi Denis-Courmont lavc/h264dsp: fix R-V V weight_pixels pointer arithmetic As of 459a1512f13ae1fdd404ff9281b02d225ac70a09, the code is unrolled to process

[FFmpeg-cvslog] lavu/riscv: fix compilation without Vector support

ffmpeg | branch: master | Rémi Denis-Courmont | Sun Nov 17 11:15:01 2024 +0200| [e29432e6bbb6184d3ff2c7d1e070e9424cb25fe6] | committer: Rémi Denis-Courmont lavu/riscv: fix compilation without Vector support The half-baked assembler in Clang 16 and earlier can't process our RISC-V asse

[FFmpeg-cvslog] lavc/h264idct: fix RISC-V group multiplier

ffmpeg | branch: release/7.1 | Rémi Denis-Courmont | Sat Nov 16 16:22:49 2024 +0200| [f686cf77db3d3d556072c8b557deca366ccfe7dd] | committer: Rémi Denis-Courmont lavc/h264idct: fix RISC-V group multiplier After the branch, the expected SEW/LMUL ratio is 1 byte/vector. So we have to set the

[FFmpeg-cvslog] lavc/h264idct: fix RISC-V group multiplier

ffmpeg | branch: master | Rémi Denis-Courmont | Sat Nov 16 16:22:49 2024 +0200| [bbb0fdedb78c289f1d3ce3fccb000f031ccfa748] | committer: Rémi Denis-Courmont lavc/h264idct: fix RISC-V group multiplier After the branch, the expected SEW/LMUL ratio is 1 byte/vector. So we have to set the same

[FFmpeg-cvslog] sws/range_convert: fix RISC-V chrFromJpeg

ffmpeg | branch: master | Rémi Denis-Courmont | Sat Nov 16 11:30:15 2024 +0200| [1912c86af68885185a28b4d77b27089e68d29524] | committer: Rémi Denis-Courmont sws/range_convert: fix RISC-V chrFromJpeg > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] tests/cpu: print the RISC-V Vector length

ffmpeg | branch: master | Rémi Denis-Courmont | Sat Nov 16 09:19:12 2024 +0200| [42dd1f1cf13d02381c10461a7bcfcddc63ad211d] | committer: Rémi Denis-Courmont tests/cpu: print the RISC-V Vector length > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavc/vp8dsp: remove RISC-V table alignment

ffmpeg | branch: master | Rémi Denis-Courmont | Sat Nov 16 08:58:35 2024 +0200| [fd8cbfec3d2dbfc82960ddc32c094427abc13bed] | committer: Rémi Denis-Courmont lavc/vp8dsp: remove RISC-V table alignment These values are bytes and need not be aligned. > http://git.videolan.org/gitweb.

[FFmpeg-cvslog] lavc/h264dsp: remove RISC-V table alignment

ffmpeg | branch: master | Rémi Denis-Courmont | Sat Nov 16 08:58:35 2024 +0200| [690c015758dcbf08dd53b95981a65ccb9687dfa4] | committer: Rémi Denis-Courmont lavc/h264dsp: remove RISC-V table alignment These values are bytes and need not be aligned. > http://git.videolan.org/gitweb.

[FFmpeg-cvslog] checkasm: add RISC-V vector width to arch info

ffmpeg | branch: master | Rémi Denis-Courmont | Sat Nov 16 09:19:46 2024 +0200| [55aa81d5ccb92a2f41d6aefc5457bfc1c856c02d] | committer: Rémi Denis-Courmont checkasm: add RISC-V vector width to arch info > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavc/h264dsp: move RISC-V fn pointers to .data.rel.ro

ffmpeg | branch: master | Rémi Denis-Courmont | Sat Nov 16 08:57:54 2024 +0200| [c3051d94a7939de93acd647d3a1719ce56c0c4f5] | committer: Rémi Denis-Courmont lavc/h264dsp: move RISC-V fn pointers to .data.rel.ro This should fix PIC builds. > http://git.videolan.org/gitweb.cgi/ffmpeg.git

[FFmpeg-cvslog] lavc/h264dsp: move RISC-V fn pointers to .data.rel.ro

ffmpeg | branch: release/7.1 | Rémi Denis-Courmont | Sat Nov 16 08:57:54 2024 +0200| [4ea558152f05e41f15a548e2aab8e5d40546af5f] | committer: Rémi Denis-Courmont lavc/h264dsp: move RISC-V fn pointers to .data.rel.ro This should fix PIC builds. > http://git.videolan.org/gitweb.cgi/ffmpeg.

[FFmpeg-cvslog] riscv/vvc: fix UNDEF whilst initialising DSP

ffmpeg | branch: master | Rémi Denis-Courmont | Sat Oct 12 08:30:37 2024 +0300| [1eb026dd8be01ff387436467195238f3b99ab1b9] | committer: Rémi Denis-Courmont riscv/vvc: fix UNDEF whilst initialising DSP The current triggers an illegal instruction if the CPU does not support vectors. > h

[FFmpeg-cvslog] lavc/h264dsp: optimise R-V V biweight for shorter heights

ffmpeg | branch: master | Rémi Denis-Courmont | Sun Sep 1 18:58:27 2024 +0300| [6611bf548497924eb6bfa544d9aa260c393994a3] | committer: Rémi Denis-Courmont lavc/h264dsp: optimise R-V V biweight for shorter heights T-Head C908: h264_biweight2_8_c:313.7

[FFmpeg-cvslog] lavc/h264dsp: unroll R-V V weight16

ffmpeg | branch: master | Rémi Denis-Courmont | Sun Sep 1 16:31:13 2024 +0300| [459a1512f13ae1fdd404ff9281b02d225ac70a09] | committer: Rémi Denis-Courmont lavc/h264dsp: unroll R-V V weight16 As VLSE128.V does not exist, we have no other way to deal with latency. T-Head C908

[FFmpeg-cvslog] lavc/h264dsp: optimise R-V V weight for shorter heights

ffmpeg | branch: master | Rémi Denis-Courmont | Sun Sep 1 15:47:26 2024 +0300| [4936bb25083ebdd7b0c514ab8b81159bb4273265] | committer: Rémi Denis-Courmont lavc/h264dsp: optimise R-V V weight for shorter heights The height is a power of two of up to 16 rows. The current code was optimised for

[FFmpeg-cvslog] compat: add a fallback implementation of C23 stdbit.h

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Sep 9 16:15:18 2024 +0200| [a7505ec5620a5969ac35fb2999fbe5e6534a8a34] | committer: Anton Khirnov compat: add a fallback implementation of C23 stdbit.h Header contents taken from VLC commit 7a970a33329c9836d169727ddbaf49a33240d587. Signed

[FFmpeg-cvslog] checkasm/riscv: print official extension names

ffmpeg | branch: master | Rémi Denis-Courmont | Sun Sep 1 16:35:16 2024 +0300| [d9f594209fb1a9c87017034f943dcb311a9d2896] | committer: Rémi Denis-Courmont checkasm/riscv: print official extension names > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] swscale/rgb2rgb: enable R-V V deinterleaveBytes

ffmpeg | branch: master | Rémi Denis-Courmont | Sun Sep 1 10:41:41 2024 +0300| [27d28b68daae0f67db776896ddca5c76b07c519e] | committer: Rémi Denis-Courmont swscale/rgb2rgb: enable R-V V deinterleaveBytes T-Head C908: deinterleave_bytes_c: 100328.3 ( 1.00x

[FFmpeg-cvslog] lavc/h264dsp: R-V V loop_filter_chroma

ffmpeg | branch: master | Rémi Denis-Courmont | Tue Aug 20 21:59:00 2024 +0300| [7d1dda4892d9e3007c70f36bfb369d70413dfbdb] | committer: Rémi Denis-Courmont lavc/h264dsp: R-V V loop_filter_chroma T-Head C908: h264_v_loop_filter_chroma_8bpp_c: 137.4 h264_v_loop_filter_chroma_8bpp_rvv_i32

[FFmpeg-cvslog] lavc/h264dsp: do not write back unmodified rows in R-V V loop filter

ffmpeg | branch: master | Rémi Denis-Courmont | Wed Aug 21 22:55:07 2024 +0300| [3a5365683799ded2df974671928b545a153650ca] | committer: Rémi Denis-Courmont lavc/h264dsp: do not write back unmodified rows in R-V V loop filter > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavc/mpegvideoencdsp: R-V V try_8x8basis

ffmpeg | branch: master | Rémi Denis-Courmont | Wed Aug 14 19:56:05 2024 +0300| [1907dd7f2335ba106b1d92070a497e818d734efd] | committer: Rémi Denis-Courmont lavc/mpegvideoencdsp: R-V V try_8x8basis T-Head C908: try_8x8basis_c: 922.5 try_8x8basis_rvv_i32: 135.3 SpacemiT X60

[FFmpeg-cvslog] lavc/mpegvideoencdsp: R-V V pix_norm1

ffmpeg | branch: master | Rémi Denis-Courmont | Fri Aug 9 22:03:49 2024 +0300| [0fd37c00d728becba6c49aff9efaf7cae17d46d7] | committer: Rémi Denis-Courmont lavc/mpegvideoencdsp: R-V V pix_norm1 T-Head C908: pix_norm1_c: 480.2 pix_norm1_rvv_i64: 146.9 SpacemiT X60: pix_norm1_c

[FFmpeg-cvslog] lavc/mpegvideoencdsp: R-V V add_8x8basis

ffmpeg | branch: master | Rémi Denis-Courmont | Wed Aug 14 20:16:30 2024 +0300| [d8fb44c0aa2f7bc566f937330067be6f2ab83c67] | committer: Rémi Denis-Courmont lavc/mpegvideoencdsp: R-V V add_8x8basis T-Head C908: add_8x8basis_c: 440.6 add_8x8basis_rvv_i32: 70.3 SpacemiT X60: add_8x8basis_c

[FFmpeg-cvslog] lavc/mpegvideoencdsp: R-V V pix_sum

ffmpeg | branch: master | Rémi Denis-Courmont | Fri Aug 9 22:03:49 2024 +0300| [63d016aea5d9e6e10f68b29d001dd708b29f869f] | committer: Rémi Denis-Courmont lavc/mpegvideoencdsp: R-V V pix_sum T-Head C908: pix_sum_c: 332.2 pix_sum_rvv_i64: 91.2 SpacemiT X60: pix_sum_c: 321.2

[FFmpeg-cvslog] lavu/cpu: deprecate RISC-V F, D and zba CPU flags

ffmpeg | branch: master | Rémi Denis-Courmont | Thu Jul 25 23:24:33 2024 +0300| [e0f9f4d49153df3a0a43f27bb7ffa3ae3a892237] | committer: Rémi Denis-Courmont lavu/cpu: deprecate RISC-V F, D and zba CPU flags > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavu/riscv: depend on RVB and simplify accordingly

ffmpeg | branch: master | Rémi Denis-Courmont | Sat Jul 27 14:30:17 2024 +0300| [cb31f17ca8f0338c2e00ac956a28a74c4d030a90] | committer: Rémi Denis-Courmont lavu/riscv: depend on RVB and simplify accordingly > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavc/riscv: depend on RVB and simplify accordingly

ffmpeg | branch: master | Rémi Denis-Courmont | Sat Jul 27 14:30:17 2024 +0300| [616fdeaea30c9db2ee2521f56ee7717e4d2f4a0f] | committer: Rémi Denis-Courmont lavc/riscv: depend on RVB and simplify accordingly There is no known (real) hardware with V and without the complete B extension. B was

[FFmpeg-cvslog] sws/riscv: depend on RVB and simplify accordingly

ffmpeg | branch: master | Rémi Denis-Courmont | Sat Jul 27 14:30:17 2024 +0300| [210877c5fd30015ea7c6a7fa2f489688ed4b1d64] | committer: Rémi Denis-Courmont sws/riscv: depend on RVB and simplify accordingly > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavu/riscv: drop probing for zba CPU capability

ffmpeg | branch: master | Rémi Denis-Courmont | Sat Jul 27 15:31:55 2024 +0300| [d1326b63479f839bc776c1c250793b9d487818cd] | committer: Rémi Denis-Courmont lavu/riscv: drop probing for zba CPU capability > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavfi/riscv: depend on RVB and simplify accordingly

ffmpeg | branch: master | Rémi Denis-Courmont | Sat Jul 27 14:30:17 2024 +0300| [f30e5bf1f5f4d9473840913937062b4ea8009efb] | committer: Rémi Denis-Courmont lavfi/riscv: depend on RVB and simplify accordingly > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavc/h264dsp: R-V V idct4_add8 (all depths)

ffmpeg | branch: master | Rémi Denis-Courmont | Wed Jul 31 22:04:45 2024 +0300| [4edfc11a28ed763ba93e7cf8a656bb3e1b425c5d] | committer: Rémi Denis-Courmont lavc/h264dsp: R-V V idct4_add8 (all depths) These are really just wrappers for idct4_add16intra functions, which are in turn mostly

[FFmpeg-cvslog] lavc/videodsp: work-around LLVM-as

ffmpeg | branch: master | Rémi Denis-Courmont | Fri Aug 2 18:07:04 2024 +0300| [de7f999481b1928d81bc997fc63ff8ff17e79383] | committer: Rémi Denis-Courmont lavc/videodsp: work-around LLVM-as For some reason, it can't handle the normal syntax for an address operand without an offset, so

[FFmpeg-cvslog] lavc/h264dsp: stick R-V V biweight to 16-bit

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 29 21:20:37 2024 +0300| [afd45c7ff74cc947d427202c1e9adc9ddc1987f8] | committer: Rémi Denis-Courmont lavc/h264dsp: stick R-V V biweight to 16-bit T-Head C908 (ns): h264_biweight2_8_c:2414.5 h264_biweight2_8_rvv_i32: 701.8

[FFmpeg-cvslog] lavc/h264dsp: stick R-V V weight to 16-bit precision

ffmpeg | branch: master | Rémi Denis-Courmont | Tue Jul 30 20:29:02 2024 +0300| [677f28b310ac8cbf96e3a02865c2aff49c6950ff] | committer: Rémi Denis-Courmont lavc/h264dsp: stick R-V V weight to 16-bit precision T-Head C908 (ns): h264_weight2_8_c:1607.8 h264_weight2_8_rvv_i32: 515.0

[FFmpeg-cvslog] lavc/riscv: drop probing for F & D extensions

ffmpeg | branch: master | Rémi Denis-Courmont | Thu Jul 25 23:20:05 2024 +0300| [1b2a925e94c772c59a88c03c1654bddf6aff0ca2] | committer: Rémi Denis-Courmont lavc/riscv: drop probing for F & D extensions F and D extensions are included in all RISC-V application profiles ever made (so star

[FFmpeg-cvslog] lavc/audiodsp: drop R-V F vector_clipf

ffmpeg | branch: master | Rémi Denis-Courmont | Thu Jul 25 22:58:55 2024 +0300| [2f083fd5817f99e9874acf4fd04e6b4a7c47bb86] | committer: Rémi Denis-Courmont lavc/audiodsp: drop R-V F vector_clipf This is now firmly slower than C. SiFive-U74 (cycles): audiodsp.vector_clipf_c: 31.2

[FFmpeg-cvslog] lavc/audiodsp: drop opposite sign optimisation

ffmpeg | branch: master | Rémi Denis-Courmont | Thu Jul 25 22:50:35 2024 +0300| [c48213b2dc0b6329359a84e0d332e4697d84ea90] | committer: Rémi Denis-Courmont lavc/audiodsp: drop opposite sign optimisation This was added along side the original SSE(one) DSP function in

[FFmpeg-cvslog] lavc/audiodsp: properly unroll vector_clipf

ffmpeg | branch: master | Rémi Denis-Courmont | Thu Jul 25 22:40:25 2024 +0300| [d86b6767ce98fda133e2b8f7f954a497eab2e528] | committer: Rémi Denis-Courmont lavc/audiodsp: properly unroll vector_clipf Given that source and destination can alias, the compiler was forced to perform each read

[FFmpeg-cvslog] checkasm/riscv: preserve T1 whilst calling...

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 29 22:33:16 2024 +0300| [656a9664bf828fc19b1e5a6e982bbcad456d1092] | committer: Rémi Denis-Courmont checkasm/riscv: preserve T1 whilst calling... This preserves T1 whilst calling the instrumented function. In a Sci-Fi setting where type

[FFmpeg-cvslog] lavu/riscv: fix return type

ffmpeg | branch: master | Rémi Denis-Courmont | Wed Jul 31 17:45:28 2024 +0300| [54b1970c60743eb1ce971d66c6b6230a36040687] | committer: Rémi Denis-Courmont lavu/riscv: fix return type > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commit;h=54b1970c60743eb1ce971d66c6b6230a36040

[FFmpeg-cvslog] lavc/pixblockdsp: specialise aligned 16-bit get_pixels

ffmpeg | branch: master | Rémi Denis-Courmont | Thu Jul 25 18:38:32 2024 +0300| [d527d238728bf9b75d55960c4279134d0fba493b] | committer: Rémi Denis-Courmont lavc/pixblockdsp: specialise aligned 16-bit get_pixels The current code assumes that we have unaligned rows, which hurts on platforms

[FFmpeg-cvslog] lavc/rv34dsp: use saturating add/sub for R-V V DC add

ffmpeg | branch: master | Rémi Denis-Courmont | Sun Jul 28 21:40:52 2024 +0300| [54ae270213b5a98f923bfd4506e450b2e764ede2] | committer: Rémi Denis-Courmont lavc/rv34dsp: use saturating add/sub for R-V V DC add T-Head C908 (cycles): rv34_idct_dc_add_c: 113.2 rv34_idct_dc_add_rvv_i32: 48.5

[FFmpeg-cvslog] lavc/bswapdsp: add RV Zvbb bswap16 and bswap32

ffmpeg | branch: master | Rémi Denis-Courmont | Sun Jul 28 21:17:58 2024 +0300| [952b426f3bcc6206eff2fa338ff7da475a28692b] | committer: Rémi Denis-Courmont lavc/bswapdsp: add RV Zvbb bswap16 and bswap32 > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavc/videodsp: RISC-V zicbop prefetch

ffmpeg | branch: master | Rémi Denis-Courmont | Fri Sep 23 18:09:54 2022 +0300| [262168b04e6807fce6a78507c14cfc166ba72845] | committer: Rémi Denis-Courmont lavc/videodsp: RISC-V zicbop prefetch There are currently no ways to run-time detect the CPU capability, so we take it for granted (in

[FFmpeg-cvslog] configure: check if assembler supports RV zicbop

ffmpeg | branch: master | Rémi Denis-Courmont | Fri Sep 23 18:09:18 2022 +0300| [4570b9f3c4e64a996bcadc5af58574f7f32ee1de] | committer: Rémi Denis-Courmont configure: check if assembler supports RV zicbop zicbop is the Cache Block Operation, Prefetch extension to RVI. > h

[FFmpeg-cvslog] lavc/vc1dsp: use saturating arithmetic for RVV inv_trans_dc

ffmpeg | branch: master | Rémi Denis-Courmont | Sat Jul 27 18:31:07 2024 +0300| [324eba69f7193367a28f31411f5ded9d7eb2eb48] | committer: Rémi Denis-Courmont lavc/vc1dsp: use saturating arithmetic for RVV inv_trans_dc T-Head C908 (cycles): vc1dsp.vc1_inv_trans_4x4_dc_c: 113.7

[FFmpeg-cvslog] lavc/ac3dsp: fix R-V CPU requirements

ffmpeg | branch: master | Rémi Denis-Courmont | Sat Jul 27 14:30:52 2024 +0300| [5171baa2289322d57aa36df321582719293f231c] | committer: Rémi Denis-Courmont lavc/ac3dsp: fix R-V CPU requirements It probably will not matter on any real hardware, but the Zbb optimisations do not require Zba. And

[FFmpeg-cvslog] lavc/vc1dsp: unify R-V V DC bypass functions

ffmpeg | branch: master | Rémi Denis-Courmont | Sat Jul 27 18:34:58 2024 +0300| [784a72a116c29a38ec55ce81e165a29bdd00c497] | committer: Rémi Denis-Courmont lavc/vc1dsp: unify R-V V DC bypass functions > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavu/riscv: count bytes rather than words for bswap32

ffmpeg | branch: master | Rémi Denis-Courmont | Sat Jul 27 14:55:04 2024 +0300| [bd0c3edb136fb79a8d99fd0dfc50c15e40a2355b] | committer: Rémi Denis-Courmont lavu/riscv: count bytes rather than words for bswap32 This removes the dependency on Zba at essentially zero cost. > h

[FFmpeg-cvslog] lavc/vp9dsp: copy 8 pixels at once

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 22 21:06:38 2024 +0300| [7aa6510fe1fc726f0acd22c5b2d2537c69099395] | committer: Rémi Denis-Courmont lavc/vp9dsp: copy 8 pixels at once In the 8-bit case, we can actually read/write 8 aligned pixel values per load/store, which

[FFmpeg-cvslog] lavc/vp9dsp: restrict vertical intra pointers

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 22 20:49:10 2024 +0300| [56fc5fc6ce9b4d3b9505a652d2a29f4f0662e4e2] | committer: Rémi Denis-Courmont lavc/vp9dsp: restrict vertical intra pointers This lets the compiler unroll ever so slightly better (at least in the 16x16 case for RISC

[FFmpeg-cvslog] lavc/vp9dsp: remove R-V I intra functions

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 22 21:09:59 2024 +0300| [7b24f96c879367ba2d5ecbd24a672298b9e278e7] | committer: Rémi Denis-Courmont lavc/vp9dsp: remove R-V I intra functions At this point, they are identical to the C code, except for instruction ordering. In fact, they

[FFmpeg-cvslog] lavc/vp9dsp: use restrict qualifier for copy/avg MC

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 22 21:06:01 2024 +0300| [c98127c00eab4d2d9414a0a8c5b27bf7e17f5866] | committer: Rémi Denis-Courmont lavc/vp9dsp: use restrict qualifier for copy/avg MC Same as previous commit. > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavu/riscv: implement floating point clips

ffmpeg | branch: master | Rémi Denis-Courmont | Thu Jul 25 22:17:48 2024 +0300| [39ced529b0588b4516cd94bd9b498fb06a387101] | committer: Rémi Denis-Courmont lavu/riscv: implement floating point clips Unlike x86, fmin/fmax are single instructions, not function calls. They are much much faster

[FFmpeg-cvslog] lavc/h264dsp: use saturing add/sub for R-V V 8-bit DC add

ffmpeg | branch: master | Rémi Denis-Courmont | Thu Jul 25 20:47:34 2024 +0300| [b0b3bea10bab54f22f976245da343fb42c9c1f28] | committer: Rémi Denis-Courmont lavc/h264dsp: use saturing add/sub for R-V V 8-bit DC add T-Head C908 (cycles): h264_idct4_dc_add_8bpp_c: 109.2

[FFmpeg-cvslog] lavc/vp8dsp: use saturating add/sub for R-V V DC add

ffmpeg | branch: master | Rémi Denis-Courmont | Thu Jul 25 17:40:26 2024 +0300| [9b4655c3a145d5d0f315c3bd0a80792f37603c2f] | committer: Rémi Denis-Courmont lavc/vp8dsp: use saturating add/sub for R-V V DC add T-Head C908 (cycles): vp7_idct_dc_add_c: 108.5 vp7_idct_dc_add_rvv_i32

[FFmpeg-cvslog] lavc/riscv: don't set vxrm if unnecessary

ffmpeg | branch: master | Rémi Denis-Courmont | Thu Jul 25 17:33:12 2024 +0300| [bbfc0ac9cacbfbddd94ffc92ef904b7854cb88ad] | committer: Rémi Denis-Courmont lavc/riscv: don't set vxrm if unnecessary While narrowing clip is nominally a rounding operation, the rounding mode has no arith

[FFmpeg-cvslog] checkasm/riscv: align the landing pads

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 22 23:12:47 2024 +0300| [8030876d1c77f37a3528cc0c541f75ba8d39e9f4] | committer: Rémi Denis-Courmont checkasm/riscv: align the landing pads > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavu/riscv: add forward-edge CFI landing pads

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 22 22:17:40 2024 +0300| [a14d21a446e9935dba7ba8dd262dc236160af5d1] | committer: Rémi Denis-Courmont lavu/riscv: add forward-edge CFI landing pads > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavfi/riscv: add forward-edge CFI landing pads

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 22 22:17:40 2024 +0300| [b5c111272b4470cfbd13c894cb7b8844e4f08dc9] | committer: Rémi Denis-Courmont lavfi/riscv: add forward-edge CFI landing pads > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] checkasm/riscv: add forward-edge CFI landing pads

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 22 22:17:40 2024 +0300| [7dde8be29fb7e27f2026e0d48d76eabc760de638] | committer: Rémi Denis-Courmont checkasm/riscv: add forward-edge CFI landing pads > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] sws/riscv: add forward-edge CFI landing pads

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 22 22:17:40 2024 +0300| [4f2472909eacb833682a7da79b0c893c8a356ce9] | committer: Rémi Denis-Courmont sws/riscv: add forward-edge CFI landing pads > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavc/riscv: add forward-edge CFI landing pads

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 22 22:17:40 2024 +0300| [f2c30fe15aef2ed009941959333773f40a2b273e] | committer: Rémi Denis-Courmont lavc/riscv: add forward-edge CFI landing pads > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavu/riscv: assembly for zicfilp LPAD

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 22 22:15:49 2024 +0300| [631960134383d61bb5203d476906cdedd447d60f] | committer: Rémi Denis-Courmont lavu/riscv: assembly for zicfilp LPAD This instruction, if aligned on a 4-byte boundary, defines a valid target ("landing pad&quo

[FFmpeg-cvslog] lavu/riscv: align functions to 4 bytes

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 22 23:09:11 2024 +0300| [982376660c58f59a384486894a3f1092d6888e4b] | committer: Rémi Denis-Courmont lavu/riscv: align functions to 4 bytes Currently the start of the byte range for each function is aligned to 4 bytes. But this can lead

[FFmpeg-cvslog] lavc/h264dsp: use RISC-V B extension

ffmpeg | branch: master | Rémi Denis-Courmont | Fri Jul 19 22:16:01 2024 +0300| [b62586e31019a7654c65c1a4758d59c1b0e754ad] | committer: Rémi Denis-Courmont lavc/h264dsp: use RISC-V B extension This saves one register and one instruction per transform. add16 and add16intra thus become stack

[FFmpeg-cvslog] lavu/riscv: remove bespoke SH{1,2,3}ADD assembler

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 22 20:24:30 2024 +0300| [529d4230123dbb33a719a4d5ec7e47567f04cd06] | committer: Rémi Denis-Courmont lavu/riscv: remove bespoke SH{1,2,3}ADD assembler configure checks that the assembler supports the B extension (or rather its

[FFmpeg-cvslog] lavu/riscv: add CPU flag for B bit manipulations

ffmpeg | branch: master | Rémi Denis-Courmont | Fri Jul 19 22:44:21 2024 +0300| [45d7078a21823ef0734a84514c8221da569009cb] | committer: Rémi Denis-Courmont lavu/riscv: add CPU flag for B bit manipulations The B extension was finally ratified in May 2024, encompassing: - Zba (addresses), - Zbb

[FFmpeg-cvslog] lavu/riscv: require B or zba explicitly

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 22 20:23:50 2024 +0300| [5f10173fa173f27405d4700522fea2b59fa82416] | committer: Rémi Denis-Courmont lavu/riscv: require B or zba explicitly > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavc/riscv: require B or zba explicitly

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 22 20:23:50 2024 +0300| [187d4d066a4559e2afe2b331144d2b31e256c1ae] | committer: Rémi Denis-Courmont lavc/riscv: require B or zba explicitly > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavfi/riscv: require B or zba explicitly

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 22 20:23:50 2024 +0300| [9108f3e5e11cc8bc9e44fdedf04a79378578a70c] | committer: Rémi Denis-Courmont lavfi/riscv: require B or zba explicitly > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] sws/riscv: require B or zba explicitly

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 22 20:23:50 2024 +0300| [e91a8cc4de2600dd6f18c139714fa1cad6db7ab9] | committer: Rémi Denis-Courmont sws/riscv: require B or zba explicitly > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavu/riscv: allow any number of extensions

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 22 20:01:17 2024 +0300| [1e7ab200ee2c6d1992ba9a68e6467ae6b7348dec] | committer: Rémi Denis-Courmont lavu/riscv: allow any number of extensions This reworks the func/endfunc macros to support any number of ISA extension as parameters

[FFmpeg-cvslog] lavu/riscv: grok B as an extension

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 22 20:06:09 2024 +0300| [7f97344bfb8deab6fdbf82427489a4751132bb7a] | committer: Rémi Denis-Courmont lavu/riscv: grok B as an extension The RISC-V B bit manipulation extension was ratified only two months ago. But it is strictly

[FFmpeg-cvslog] lavc/vp8dsp: fix RV32 stack alignment

ffmpeg | branch: master | Rémi Denis-Courmont | Tue Jul 23 18:47:08 2024 +0300| [896c22ef000b5d122f14c9f85b364e2d21e1f45c] | committer: Rémi Denis-Courmont lavc/vp8dsp: fix RV32 stack alignment SP must be a multiple of 16 bytes at all times on POSIX - even in leaf functions - so that signal

[FFmpeg-cvslog] lavu/riscv: do not fallback to AT_HWCAP auxillary vector

ffmpeg | branch: master | Rémi Denis-Courmont | Sat May 11 17:26:14 2024 +0300| [0e32192548cd38a206ef3ed3c0ad8edc337a1e5f] | committer: Rémi Denis-Courmont lavu/riscv: do not fallback to AT_HWCAP auxillary vector If __riscv_hwprobe() fails, then the kernel version is presumably too old. There

[FFmpeg-cvslog] lavc/h264dsp: reduce spills in R-V V idct_add16

ffmpeg | branch: master | Rémi Denis-Courmont | Tue Jul 16 22:59:34 2024 +0300| [9135dffd177d457a8a1781b9e6c6d400648165cb] | committer: Rémi Denis-Courmont lavc/h264dsp: reduce spills in R-V V idct_add16 > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] lavc/h264dsp: reuse the R-V V IDCT DC add functions

ffmpeg | branch: master | Rémi Denis-Courmont | Thu Jul 18 20:53:22 2024 +0300| [245f76ad74519c0f2a2f82d74041eb48c72d7eba] | committer: Rémi Denis-Courmont lavc/h264dsp: reuse the R-V V IDCT DC add functions This reuses the DC bypass functions from the multiple IDCT functions, to leverage

[FFmpeg-cvslog] lavc/h264dsp: correct VL and LMUL in idct_dc_add

ffmpeg | branch: master | Rémi Denis-Courmont | Thu Jul 18 21:24:35 2024 +0300| [0a5b5bae89ecf87a8fa79ae2f133ed926927b98b] | committer: Rémi Denis-Courmont lavc/h264dsp: correct VL and LMUL in idct_dc_add T-Head C908 (cycles): h264_idct4_dc_add_8bpp_c:94.7

[FFmpeg-cvslog] lavc/h264dsp: factor some mostly identical R-V V code

ffmpeg | branch: master | Rémi Denis-Courmont | Tue Jul 16 22:45:14 2024 +0300| [d15169c51fd5bc6ea768c83977315954bf583e57] | committer: Rémi Denis-Courmont lavc/h264dsp: factor some mostly identical R-V V code > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

[FFmpeg-cvslog] checkasm/h264dsp: test TX bypass

ffmpeg | branch: master | Rémi Denis-Courmont | Sat Jul 13 20:28:34 2024 +0300| [c4c811b3d92721dd14452a02d092ca220c9f6b8b] | committer: Rémi Denis-Courmont checkasm/h264dsp: test TX bypass > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commit;h=c4c811b3d92721dd14452a02d092ca220c9f6

[FFmpeg-cvslog] lavc/h264dsp: R-V V high-depth idct_add{,intra}16, idct8_add4

ffmpeg | branch: master | Rémi Denis-Courmont | Mon Jul 15 21:19:39 2024 +0300| [483fd732abc3eda80681811250cd4d2937ade265] | committer: Rémi Denis-Courmont lavc/h264dsp: R-V V high-depth idct_add{,intra}16, idct8_add4 As with 8-bit, this tends to be faster, but results are all over the place

[FFmpeg-cvslog] lavc/h264dsp: R-V V high-depth add_pixels8

ffmpeg | branch: master | Rémi Denis-Courmont | Sat Jul 13 16:01:14 2024 +0300| [3002310b707071ec7aa671ab7428feed5ee9740c] | committer: Rémi Denis-Courmont lavc/h264dsp: R-V V high-depth add_pixels8 T-Head C908 (cycles); h264_add_pixels8_9bpp_c:270.5 h264_add_pixels8_9bpp_rvv_i32

[FFmpeg-cvslog] lavc/h264dsp: R-V V add_pixels4 and 8-bit add_pixels8

ffmpeg | branch: master | Rémi Denis-Courmont | Sat Jul 13 15:43:27 2024 +0300| [7744c08240808c8517a9c088b465c15235a34c86] | committer: Rémi Denis-Courmont lavc/h264dsp: R-V V add_pixels4 and 8-bit add_pixels8 T-Head C908 (cycles): h264_add_pixels4_8bpp_c:93.5

[FFmpeg-cvslog] lavc/h264dsp: R-V V high-depth h264_idct8_add

ffmpeg | branch: master | Rémi Denis-Courmont | Thu Jul 11 22:01:25 2024 +0300| [c654e37254efb6de5d3f1355dd7936979dd0dca3] | committer: Rémi Denis-Courmont lavc/h264dsp: R-V V high-depth h264_idct8_add Unlike the 8-bit version, we need two iterations to process this within 128-bit vectors

[FFmpeg-cvslog] lavc/h264dsp: remove MMI 8-bit 4:2:2 chroma DC dequant

ffmpeg | branch: master | Rémi Denis-Courmont | Sun Jul 7 14:39:11 2024 +0300| [8b3d997bede0e065f19bcaa96f99dfa9978fd181] | committer: Rémi Denis-Courmont lavc/h264dsp: remove MMI 8-bit 4:2:2 chroma DC dequant The function is exactly identical to the C reference, only with the constant

[FFmpeg-cvslog] lavc/h264dsp: remove MMI 8-bit chroma DC dequant

ffmpeg | branch: master | Rémi Denis-Courmont | Sun Jul 7 14:39:11 2024 +0300| [a194131cb6adb6d5f2156e785f1bf859d9449def] | committer: Rémi Denis-Courmont lavc/h264dsp: remove MMI 8-bit chroma DC dequant The function is exactly identical to the C reference, only with the constant propagated

[FFmpeg-cvslog] lavc/h264dsp: R-V V high-depth h264_idct_add

ffmpeg | branch: master | Rémi Denis-Courmont | Tue Jul 2 22:03:07 2024 +0300| [4e0e872881ff57f1953517067cf82d7ea925b432] | committer: Rémi Denis-Courmont lavc/h264dsp: R-V V high-depth h264_idct_add T-Head C908 (cycles): h264_idct4_add_9bpp_c:248.2 h264_idct4_add_9bpp_rvv_i32

[FFmpeg-cvslog] lavc/h264dsp: avoid \+ expansion

ffmpeg | branch: master | Rémi Denis-Courmont | Wed Jul 10 23:20:54 2024 +0300| [d28a7e8eb7eb2cb2efcc9c8e9d506cdddcae0a26] | committer: Rémi Denis-Courmont lavc/h264dsp: avoid \+ expansion This seems to be unsupported by LLVM-as. > http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commi

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