Re: [PATCH v3 0/5] Reset driver for IMX8MQ VPU hardware block

On Wed, Mar 3, 2021 at 5:24 PM Philipp Zabel wrote: > > On Wed, 2021-03-03 at 16:20 +0100, Benjamin Gaignard wrote: > > Le 03/03/2021 à 15:17, Philipp Zabel a écrit : > > > Hi Benjamin, > > > > > > On Mon, 2021-03-01 at 16:17 +0100, Benjamin Gaignard wrote: > > > > The two VPUs inside IMX8MQ share

Re: [PATCH v9 02/13] dt-bindings: media: nxp, imx8mq-vpu: Update the bindings for G2 support

On Wed, Apr 7, 2021 at 2:37 AM Benjamin Gaignard wrote: > > Introducing the G2 hevc video decoder requires modifications of the bindings > to allow > one node per VPU. > > VPUs share one hardware control block which is provided as a phandle on > a syscon. > Each node has now one reg and one inter