Clear the reserved fields.
Fixes:
fail: v4l2-test-formats.cpp(482): pix_mp.plane_fmt[0].reserved not zeroed
test VIDIOC_TRY_FMT: FAIL
fail: v4l2-test-formats.cpp(482): pix_mp.plane_fmt[0].reserved not zeroed
test VIDIOC_S_FMT: FAIL
Signed-off-by: Ricardo Ribalda
---
drivers/staging/media/ha
Hi Ricardo,
On Mon, 2021-01-11 at 12:35 +0100, Ricardo Ribalda wrote:
> Clear the reserved fields.
>
> Fixes:
> fail: v4l2-test-formats.cpp(482): pix_mp.plane_fmt[0].reserved not zeroed
> test VIDIOC_TRY_FMT: FAIL
> fail: v4l2-test-formats.cpp(482): pix_mp.plane_fmt[0].reserved not zeroed
> t
Hi Ezequiel
On Mon, Jan 11, 2021 at 12:48 PM Ezequiel Garcia wrote:
>
> Hi Ricardo,
>
> On Mon, 2021-01-11 at 12:35 +0100, Ricardo Ribalda wrote:
> > Clear the reserved fields.
> >
> > Fixes:
> > fail: v4l2-test-formats.cpp(482): pix_mp.plane_fmt[0].reserved not zeroed
> > test VIDIOC_TRY_FMT:
Hi Ezequiel
On Mon, Jan 11, 2021 at 12:55 PM Ricardo Ribalda wrote:
>
> Hi Ezequiel
>
> On Mon, Jan 11, 2021 at 12:48 PM Ezequiel Garcia
> wrote:
> >
> > Hi Ricardo,
> >
> > On Mon, 2021-01-11 at 12:35 +0100, Ricardo Ribalda wrote:
> > > Clear the reserved fields.
> > >
> > > Fixes:
> > > fai
On Mon, 2021-01-11 at 13:22 +0100, Ricardo Ribalda wrote:
> Hi Ezequiel
>
> On Mon, Jan 11, 2021 at 12:55 PM Ricardo Ribalda wrote:
> >
> > Hi Ezequiel
> >
> > On Mon, Jan 11, 2021 at 12:48 PM Ezequiel Garcia
> > wrote:
> > >
> > > Hi Ricardo,
> > >
> > > On Mon, 2021-01-11 at 12:35 +0100,
On Tue, 2021-01-05 at 16:20 +, Phil Elwell wrote:
> The recent batch of vchiq improvements broke bulk transfers in two ways:
>
> 1. The userdata associated with a transfer was lost in the case that a
> non-blocking mode was used.
>
> 2. The 64-bit ioctl compatibility shim for a bulk transf
Hi Samuel,
On Sat 09 Jan 21, 16:24, Samuel Holland wrote:
> On 12/31/20 8:29 AM, Paul Kocialkowski wrote:
> > The A31 MIPI CSI-2 controller is a dedicated MIPI CSI-2 bridge
> > found on Allwinner SoCs such as the A31 and V3/V3s.
> >
> > It is a standalone block, connected to the CSI controller on
Salut Paul,
Just a minor comment about the v4l2 async API.
On Thu, 31 Dec 2020 at 11:30, Paul Kocialkowski
wrote:
>
> The A31 MIPI CSI-2 controller is a dedicated MIPI CSI-2 bridge
> found on Allwinner SoCs such as the A31 and V3/V3s.
>
> It is a standalone block, connected to the CSI controller
allyesconfig
mips allmodconfig
powerpc allyesconfig
powerpc allmodconfig
i386 randconfig-a002-20210111
i386 randconfig-a005-20210111
i386 randconfig-a006-20210111
i386
On Fri, 2020-12-11 at 17:47 +0100, Nicolas Saenz Julienne wrote:
> The aim of this series is to add support to the fan found on RPi's PoE
> HAT. Some commentary on the design can be found below. But the imporant
> part to the people CC'd here not involved with PWM is that, in order to
> achieve thi
On Thu, 31 Dec 2020 15:29:41 +0100, Paul Kocialkowski wrote:
> This introduces YAML bindings documentation for the A31 MIPI CSI-2
> controller.
>
> Signed-off-by: Paul Kocialkowski
> ---
> .../media/allwinner,sun6i-a31-mipi-csi2.yaml | 149 ++
> 1 file changed, 149 insertions(+)
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