[PATCH] staging: fwserial: Fix error handling in fwserial_create

2020-12-21 Thread Dinghao Liu
When fw_core_add_address_handler() fails, we need to destroy the port by tty_port_destroy(). Also we need to unregister the address handler by fw_core_remove_address_handler() on failure. Signed-off-by: Dinghao Liu --- drivers/staging/fwserial/fwserial.c | 2 ++ 1 file changed, 2 insertions(+)

Re: [PATCH] staging: octeon-usb: octeon-hcd: fixed indent and ending with brace coding style issue

2020-12-21 Thread Greg KH
On Mon, Dec 21, 2020 at 09:15:57AM +, Anjandev Momi wrote: > Fixed coding style issues > > Signed-off-by: Anjandev Momi > --- > drivers/staging/octeon-usb/octeon-hcd.c | 96 - > 1 file changed, 46 insertions(+), 50 deletions(-) > Hi, This is the friendly patch-bot

[PATCH -next] greybus/audio_helper: Add missing unlock to avoid mismatched lock

2020-12-21 Thread Zheng Yongjun
Fix a missing unlock in the error branch. Signed-off-by: Zheng Yongjun --- drivers/staging/greybus/audio_helper.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/staging/greybus/audio_helper.c b/drivers/staging/greybus/audio_helper.c index 237531ba60f3..293675dbea10 100644 --- a/dri

[PATCH] staging: octeon-usb: octeon-hcd: fixed indent and ending with brace coding style issue

2020-12-21 Thread Anjandev Momi
Fixed coding style issues Signed-off-by: Anjandev Momi --- drivers/staging/octeon-usb/octeon-hcd.c | 96 - 1 file changed, 46 insertions(+), 50 deletions(-) diff --git a/drivers/staging/octeon-usb/octeon-hcd.c b/drivers/staging/octeon-usb/octeon-hcd.c index e2f8b6b67f75

Re: [PATCH -next] greybus/audio_helper: Add missing unlock to avoid mismatched lock

2020-12-21 Thread Johan Hovold
On Mon, Dec 21, 2020 at 09:02:46PM +0800, Zheng Yongjun wrote: > Fix a missing unlock in the error branch. > > Signed-off-by: Zheng Yongjun > --- > drivers/staging/greybus/audio_helper.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/staging/greybus/audio_helper.c > b/drivers

Re: [PATCH v2 01/48] dt-bindings: memory: tegra20: emc: Replace core regulator with power domain

2020-12-21 Thread Rob Herring
On Thu, 17 Dec 2020 21:05:51 +0300, Dmitry Osipenko wrote: > Power domain fits much better than a voltage regulator in regards to > a proper hardware description and from a software perspective as well. > Hence replace the core regulator with the power domain. Note that this > doesn't affect any ex

Re: [PATCH v2 02/48] dt-bindings: memory: tegra30: emc: Replace core regulator with power domain

2020-12-21 Thread Rob Herring
On Thu, Dec 17, 2020 at 09:05:52PM +0300, Dmitry Osipenko wrote: > Power domain fits much better than a voltage regulator in regards to > a proper hardware description and from a software perspective as well. > Hence replace the core regulator with the power domain. Note that this > doesn't affect

Re: [PATCH v2 04/48] dt-bindings: host1x: Document OPP and power domain properties

2020-12-21 Thread Rob Herring
On Thu, 17 Dec 2020 21:05:54 +0300, Dmitry Osipenko wrote: > Document new DVFS OPP table and power domain properties of the Host1x bus > and devices sitting on the bus. > > Signed-off-by: Dmitry Osipenko > --- > .../display/tegra/nvidia,tegra20-host1x.txt | 49 +++ > 1 file cha

Re: [PATCH v2 05/48] media: dt: bindings: tegra-vde: Document OPP and power domain properties

2020-12-21 Thread Rob Herring
On Thu, 17 Dec 2020 21:05:55 +0300, Dmitry Osipenko wrote: > Document new DVFS OPP table and power domain properties of the video > decoder engine. > > Signed-off-by: Dmitry Osipenko > --- > .../devicetree/bindings/media/nvidia,tegra-vde.txt | 12 > 1 file changed, 12 insertions(+

Re: [PATCH v2 06/48] dt-bindings: clock: tegra: Document clocks sub-node

2020-12-21 Thread Rob Herring
On Thu, Dec 17, 2020 at 09:05:56PM +0300, Dmitry Osipenko wrote: > Document "clocks" sub-node which describes Tegra SoC clocks that require > a higher voltage of the core power domain in order to operate properly on > a higher rates. Seems like an odd reason to have a bunch of child nodes. It very

Re: [PATCH v2 43/48] ARM: tegra: Add OPP tables and power domains to Tegra20 device-tree

2020-12-21 Thread Viresh Kumar
On 17-12-20, 21:06, Dmitry Osipenko wrote: > diff --git a/arch/arm/boot/dts/tegra20-peripherals-opp.dtsi > b/arch/arm/boot/dts/tegra20-peripherals-opp.dtsi > index b84afecea154..7e015cdfbc55 100644 > --- a/arch/arm/boot/dts/tegra20-peripherals-opp.dtsi > +++ b/arch/arm/boot/dts/tegra20-peripherals

Re: [PATCH v2 28/48] soc/tegra: Introduce core power domain driver

2020-12-21 Thread Viresh Kumar
On 17-12-20, 21:06, Dmitry Osipenko wrote: > +++ b/drivers/soc/tegra/core-power-domain.c > @@ -0,0 +1,125 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * NVIDIA Tegra SoC Core Power Domain Driver > + */ > + > +#include > +#include > +#include > +#include > +#include > + > +#include > +

Re: [PATCH v2 09/48] opp: Add dev_pm_opp_sync_regulators()

2020-12-21 Thread Viresh Kumar
On 17-12-20, 21:05, Dmitry Osipenko wrote: > Extend OPP API with dev_pm_opp_sync_regulators() function, which syncs > voltage state of regulators. > > Signed-off-by: Dmitry Osipenko We shouldn't be doing this, details in patch 28. -- viresh ___ devel

Re: [PATCH v2 10/48] opp: Add dev_pm_opp_set_voltage()

2020-12-21 Thread Viresh Kumar
On 17-12-20, 21:06, Dmitry Osipenko wrote: > Add dev_pm_opp_set_voltage() which allows OPP table users to set voltage > in accordance to a given OPP. In particular this is needed for driving > voltage of a generic power domain which uses OPPs and doesn't have a > clock. > > Signed-off-by: Dmitry O

Re: [PATCH v2 11/48] opp: Add dev_pm_opp_find_level_ceil()

2020-12-21 Thread Viresh Kumar
On 17-12-20, 21:06, Dmitry Osipenko wrote: > Add a ceil version of the dev_pm_opp_find_level(). It's handy to have if > levels don't start from 0 in OPP table and zero usually means a minimal > level. > > Signed-off-by: Dmitry Osipenko Why doesn't the exact version work for you here ? -- vires