Hi Christoph,
On Tue, Nov 03, 2020 at 10:55:38AM +0100, Christoph Hellwig wrote:
> Linux 5.10-rc1 switched from having a single dma offset in struct device
> to a set of DMA ranges, and introduced a new helper to set them,
> dma_direct_set_offset.
>
> This in fact surfaced that a bunch of drivers
On Wed, Nov 04, 2020 at 08:15:58AM +0100, Markus Elfring wrote:
> > Fixes: 14a638ab96c5 ("media: atomisp: use pin_user_pages() for memory
> > allocation")
>
> Please delete a line break for this tag.
Markus, the thing is that we all saw the line break and we just thought
it didn't matter at all..
On 2020-11-04 08:14, Maxime Ripard wrote:
Hi Christoph,
On Tue, Nov 03, 2020 at 10:55:38AM +0100, Christoph Hellwig wrote:
Linux 5.10-rc1 switched from having a single dma offset in struct device
to a set of DMA ranges, and introduced a new helper to set them,
dma_direct_set_offset.
This in fa
On Wed, Nov 04, 2020 at 10:15:49AM +, Robin Murphy wrote:
> How about having something in the platform code that keys off the top-level
> SoC compatible and uses a bus notifier to create offsets for the relevant
> devices if an MBUS description is missing? At least that way the workaround
>
Hi,
On Mon 26 Oct 20, 17:56, Maxime Ripard wrote:
> On Fri, Oct 23, 2020 at 07:45:43PM +0200, Paul Kocialkowski wrote:
> > This introduces YAML bindings documentation for the A83T MIPI CSI-2
> > controller.
> >
> > Signed-off-by: Paul Kocialkowski
>
> What is the difference with the a31/v3s one
>>> Fixes: 14a638ab96c5 ("media: atomisp: use pin_user_pages() for memory
>>> allocation")
>>
>> Please delete a line break for this tag.
>
> Markus, the thing is that we all saw the line break and we just thought
> it didn't matter at all...
Do you disagree to the known documentation then?
https:
Hi,
On Mon 26 Oct 20, 18:00, Maxime Ripard wrote:
> On Fri, Oct 23, 2020 at 07:45:44PM +0200, Paul Kocialkowski wrote:
> > The A83T supports MIPI CSI-2 with a composite controller, covering both the
> > protocol logic and the D-PHY implementation. This controller seems to be
> > found
> > on the
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne
---
Changes since v2:
- Use devm_rpi_firmware_get(), instead of remove function
drivers/clk/bcm/clk-raspberrypi.c | 2 +-
1 file changed, 1 inse
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne
---
Changes since v2:
- Use devm_rpi_firmware_get(), instead of remove function
drivers/soc/bcm/raspberrypi-power.c | 2 +-
1 file changed, 1 in
The aim of this series is to add support to the fan found on RPi's PoE
HAT. Some commentary on the design can be found below. But the imporant
part to the people CC'd here not involved with PWM is that, in order to
achieve this properly, we also have to fix the firmware interface the
driver uses to
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne
---
Changes since v2:
- Use devm_rpi_firmware_get(), instead of remove function
drivers/reset/reset-raspberrypi.c | 2 +-
1 file changed, 1 inse
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne
---
Changes since v2:
- Use devm_rpi_firmware_get(), instead of remove function
drivers/gpio/gpio-raspberrypi-exp.c | 2 +-
1 file changed, 1 in
This is an example on how to enable the fan on top of RPi's official PoE
hat.
Signed-off-by: Nicolas Saenz Julienne
---
Changes since v1:
- Update patch to use 2 pwm cells
arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 54 +++
1 file changed, 54 insertions(+)
diff --git a/a
The PWM bus controlling the fan in RPi's official PoE hat can only be
controlled by the board's co-processor.
Signed-off-by: Nicolas Saenz Julienne
Reviewed-by: Rob Herring
---
Changes since v1:
- Update bindings to use 2 #pwm-cells
.../arm/bcm/raspberrypi,bcm2835-firmware.yaml | 20 +++
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne
---
Changes since v2:
- Use devm_rpi_firmware_get(), instead of remove function
drivers/input/touchscreen/raspberrypi-ts.c | 2 +-
1 file change
There a no users left to the function as they all converted to
devm_rpi_firmware_get(). Just get rid of it.
Signed-off-by: Nicolas Saenz Julienne
---
drivers/firmware/raspberrypi.c | 17 -
include/soc/bcm2835/raspberrypi-firmware.h | 6 --
2 files changed, 23 del
Adds support to control the PWM bus available in official Raspberry Pi
PoE HAT. Only RPi's co-processor has access to it, so commands have to
be sent through RPi's firmware mailbox interface.
Signed-off-by: Nicolas Saenz Julienne
---
Changes since v2:
- Use devm_rpi_firmware_get()
- Rename dr
When unbinding the firmware device we need to make sure it has no
consumers left. Otherwise we'd leave them with a firmware handle
pointing at freed memory.
Keep a reference count of all consumers and introduce
devm_rpi_firmware_get() which will automatically decrease the reference
count upon unbi
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne
---
Changes since v2:
- Use devm_rpi_firmware_get(), instead of remove function
drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c |
Hi,
On Tue 27 Oct 20, 19:44, Maxime Ripard wrote:
> On Tue, Oct 27, 2020 at 10:52:21AM +0100, Paul Kocialkowski wrote:
> > Hi,
> >
> > On Mon 26 Oct 20, 17:14, Maxime Ripard wrote:
> > > i2c? :)
> >
> > Oops, good catch!
> >
> > > On Fri, Oct 23, 2020 at 07:45:39PM +0200, Paul Kocialkowski wro
On 02/11/2020 11:16, Ian Abbott wrote:
On 02/11/2020 10:25, Ian Abbott wrote:
On 29/10/2020 14:18, Ian Abbott wrote:
Commit eddd2a4c675c ("staging: comedi: cb_pcidas: refactor
write_calibration_bitstream()") inadvertently removed one of the
`udelay(1)` calls when writing to the calibration regi
Hi,
On Tue 27 Oct 20, 19:28, Maxime Ripard wrote:
>
> Hi,
>
> On Tue, Oct 27, 2020 at 10:23:26AM +0100, Paul Kocialkowski wrote:
> > On Mon 26 Oct 20, 16:38, Maxime Ripard wrote:
> > > On Fri, Oct 23, 2020 at 07:45:34PM +0200, Paul Kocialkowski wrote:
> > > > The Allwinner A31 D-PHY supports bot
Hi Helen and thanks for the review,
On Fri 30 Oct 20, 19:44, Helen Koike wrote:
> On 10/23/20 2:45 PM, Paul Kocialkowski wrote:
> > The Allwinner A31 D-PHY supports both Rx and Tx modes. While the latter
> > is already supported and used for MIPI DSI this adds support for the
> > former, to be use
Hi Helen,
On Fri 30 Oct 20, 19:45, Helen Koike wrote:
> Hi Paul,
>
> On 10/23/20 2:45 PM, Paul Kocialkowski wrote:
> > Both 10 and 12-bit Bayer formats are stored aligned as 16-bit values
> > in memory, not unaligned 10 or 12 bits.
> >
> > Since the current code for retreiving the bpp is used on
Hi Helen,
On Fri 30 Oct 20, 19:44, Helen Koike wrote:
> Hi Paul,
>
> I have some comments through the series, I hope this helps.
Thanks for your comments :)
> On 10/23/20 2:45 PM, Paul Kocialkowski wrote:
> > This series introduces support for MIPI CSI-2, with the A31 controller that
> > is
>
Hi again,
On Wed 04 Nov 20, 12:11, Paul Kocialkowski wrote:
> Hi Helen,
>
> On Fri 30 Oct 20, 19:44, Helen Koike wrote:
> > Hi Paul,
> >
> > I have some comments through the series, I hope this helps.
>
> Thanks for your comments :)
>
> > On 10/23/20 2:45 PM, Paul Kocialkowski wrote:
> > > Thi
Hi,
On Mon 02 Nov 20, 10:21, Maxime Ripard wrote:
> On Fri, Oct 30, 2020 at 07:45:18PM -0300, Helen Koike wrote:
> > On 10/23/20 2:45 PM, Paul Kocialkowski wrote:
> > > The A31 MIPI CSI-2 controller is a dedicated MIPI CSI-2 controller
> > > found on Allwinner SoCs such as the A31 and V3/V3s.
> >
Hi,
On Mon 26 Oct 20, 17:54, Maxime Ripard wrote:
> On Fri, Oct 23, 2020 at 07:45:40PM +0200, Paul Kocialkowski wrote:
> > The A31 MIPI CSI-2 controller is a dedicated MIPI CSI-2 controller
> > found on Allwinner SoCs such as the A31 and V3/V3s.
> >
> > It is a standalone block, connected to the
On 02/11/2020 15:18, Maxime Ripard wrote:
> On Mon, Nov 02, 2020 at 10:26:22PM +0800, Zhang Qilong wrote:
>> pm_runtime_get_sync will increment pm usage counter even it
>> failed. Forgetting to pm_runtime_put_noidle will result in
>> reference leak in cedrus_start_streaming. We should fix it.
>>
>>
On Wed, Nov 04, 2020 at 11:30:29AM +0100, Markus Elfring wrote:
> >>> Fixes: 14a638ab96c5 ("media: atomisp: use pin_user_pages() for memory
> >>> allocation")
> >>
> >> Please delete a line break for this tag.
> >
> > Markus, the thing is that we all saw the line break and we just thought
> > it di
On Wed, Nov 04, 2020 at 10:15:49AM +, Robin Murphy wrote:
> On 2020-11-04 08:14, Maxime Ripard wrote:
> > Hi Christoph,
> >
> > On Tue, Nov 03, 2020 at 10:55:38AM +0100, Christoph Hellwig wrote:
> > > Linux 5.10-rc1 switched from having a single dma offset in struct device
> > > to a set of DM
In the thread [1] Greg suggested that we move the driver
to the clk from the staging.
Add patches to address the concerns regarding the fractional and
set rate support in the TODO.
The patch set does the following
- Trivial fixes for kernel doc.
- Move the driver to the clk folder
- Add capabili
Add clocking wizard driver to clk.
And delete the driver from the staging as it is in drivers/clk.
Signed-off-by: Shubhrajyoti Datta
---
v7:
Combined the patch for deletion and add of the driver
dropping the ack from Greg for the staging as it is a combined patch.
Add vendor prefix to speedgrade
Add the devicetree binding for the xilinx clocking wizard.
Signed-off-by: Shubhrajyoti Datta
---
v6:
Fix a yaml warning
v7:
Add vendor prefix speed-grade
.../bindings/clock/xlnx,clocking-wizard.yaml | 65 ++
1 file changed, 65 insertions(+)
create mode 100644
Documen
Update the fixed factor clock registration to register the divisors.
Signed-off-by: Shubhrajyoti Datta
---
drivers/clk/clk-xlnx-clock-wizard.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/clk/clk-xlnx-clock-wizard.c
b/drivers/clk/clk-xlnx-clock-wizar
The number of output clocks are configurable in the hardware.
Currently the driver registers the maximum number of outputs.
Fix the same by registering only the outputs that are there.
Signed-off-by: Shubhrajyoti Datta
---
v4:
Assign output in this patch
drivers/clk/clk-xlnx-clock-wizard.c | 6
Currently the set rate granularity is to integral divisors.
Add support for the fractional divisors.
Only the first output0 is fractional in the hardware.
Signed-off-by: Shubhrajyoti Datta
---
v7:
Remove unnecessary comments
use mult_frac
use a common divisor function.
drivers/clk/clk-xlnx-clo
From: Jérôme Pouiller
I think the wfx driver is now mature enough to be accepted in the
drivers/net/wireless directory.
As requested by Kalle[1], I send one file per patch. At the end, all the
patches (or at least the patches 3 to 24) will be squashed (therefore, I
didn't bother to write real co
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/net/wireless/silabs/wfx/wfx.h | 166 ++
1 file changed, 166 insertions(+)
create mode 100644 drivers/net/wireless/silabs/wfx/wfx.h
diff --git a/drivers/net/wireless/silabs/wfx/wfx.h
b/drivers/net/wireles
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/net/wireless/silabs/wfx/main.c | 489 +
drivers/net/wireless/silabs/wfx/main.h | 44 +++
2 files changed, 533 insertions(+)
create mode 100644 drivers/net/wireless/silabs/wfx/main.c
create mode 100644 dr
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/net/wireless/silabs/wfx/bus_sdio.c | 258 +
1 file changed, 258 insertions(+)
create mode 100644 drivers/net/wireless/silabs/wfx/bus_sdio.c
diff --git a/drivers/net/wireless/silabs/wfx/bus_sdio.c
b/drivers/n
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/net/wireless/silabs/wfx/bus.h | 38 +++
1 file changed, 38 insertions(+)
create mode 100644 drivers/net/wireless/silabs/wfx/bus.h
diff --git a/drivers/net/wireless/silabs/wfx/bus.h
b/drivers/net/wireless
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/net/wireless/silabs/wfx/fwio.c | 405 +
drivers/net/wireless/silabs/wfx/fwio.h | 15 +
2 files changed, 420 insertions(+)
create mode 100644 drivers/net/wireless/silabs/wfx/fwio.c
create mode 100644 driv
From: Jérôme Pouiller
Add Silabs SDIO ID to sdio_ids.h.
Note that the values used by Silabs are uncommon. A driver cannot fully
rely on the SDIO PnP. It should also check if the device is declared in
the DT.
Signed-off-by: Jérôme Pouiller
---
include/linux/mmc/sdio_ids.h | 5 +
1 file cha
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/net/wireless/silabs/wfx/Kconfig | 8
drivers/net/wireless/silabs/wfx/Makefile | 25
2 files changed, 33 insertions(+)
create mode 100644 drivers/net/wireless/silabs/wfx/Kconfig
create mode 100
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
.../bindings/net/wireless/silabs,wfx.yaml | 131 ++
1 file changed, 131 insertions(+)
create mode 100644
Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
diff --git a/Documentation/devicetree/bindings/
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/net/wireless/silabs/wfx/bus_spi.c | 271 ++
1 file changed, 271 insertions(+)
create mode 100644 drivers/net/wireless/silabs/wfx/bus_spi.c
diff --git a/drivers/net/wireless/silabs/wfx/bus_spi.c
b/drivers/net
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/net/wireless/silabs/wfx/hwio.c | 352 +
drivers/net/wireless/silabs/wfx/hwio.h | 75 ++
2 files changed, 427 insertions(+)
create mode 100644 drivers/net/wireless/silabs/wfx/hwio.c
create mode 100644
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/net/wireless/silabs/wfx/traces.h | 501 +++
1 file changed, 501 insertions(+)
create mode 100644 drivers/net/wireless/silabs/wfx/traces.h
diff --git a/drivers/net/wireless/silabs/wfx/traces.h
b/drivers/net/w
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/net/wireless/silabs/wfx/hif_rx.c | 415 +++
drivers/net/wireless/silabs/wfx/hif_rx.h | 18 +
2 files changed, 433 insertions(+)
create mode 100644 drivers/net/wireless/silabs/wfx/hif_rx.c
create mode 100644
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/net/wireless/silabs/wfx/hif_api_cmd.h | 553 ++
.../net/wireless/silabs/wfx/hif_api_general.h | 267 +
drivers/net/wireless/silabs/wfx/hif_api_mib.h | 343 +++
3 files changed, 1163 insertions(+)
c
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/net/wireless/silabs/wfx/data_tx.c | 585 ++
drivers/net/wireless/silabs/wfx/data_tx.h | 67 +++
2 files changed, 652 insertions(+)
create mode 100644 drivers/net/wireless/silabs/wfx/data_tx.c
create mode 100
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/net/wireless/silabs/wfx/data_rx.c | 93 +++
drivers/net/wireless/silabs/wfx/data_rx.h | 18 +
2 files changed, 111 insertions(+)
create mode 100644 drivers/net/wireless/silabs/wfx/data_rx.c
create mode 10
From: Jérôme Pouiller
The wfx driver is now mature enough to leave the staging area.
Signed-off-by: Jérôme Pouiller
---
MAINTAINERS | 3 ++-
drivers/net/wireless/Kconfig | 1 +
drivers/net/wireless/Makefile| 1 +
drivers/net/wireless/silabs/Kconfig
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/net/wireless/silabs/wfx/debug.c | 359
drivers/net/wireless/silabs/wfx/debug.h | 19 ++
2 files changed, 378 insertions(+)
create mode 100644 drivers/net/wireless/silabs/wfx/debug.c
create mode 100644 d
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/net/wireless/silabs/wfx/hif_tx.c | 523 +++
drivers/net/wireless/silabs/wfx/hif_tx.h | 60 +++
drivers/net/wireless/silabs/wfx/hif_tx_mib.c | 324
drivers/net/wireless/silabs/wfx/hif_tx_mib.h
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/net/wireless/silabs/wfx/queue.c | 304
drivers/net/wireless/silabs/wfx/queue.h | 45
2 files changed, 349 insertions(+)
create mode 100644 drivers/net/wireless/silabs/wfx/queue.c
create mode 100644
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/net/wireless/silabs/wfx/key.c | 241 ++
drivers/net/wireless/silabs/wfx/key.h | 20 +++
2 files changed, 261 insertions(+)
create mode 100644 drivers/net/wireless/silabs/wfx/key.c
create mode 100644 driv
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/net/wireless/silabs/wfx/bh.c | 333 +++
drivers/net/wireless/silabs/wfx/bh.h | 33 +++
2 files changed, 366 insertions(+)
create mode 100644 drivers/net/wireless/silabs/wfx/bh.c
create mode 100644 driver
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/net/wireless/silabs/wfx/scan.c | 132 +
drivers/net/wireless/silabs/wfx/scan.h | 22 +
2 files changed, 154 insertions(+)
create mode 100644 drivers/net/wireless/silabs/wfx/scan.c
create mode 100644
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/net/wireless/silabs/wfx/sta.c | 807 ++
drivers/net/wireless/silabs/wfx/sta.h | 73 +++
2 files changed, 880 insertions(+)
create mode 100644 drivers/net/wireless/silabs/wfx/sta.c
create mode 100644 driv
Hi Paul,
On 11/4/20 8:11 AM, Paul Kocialkowski wrote:
> Hi Helen,
>
> On Fri 30 Oct 20, 19:44, Helen Koike wrote:
>> Hi Paul,
>>
>> I have some comments through the series, I hope this helps.
>
> Thanks for your comments :)
>
>> On 10/23/20 2:45 PM, Paul Kocialkowski wrote:
>>> This series intr
On 11/4/20 8:17 AM, Paul Kocialkowski wrote:
> Hi,
>
> On Mon 02 Nov 20, 10:21, Maxime Ripard wrote:
>> On Fri, Oct 30, 2020 at 07:45:18PM -0300, Helen Koike wrote:
>>> On 10/23/20 2:45 PM, Paul Kocialkowski wrote:
The A31 MIPI CSI-2 controller is a dedicated MIPI CSI-2 controller
fou
The patch adds support for dynamic reconfiguration of clock output rate.
Output clocks are registered as dividers and set rate callback function
is used for dynamic reconfiguration.
Based on the initial work from Chirag.
Signed-off-by: Chirag Parekh
Signed-off-by: Shubhrajyoti Datta
---
v6:
Rem
Update description for the clocking wizard structure
Signed-off-by: Shubhrajyoti Datta
---
drivers/clk/clk-xlnx-clock-wizard.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/clk-xlnx-clock-wizard.c
b/drivers/clk/clk-xlnx-clock-wizard.c
index 1bab68e..fb2d555 1
This patch makes use of the swab16() and swab32() functions available
in the kernel instead of using own implementations.
Signed-off-by: Christian Gromm
---
drivers/staging/most/sound/sound.c | 14 ++
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/drivers/staging/most
This patch makes use of the swab16() and swab32() functions available
in the kernel instead of using own implementations.
Signed-off-by: Christian Gromm
Reported-by: Greg Kroah-Hartman
---
v2: added 'Reported-by:' tag
drivers/staging/most/sound/sound.c | 14 ++
1 file changed, 2 in
On Wed, Nov 04, 2020 at 11:48:27AM +0100, Paul Kocialkowski wrote:
> Hi,
>
> On Tue 27 Oct 20, 19:44, Maxime Ripard wrote:
> > On Tue, Oct 27, 2020 at 10:52:21AM +0100, Paul Kocialkowski wrote:
> > > Hi,
> > >
> > > On Mon 26 Oct 20, 17:14, Maxime Ripard wrote:
> > > > i2c? :)
> > >
> > > Oops,
When DMA_RALINK is enabled and DMADEVICES is disabled, it results in the
following Kbuild warnings:
WARNING: unmet direct dependencies detected for DMA_ENGINE
Depends on [n]: DMADEVICES [=n]
Selected by [y]:
- DMA_RALINK [=y] && STAGING [=y] && RALINK [=y] && !SOC_RT288X [=n]
WARNING: unmet
On Wed, Nov 04, 2020 at 01:38:08PM -0300, Helen Koike wrote:
>
>
> On 11/4/20 8:17 AM, Paul Kocialkowski wrote:
> > Hi,
> >
> > On Mon 02 Nov 20, 10:21, Maxime Ripard wrote:
> >> On Fri, Oct 30, 2020 at 07:45:18PM -0300, Helen Koike wrote:
> >>> On 10/23/20 2:45 PM, Paul Kocialkowski wrote:
> >>
On Wed, Nov 04, 2020 at 12:34:58PM +0100, Paul Kocialkowski wrote:
> > > + regmap_write(regmap, SUN6I_MIPI_CSI2_CFG_REG,
> > > + SUN6I_MIPI_CSI2_CFG_CHANNEL_MODE(1) |
> > > + SUN6I_MIPI_CSI2_CFG_LANE_COUNT(lanes_count));
> >
> > It's not really clear what the channel is h
On Wed, 04 Nov 2020 11:39:35 +0100, Nicolas Saenz Julienne wrote:
> The PWM bus controlling the fan in RPi's official PoE hat can only be
> controlled by the board's co-processor.
>
> Signed-off-by: Nicolas Saenz Julienne
> Reviewed-by: Rob Herring
>
> ---
>
> Changes since v1:
> - Update bin
On Wed, 04 Nov 2020 20:36:41 +0530, Shubhrajyoti Datta wrote:
> Add the devicetree binding for the xilinx clocking wizard.
>
> Signed-off-by: Shubhrajyoti Datta
> ---
> v6:
> Fix a yaml warning
> v7:
> Add vendor prefix speed-grade
>
> .../bindings/clock/xlnx,clocking-wizard.yaml | 65
>
On Wed, Nov 04, 2020 at 08:36:41PM +0530, Shubhrajyoti Datta wrote:
> Add the devicetree binding for the xilinx clocking wizard.
>
> Signed-off-by: Shubhrajyoti Datta
> ---
> v6:
> Fix a yaml warning
> v7:
> Add vendor prefix speed-grade
>
> .../bindings/clock/xlnx,clocking-wizard.yaml |
On Wed, 04 Nov 2020 16:51:45 +0100, Jerome Pouiller wrote:
> From: Jérôme Pouiller
>
> Signed-off-by: Jérôme Pouiller
> ---
> .../bindings/net/wireless/silabs,wfx.yaml | 131 ++
> 1 file changed, 131 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/ne
On Wed, 2020-11-04 at 13:06 -0600, Rob Herring wrote:
> On Wed, 04 Nov 2020 11:39:35 +0100, Nicolas Saenz Julienne wrote:
> > The PWM bus controlling the fan in RPi's official PoE hat can only be
> > controlled by the board's co-processor.
> >
> > Signed-off-by: Nicolas Saenz Julienne
> > Reviewe
>> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/submitting-patches.rst?id=4ef8451b332662d004df269d4cdeb7d9f31419b5#n123
>
> The documentation is correct but no one wants you to constantly be
> nagging developers about minor stuff...
Would you interp
On Sat, 31 Oct 2020 13:22:43 +0100, Sergio Paracuellos wrote:
> Add bindings to describe Mediatek MT7621 PCIe PHY.
>
> Signed-off-by: Sergio Paracuellos
> ---
> .../bindings/phy/mediatek,mt7621-pci-phy.yaml | 36 +++
> 1 file changed, 36 insertions(+)
> create mode 100644
> Doc
allnoconfig
i386 randconfig-a004-20201104
i386 randconfig-a006-20201104
i386 randconfig-a005-20201104
i386 randconfig-a001-20201104
i386 randconfig-a002-20201104
i386 randconfig
Downscale of the CORE voltage isn't allowed because some hardware units,
which are supplied by the CORE regulator, usually left ON at a boot time.
The new sync state API resolves this problem for us. All drivers of the
devices that are known to be ON at a boot time now should sync theirs
state. Onc
Document new DVFS OPP table and voltage regulator properties of the
SDHCI controller.
Signed-off-by: Dmitry Osipenko
---
.../devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt | 12
1 file changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdh
Document new DVFS OPP table and voltage regulator properties of the
PWM controller.
Signed-off-by: Dmitry Osipenko
---
.../devicetree/bindings/pwm/nvidia,tegra20-pwm.txt | 13 +
1 file changed, 13 insertions(+)
diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.t
Document new OPP table and NVIDIA Tegra-specific voltage regulator
properties.
Signed-off-by: Dmitry Osipenko
---
Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
b/Documentation
Document new DVFS OPP table and voltage regulator properties of the
Tegra EHCI controller.
Signed-off-by: Dmitry Osipenko
---
Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-e
Introduce core voltage scaling for NVIDIA Tegra20/30 SoCs, which reduces
power consumption and heating of the Tegra chips. Tegra SoC has multiple
hardware units which belong to a core power domain of the SoC and share
the core voltage. The voltage must be selected in accordance to a minimum
require
Document new DVFS OPP table and voltage regulator properties of the
Host1x bus and devices sitting on the bus.
Signed-off-by: Dmitry Osipenko
---
.../display/tegra/nvidia,tegra20-host1x.txt | 56 +++
1 file changed, 56 insertions(+)
diff --git
a/Documentation/devicetree/bindi
Add OPP and SoC core voltage scaling support to the display controller
driver. This is required for enabling system-wide DVFS on older Tegra
SoCs.
Tested-by: Peter Geis
Tested-by: Nicolas Chauvet
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/Kconfig | 1 +
drivers/gpu/drm/tegra/dc
Document new DVFS OPP table and voltage regulator properties of the
video decoder engine.
Signed-off-by: Dmitry Osipenko
---
.../devicetree/bindings/media/nvidia,tegra-vde.txt | 12
1 file changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/nvidia,tegra
Sync driver state using the Tegra SoC device state syncing API, telling
to regulators voltage coupler that EMC state is ready for DVFS. This is
required for enabling system-wide DVFS on Tegra20.
Tested-by: Nicolas Chauvet
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/tegra20-emc.c | 8
The device-tree compatibles are swapped in the code, correct them.
Tested-by: Peter Geis
Tested-by: Nicolas Chauvet
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/gr2d.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/tegra/gr2d.c b/drivers/gpu
Add OPP and SoC core voltage scaling support to the Tegra SDHCI driver.
This is required for enabling system-wide DVFS on older Tegra SoCs.
Tested-by: Peter Geis
Tested-by: Nicolas Chauvet
Signed-off-by: Dmitry Osipenko
---
drivers/mmc/host/Kconfig | 1 +
drivers/mmc/host/sdhci-tegra.c
Add OPP tables for Tegra30 SoC devices.
Signed-off-by: Dmitry Osipenko
---
.../arm/boot/dts/tegra30-peripherals-opp.dtsi | 415 ++
arch/arm/boot/dts/tegra30.dtsi| 13 +
2 files changed, 428 insertions(+)
diff --git a/arch/arm/boot/dts/tegra30-peripherals-opp.dts
Add voltage supplies to DVFS-capable devices in order to enable
system-wide voltage scaling and allow CORE/RTC regulators to go lower.
Tested-by: Nicolas Chauvet
Signed-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra20-paz00.dts | 40 -
1 file changed, 33 inserti
Add option which allows regulator_check_consumers() to skip accounting of
a disabled consumer regulators.
This new option is needed for the NVIDIA Tegra voltage couplers in order
to properly calculate a lowest possible voltage for the CORE regulator.
The requirements of a disabled consumer regulat
Introduce sync state API that will be used by Tegra device drivers. This
new API is primarily needed for syncing state of SoC devices that are left
ON after bootloader or permanently enabled. All these devices belong to a
shared CORE voltage domain, and thus, we needed to bring all the devices
into
Add OPP tables for Tegra20 SoC devices.
Signed-off-by: Dmitry Osipenko
---
.../arm/boot/dts/tegra20-peripherals-opp.dtsi | 386 ++
arch/arm/boot/dts/tegra20.dtsi| 14 +
2 files changed, 400 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20-peripherals-opp.dts
Add initial OPP and SoC core voltage scaling support to the video
decoder driver. This is required for enabling system-wide DVFS on
older Tegra SoCs.
Tested-by: Peter Geis
Tested-by: Nicolas Chauvet
Signed-off-by: Dmitry Osipenko
---
drivers/staging/media/tegra-vde/Kconfig | 1 +
drivers/sta
Add initial OPP and SoC core voltage scaling support to the Tegra EHCI
driver. This is required for enabling system-wide DVFS on older Tegra
SoCs.
Tested-by: Peter Geis
Tested-by: Nicolas Chauvet
Signed-off-by: Dmitry Osipenko
---
drivers/usb/host/Kconfig | 1 +
drivers/usb/host/ehci-teg
Add voltage supplies to DVFS-capable devices in order to enable
system-wide voltage scaling.
Signed-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra30-cardhu-a04.dts | 44
1 file changed, 44 insertions(+)
diff --git a/arch/arm/boot/dts/tegra30-cardhu-a04.dts
b/arch/
Add OPP and SoC core voltage scaling support to the GR3D driver.
This is required for enabling system-wide DVFS on Tegra SoCs.
Tested-by: Peter Geis
Tested-by: Nicolas Chauvet
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/gr3d.c | 136 +++
1 file chan
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