Hi,
On Wed 02 Dec 20, 16:48, Maxime Ripard wrote:
> On Wed, Dec 02, 2020 at 03:44:47PM +0100, Paul Kocialkowski wrote:
> > > > +static int __maybe_unused sun6i_mipi_csi2_suspend(struct device *dev)
> > > > +{
> > > > + struct sun6i_mipi_csi2_dev *cdev = dev_get_drvdata(dev);
> > > > +
> > >
On Wed, Dec 02, 2020 at 03:44:47PM +0100, Paul Kocialkowski wrote:
> > > +static int __maybe_unused sun6i_mipi_csi2_suspend(struct device *dev)
> > > +{
> > > + struct sun6i_mipi_csi2_dev *cdev = dev_get_drvdata(dev);
> > > +
> > > + clk_disable_unprepare(cdev->clk_mod);
> > > + clk_disable_unprepa
Hi,
On Tue 01 Dec 20, 13:20, Maxime Ripard wrote:
> Hi,
>
> On Sat, Nov 28, 2020 at 03:28:33PM +0100, Paul Kocialkowski wrote:
> > The A31 MIPI CSI-2 controller is a dedicated MIPI CSI-2 bridge
> > found on Allwinner SoCs such as the A31 and V3/V3s.
> >
> > It is a standalone block, connected to
Hi,
On Sat, Nov 28, 2020 at 03:28:33PM +0100, Paul Kocialkowski wrote:
> The A31 MIPI CSI-2 controller is a dedicated MIPI CSI-2 bridge
> found on Allwinner SoCs such as the A31 and V3/V3s.
>
> It is a standalone block, connected to the CSI controller on one side
> and to the MIPI D-PHY block on
