Re: [RFC PATCH v5] Xilinx AXI-Stream FIFO v4.1 IP core

On Wed, Aug 01, 2018 at 11:52:39AM +0300, Dan Carpenter wrote: > The README is empty... It should say what changes are needed to get > this out of staging. > > regards, > dan carpenter > Right :) It's ready as far as I'm concerned. Best, Jacob ___

Re: [RFC PATCH v5] Xilinx AXI-Stream FIFO v4.1 IP core

The README is empty... It should say what changes are needed to get this out of staging. regards, dan carpenter ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel

Re: [RFC PATCH v5] Xilinx AXI-Stream FIFO v4.1 IP core

On Sun, Jul 22, 2018 at 09:27:37PM -0400, Jacob Feder wrote: > This IP core has read and write AXI-Stream FIFOs, the contents of which can > be accessed from the AXI4 memory-mapped interface. This is useful for > transferring data from a processor into the FPGA fabric. The driver creates > a charac

[RFC PATCH v5] Xilinx AXI-Stream FIFO v4.1 IP core

This IP core has read and write AXI-Stream FIFOs, the contents of which can be accessed from the AXI4 memory-mapped interface. This is useful for transferring data from a processor into the FPGA fabric. The driver creates a character device that can be read/written to with standard open/read/write/