Sounds good.
regards,
dan carpenter
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On Mi, 2017-10-04 at 10:59 +0300, Dan Carpenter wrote:
> On Wed, Oct 04, 2017 at 07:24:49AM +, Stahl, Manuel wrote:
> > Hi Dan. Thanks for your comments. I can fix all of those.
> > Probably there is also some upgrade needed for the MSI stuff.
> > pci_disable_msi() is not there anymore, so I ha
On Wed, Oct 04, 2017 at 07:24:49AM +, Stahl, Manuel wrote:
> Hi Dan. Thanks for your comments. I can fix all of those.
> Probably there is also some upgrade needed for the MSI stuff.
> pci_disable_msi() is not there anymore, so I have to use
> pci_alloc_irq_vectors(). Doing tests with my PCIe H
Hi Dan. Thanks for your comments. I can fix all of those.
Probably there is also some upgrade needed for the MSI stuff.
pci_disable_msi() is not there anymore, so I have to use
pci_alloc_irq_vectors(). Doing tests with my PCIe HW I had some
problems with masking the legacy IRQs. Probably uio_pci_ge
Looks good. A couple minor comments below.
On Mon, Oct 02, 2017 at 03:02:09PM +, Stahl, Manuel wrote:
> +static int open(struct uio_info *info, struct inode *inode)
> +{
> + struct uio_pci_dmem_dev *priv = to_uio_pci_dmem_dev(info);
> + struct uio_mem *uiomem;
> + int ret = 0;
> +
This device combines the uio_pci_generic driver and the uio_dmem_genirq
driver since PCI uses a slightly different API for interrupts.
A fixed number of DMA capable memory regions can be defined using the
module parameter "dmem_sizes". The memory is not allocated until the uio
device file is opened
