On 2019-10-03 20:12, Michael Kelley wrote:
Add ARM64-specific code to allocate memory with HV_HYP_PAGE_SIZE
size and alignment. These are for use when pages need to be shared
with Hyper-V. Separate functions are needed as the page size used
by Hyper-V may not be the same as the guest page size.
On 2019-11-06 19:08, Michael Kelley wrote:
From: Marc Zyngier Sent: Wednesday, November 6,
2019 2:20 AM
On 2019-10-03 20:12, Michael Kelley wrote:
> Add ARM64-specific code to make Hyper-V hypercalls and to
> access virtual processor synthetic registers via hypercalls.
> Hyperca
On 2019-10-03 20:12, Michael Kelley wrote:
Add ARM64-specific code to make Hyper-V hypercalls and to
access virtual processor synthetic registers via hypercalls.
Hypercalls use a Hyper-V specific calling sequence with a non-zero
immediate value per Section 2.9 of the SMC Calling Convention
spec.
Hi Michael,
On 12/12/2018 05:00, Michael Kelley wrote:
> From: Marc Zyngier Sent: Friday, December 7, 2018
> 6:43 AM
>
>>> Add ARM64-specific code to enable Hyper-V. This code includes:
>>> * Detecting Hyper-V and initializing the guest/Hyper-V interface
>>&
On 22/11/2018 03:10, k...@linuxonhyperv.com wrote:
> From: Michael Kelley
>
> Add ARM64-specific code to enable Hyper-V. This code includes:
> * Detecting Hyper-V and initializing the guest/Hyper-V interface
> * Setting up Hyper-V's synthetic clocks
> * Making hypercalls using the HVC instruction
o #include updates]
> Signed-off-by: Laurentiu Tudor
> [rebased, split irqchip to separate patch]
> Signed-off-by: Bogdan Purcareata
> Cc: Thomas Gleixner
> Cc: Jason Cooper
> Cc: Marc Zyngier
> ---
> Notes:
> -v5:
> - split irqchip glue code to separate pa
>
> Signed-off-by: Stuart Yoder
> Signed-off-by: Laurentiu Tudor
> [Laurentiu: rebased, add dpaa2_eth and dpio #include updates]
> Cc: Thomas Gleixner
> Cc: Jason Cooper
> Cc: Marc Zyngier
[...]
> diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
> in
>
> Signed-off-by: Stuart Yoder
> Signed-off-by: Laurentiu Tudor
> [Laurentiu: rebased, add dpaa2_eth and dpio #include updates]
> Cc: Thomas Gleixner
> Cc: Jason Cooper
> Cc: Marc Zyngier
> ---
>
> Notes:
> -no changes since v4
> -v4
> -re
On 22/05/17 09:42, Laurentiu Tudor wrote:
> Hi Marc,
>
>> -Original Message-----
>> From: Marc Zyngier [mailto:marc.zyng...@arm.com]
>> Sent: Monday, May 22, 2017 10:41 AM
>>
>> On Mon, May 22 2017 at 7:12:39 am GMT, Laurentiu Tudor
>>
On Mon, May 22 2017 at 7:12:39 am GMT, Laurentiu Tudor
wrote:
Hi Laurentiu,
> Hi Marc,
>
>> -Original Message-----
>> From: Marc Zyngier [mailto:marc.zyng...@arm.com]
>> Sent: Saturday, May 20, 2017 9:43 AM
>> To: Matthias Brugger
>> Cc: Laurenti
On Fri, May 19 2017 at 02:41:43 PM, Matthias Brugger
wrote:
> On 19/05/17 15:13, laurentiu.tu...@nxp.com wrote:
>> From: Stuart Yoder
>>
>> Move the source files out of staging into their final locations:
>>-include files in drivers/staging/fsl-mc/include go to include/linux/fsl
>>-irq-g
On 13/04/16 12:23, Matthias Brugger wrote:
>
>
> On 13/04/16 12:56, Marc Zyngier wrote:
>> On 13/04/16 11:30, Matthias Brugger wrote:
>>> From: Matthias Brugger
>>>
>>> The fsl-mc driver can't be build as a module because it uses msi_*
>
On 13/04/16 11:30, Matthias Brugger wrote:
> From: Matthias Brugger
>
> The fsl-mc driver can't be build as a module because it uses msi_*
> functions directly. Port the driver to use the platform_msi_*
> infrastructure instead, to allow it to be build as a module.
>
> Signed-off-by: Matthias Br
On 03/02/16 18:51, Bjorn Helgaas wrote:
> On Wed, Feb 03, 2016 at 06:32:20PM +, Jake Oshins wrote:
>>> -Original Message-
>>> From: Bjorn Helgaas [mailto:helg...@kernel.org]
>>> Sent: Wednesday, February 3, 2016 10:25 AM
>>> To: Jake Oshins
>>> Cc: gre...@linuxfoundation.org; KY Sriniv
i.h
> +++ b/include/linux/pci.h
> @@ -1517,6 +1517,10 @@ static inline int pci_get_new_domain_nr(void) { return
> -ENOSYS; }
>
> #include
>
> +#ifndef pci_root_bus_fwnode
> +#define pci_root_bus_fwnode(bus) ((void)(bus), NULL)
> +#endif
>
; the notion of an IRQ domain for Message-Signaled Interrupts (MSI) from
> PCI Express devices. This patch exposes the functions which are
> necessary for making an MSI IRQ domain within a module.
>
> Signed-off-by: Jake Oshins
Reviewed-by: Marc Zyngier
M.
--
Jazz is
tching_fwnode(fwnode,
> + DOMAIN_BUS_PCI_MSI);
> + }
> +#endif
> +
> return d;
> }
>
>
Reviewed-by: Marc Zyngier
M.
--
Jazz is not dead. It just smells funny...
_
On 09/12/15 16:54, Jake Oshins wrote:
>> -Original Message-
>> From: Marc Zyngier [mailto:marc.zyng...@arm.com]
>> Sent: Wednesday, December 9, 2015 8:51 AM
>> To: Jake Oshins ; gre...@linuxfoundation.org; KY
>> Srinivasan ; linux-ker...@vger.kernel.org;
>
On 05/12/15 00:36, ja...@microsoft.com wrote:
> From: Jake Oshins
>
> This patch adds an fwnode_handle to struct pci_sysdata, which is
> used by the next patch in the series when trying to locate an
> IRQ domain associated with a root PCI bus.
>
> Signed-off-by: Jake Oshins
> ---
> arch/x86/in
-
> CHANGE HISTORY
>
> Changes in v3:
> - Addressed comments from Marc Zyngier:
> * Added WARN_ON in fsl_mc_msi_set_desc to check that caller does
> not set set_desc
> * Changed type of paddr in irq_cfg to be phys_addr_t
> * Added WARN_ON in fsl_mc_msi_update_chip_op
On 24/11/15 22:31, J. German Rivera wrote:
> FSL-MC is a bus type different from PCI and platform, so it needs
> its own member in the msi_desc's union.
>
> Signed-off-by: J. German Rivera
Acked-by: Marc Zyngier
M.
--
Jazz is not dead. It
On 24/11/15 22:31, J. German Rivera wrote:
> Since an FSL-MC bus is a new bus type that is neither PCI nor
> PLATFORM, we need a new domain bus token to disambiguate the
> IRQ domain for FSL-MC MSIs.
>
> Signed-off-by: J. German Rivera
Acked-by: Marc Zyngier
M.
--
J
On 24/11/15 22:31, J. German Rivera wrote:
> Added platform-specific MSI support layer for FSL-MC devices.
>
> Signed-off-by: J. German Rivera
> ---
> CHANGE HISTORY
>
> Changes in v3: none
>
> Changes in v2: none
>
> drivers/staging/fsl-mc/bus/Makefile| 1 +
> .../staging/f
On 06/11/15 23:20, Jose Rivera wrote:
[...]
>>> +static void __fsl_mc_msi_write_msg(struct fsl_mc_device *mc_bus_dev,
>>> + struct fsl_mc_device_irq *mc_dev_irq) {
>>> + int error;
>>> + struct fsl_mc_device *owner_mc_dev = mc_dev_irq->mc_dev;
>>> + struct msi_d
On 30/10/15 19:43, J. German Rivera wrote:
> Created an MSI domain for the fsl-mc bus-- including functions
> to create a domain, find a domain, alloc/free domain irqs, and
> bus specific overrides for domain and irq_chip ops.
>
> Signed-off-by: J. German Rivera
> ---
> Changes in v2: none
>
>
On 14/09/15 18:59, Jake Oshins wrote:
>> -Original Message-
>> From: Marc Zyngier [mailto:marc.zyng...@arm.com]
>> Sent: Monday, September 14, 2015 8:01 AM
>> To: Jake Oshins ; gre...@linuxfoundation.org; KY
>> Srinivasan ; linux-ker...@vger.kernel.org;
>
Hi Jake,
In the future, please CC me on anything that touches irqdomains, along
with Jiang Liu as we both co-maintain this piece of code.
On 11/09/15 01:00, ja...@microsoft.com wrote:
> From: Jake Oshins
>
> The patch series updates the one sent about a month ago in three ways. It
> integrated
Hi Geert,
On 2015-04-03 13:41, Geert Uytterhoeven wrote:
Hi all,
This RFC patch series adds board staging support for
r8a7740/armadillo.
For now this supports only the frame buffer device for the on-board
LCD.
The goal is to complete the move to ARM multiplatform kernels for all
shmobile pla
On 2015-04-03 13:42, Geert Uytterhoeven wrote:
As of commit 9a1091ef0017c40a ("irqchip: gic: Support hierarchy irq
domain."), GIC IRQ numbers are virtual, breaking hardcoded hardware
IRQ
numbers in platform device resources.
Add support for translating hardware IRQ numbers to virtual IRQ
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