On 2015/11/3 5:33, ja...@microsoft.com wrote:
> From: Jake Oshins
>
> This patch adds an fwnode_handle to struct pci_sysdata, which is
> used by the next patch in the series when trying to locate an
> IRQ domain associated with a root PCI bus.
>
> Signed-off-by: Jake Oshins
> ---
> arch/x86/in
On 2015/11/3 5:33, ja...@microsoft.com wrote:
> From: Jake Oshins
>
> This patch introduces a new driver which exposes a root PCI bus whenever a PCI
> Express device is passed through to a guest VM under Hyper-V. The device can
> be single- or multi-function. The interrupts for the devices are ma
On 2015/10/31 3:43, J. German Rivera wrote:
> FSL-MC is a bus type different from PCI and platform, so it needs
> its own member in the msi_desc's union.
>
> Signed-off-by: J. German Rivera
> ---
> Changes in v2:
> - Addressed comment from Jiang Liu
> * Added a d
rq_domain_bus_token {
> DOMAIN_BUS_PCI_MSI,
> DOMAIN_BUS_PLATFORM_MSI,
> DOMAIN_BUS_NEXUS,
> + DOMAIN_BUS_FSL_MC_MSI,
> };
Reviewed-by: Jiang Liu
>
> /**
> --
> 2.3.3
>
___
devel mailing list
de...@linuxdriver
On 2015/10/30 7:46, ja...@microsoft.com wrote:
> From: Jake Oshins
>
> This patch adds an fwnode_handle to struct pci_sysdata, which is
> used by the next patch in the series when trying to locate an
> IRQ domain associated with a root PCI bus.
>
> Signed-off-by: Jake Oshins
> ---
> arch/x86
On 2015/10/28 4:38, Jake Oshins wrote:
>> -Original Message-
>> From: Jiang Liu [mailto:jiang@linux.intel.com]
>> Sent: Tuesday, October 27, 2015 12:11 AM
>> To: Jake Oshins ; gre...@linuxfoundation.org; KY
>> Srinivasan ; linux-ker...@vger.kernel.org;
&
On 2015/10/26 23:49, J. German Rivera wrote:
> Created an MSI domain for the fsl-mc bus-- including functions
> to create a domain, find a domain, alloc/free domain irqs, and
> bus specific overrides for domain and irq_chip ops.
>
> Signed-off-by: J. German Rivera
> ---
> drivers/staging/fsl-mc/
On 2015/10/27 7:15, ja...@microsoft.com wrote:
> From: Jake Oshins
>
> This patch introduces a new driver which exposes a root PCI bus whenever a PCI
> Express device is passed through to a guest VM under Hyper-V. The device can
> be single- or multi-function. The interrupts for the devices are m
On 2015/10/27 7:15, ja...@microsoft.com wrote:
> From: Jake Oshins
>
> This patch allows a PCI front-end implementation to supply an fwnode_handle
> associated with a root PCI bus, optionally. If supplied, the PCI driver
> records this.
>
> This patch supports the next patch in the series, whic
On 2015/10/27 7:15, ja...@microsoft.com wrote:
> From: Jake Oshins
>
> The existing PCI code looks for an IRQ domain associated with a root PCI bus
> by looking in the Open Firmware tree. This patch introduces a second way
> to identify the associated IRQ domain, if the lookup in the OF tree f
Build tests are passed with defconfig/allnoconfig/allyesconfig and
defconfig+CONFIG_ACPI=n.
Original-by: Thomas Gleixner
Original-by: Jiang Liu
Signed-off-by: Lv Zheng
Signed-off-by: Jiang Liu
---
arch/ia64/kernel/acpi-ext.c |6 ++--
arch/ia64/pci/pci.c | 14
Build tests are passed with defconfig/allnoconfig/allyesconfig and
defconfig+CONFIG_ACPI=n.
Original-by: Thomas Gleixner
Original-by: Jiang Liu
Signed-off-by: Lv Zheng
Signed-off-by: Jiang Liu
---
arch/ia64/kernel/acpi-ext.c |6 ++--
arch/ia64/pci/pci.c | 14
Build tests are passed with defconfig/allnoconfig/allyesconfig and
defconfig+CONFIG_ACPI=n.
Original-by: Thomas Gleixner
Original-by: Jiang Liu
Signed-off-by: Lv Zheng
Signed-off-by: Jiang Liu
---
arch/ia64/kernel/acpi-ext.c |6 ++--
arch/ia64/pci/pci.c | 14
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