On Tue, Oct 15, 2019 at 04:19:55PM +0300, Dan Carpenter wrote:
> On Tue, Oct 15, 2019 at 01:24:50PM +0200, Alexander Gordeev wrote:
> > On Thu, Oct 10, 2019 at 02:30:34PM +0300, Dan Carpenter wrote:
> > > On Thu, Oct 10, 2019 at 10:51:45AM +0200, Alexander Gordeev wrote:
>
On Tue, Oct 15, 2019 at 04:03:21PM +0530, Vinod Koul wrote:
> what kind of device is this? I dont think we want these and the ones
> coming below as part of kernel kconfig!
Yes, I have already been pointed out on this and will put those as
kernel module parameters in the next version. The device i
On Tue, Oct 15, 2019 at 02:41:08PM +0300, Dan Carpenter wrote:
> > > > > > > > + spin_lock(lock);
> >
> > [*]
>
> [ snip ]
>
> > I struggle to realize how the spinlock I use (see [*] above) does not
> > protect the reader.
>
> Argh I'm really sorry. I completely didn't see the spinl
On Thu, Oct 10, 2019 at 02:30:34PM +0300, Dan Carpenter wrote:
> On Thu, Oct 10, 2019 at 10:51:45AM +0200, Alexander Gordeev wrote:
> > On Wed, Oct 09, 2019 at 09:53:23PM +0300, Dan Carpenter wrote:
> > > > > > + u32 *rd_flags = hw->dma_desc_table_rd.cpu_ad
On Wed, Oct 09, 2019 at 09:53:23PM +0300, Dan Carpenter wrote:
> > > > + u32 *rd_flags = hw->dma_desc_table_rd.cpu_addr->flags;
> > > > + u32 *wr_flags = hw->dma_desc_table_wr.cpu_addr->flags;
> > > > + struct avalon_dma_desc *desc;
> > > > + struct virt_dma_desc *vdesc;
> >
On Wed, Oct 09, 2019 at 03:14:41PM +0300, Dan Carpenter wrote:
> > +config AVALON_DMA_PCI_VENDOR_ID
> > + hex "PCI vendor ID"
> > + default "0x1172"
> > +
> > +config AVALON_DMA_PCI_DEVICE_ID
> > + hex "PCI device ID"
> > + default "0xe003"
>
> This feels wrong. Why isn't it known in adva
On Thu, Sep 19, 2019 at 01:37:08PM +0200, Greg KH wrote:
> Why is this being submitted for drivers/staging/ and not the "real" part
> of the kernel tree?
Hi Greg!
I sent v2 of the patchset, but it does not need to be part of the
staging tree. I CC-ed de...@driverdev.osuosl.org for reference.
Tha
ol.git
CC: Michael Chen
CC: de...@driverdev.osuosl.org
CC: dmaeng...@vger.kernel.org
Signed-off-by: Alexander Gordeev
---
drivers/dma/Kconfig | 1 +
drivers/dma/Makefile| 1 +
drivers/dma/avalon-test/Kconfig | 23 +
drivers/dma/avalon-tes
Support Avalon-MM DMA Interface for PCIe used in hard IPs for
Intel Arria, Cyclone or Stratix FPGAs.
CC: Michael Chen
CC: de...@driverdev.osuosl.org
CC: dmaeng...@vger.kernel.org
Signed-off-by: Alexander Gordeev
---
drivers/dma/Kconfig | 2 +
drivers/dma/Makefile
ta integrity by examining RAM contents
from host CPU (indirectly - checking data DMAed to the system) and
from Nios CPU that has direct access to the device RAM. A companion
tool using "avalon-test" driver was used to DMA files to the device:
https://github.com/a-gordeev/avalon-tool.git
C
contiguous buffers, scatterlists and DMA completion
callbacks - much like "dmaengine" does.
CC: Michael Chen
CC: de...@driverdev.osuosl.org
CC: dmaeng...@vger.kernel.org
Signed-off-by: Alexander Gordeev
---
drivers/staging/Kconfig | 2 +
drivers/stagin
g - I only
have access to a single Arria 10 device to try on.
This series is against v5.3 and could be found at
g...@github.com:a-gordeev/linux.git avalon-dma-engine
CC: Michael Chen
CC: de...@driverdev.osuosl.org
CC: dmaeng...@vger.kernel.org
Alexander Gordeev (2):
staging: avalon-dma
ol.git
CC: Michael Chen
CC: de...@driverdev.osuosl.org
CC: dmaeng...@vger.kernel.org
Signed-off-by: Alexander Gordeev
---
drivers/staging/Kconfig | 2 +
drivers/staging/Makefile | 1 +
drivers/staging/avalon-drv/Kconfig| 34 +
drivers/stag
13 matches
Mail list logo
