Hello,
syzbot found the following issue on:
HEAD commit:29ad81a1 arch/x86: add missing include to sparsemem.h
git tree: https://github.com/google/kmsan.git master
console output: https://syzkaller.appspot.com/x/log.txt?x=12d4e126d0
kernel config: https://syzkaller.appspot.com/x/.co
On Mon, 2021-03-29 at 08:57 +0200, Benjamin Gaignard wrote:
> Add decode params control and it associated structure to regroup
> all the information that are needed to decode a reference frame as
> it is describe in ITU-T Rec. H.265 section "8.3.2 Decoding process
> for reference picture set".
>
>
On Mon, 2021-03-29 at 08:57 +0200, Benjamin Gaignard wrote:
> Add variant to IMX8M to enable G2/HEVC codec.
> Define the capabilities for the hardware up to 3840x2160.
> G2 doesn't have postprocessor, use the same clocks and got it
> own interruption.
>
> Signed-off-by: Benjamin Gaignard
> Review
On Mon, 2021-03-29 at 08:57 +0200, Benjamin Gaignard wrote:
> Make sure that V4L2_PIX_FMT_HEVC_SLICE is correctly handle by v4l2
> of the driver.
>
> Signed-off-by: Benjamin Gaignard
Reviewed-by: Ezequiel Garcia
> ---
> drivers/staging/media/hantro/hantro_v4l2.c | 1 +
> 1 file changed, 1 ins
On Mon, 2021-03-29 at 08:57 +0200, Benjamin Gaignard wrote:
> If the variant doesn't offert postprocessed formats make sure it will
> be ok.
>
> Signed-off-by: Benjamin Gaignard
Reviewed-by: Ezequiel Garcia
> ---
> drivers/staging/media/hantro/hantro.h | 8 ++--
> drivers/stagin
On Mon, 2021-03-29 at 08:57 +0200, Benjamin Gaignard wrote:
> Define which HEVC profiles (up to level 5.1) and features
> (no scaling, no 10 bits) are supported by the driver.
>
> Signed-off-by: Benjamin Gaignard
Reviewed-by: Ezequiel Garcia
> ---
> drivers/staging/media/hantro/hantro.h |
On Mon, 2021-03-29 at 08:57 +0200, Benjamin Gaignard wrote:
> Change hantro_codec_ops run prototype from 'void' to 'int'.
> This allow to cancel the job if an error occur while configuring
> the hardware.
>
> Signed-off-by: Benjamin Gaignard
Reviewed-by: Ezequiel Garcia
> ---
> version 5:
> -
On Mon, 2021-03-29 at 08:57 +0200, Benjamin Gaignard wrote:
> Add fields and flags as they are defined in
> 7.4.3.3.1 "General picture parameter set RBSP semantics of the
> H.265 ITU specification.
>
> Signed-off-by: Benjamin Gaignard
Reviewed-by: Ezequiel Garcia
> ---
> .../userspace-api/med
On Mon, Mar 29, 2021 at 6:27 AM Xin Ji wrote:
>
> On Thu, Mar 25, 2021 at 02:19:23PM -0400, Sean Paul wrote:
> > On Fri, Mar 19, 2021 at 2:35 AM Xin Ji wrote:
> > >
> > > Add HDCP feature, enable HDCP function through chip internal key
> > > and downstream's capability.
> > >
> > > Signed-off-by:
On Thu, Mar 25, 2021 at 02:19:23PM -0400, Sean Paul wrote:
> On Fri, Mar 19, 2021 at 2:35 AM Xin Ji wrote:
> >
> > Add HDCP feature, enable HDCP function through chip internal key
> > and downstream's capability.
> >
> > Signed-off-by: Xin Ji
> > ---
> > drivers/gpu/drm/bridge/analogix/anx7625.c
On Mon, 29 Mar 2021, Benjamin Gaignard wrote:
> Add 'nxp,imx8mq-vpu-ctrl' in the list of possible syscon.
> It will used to access to the VPU control registers.
>
> Signed-off-by: Benjamin Gaignard
> Acked-by: Rob Herring
> ---
> version 7:
> - Add Rob ack
> Documentation/devicetree/bindings/
Split VPU node in two: one for G1 and one for G2 since they are
different hardware blocks.
Add syscon for hardware control block.
Remove reg-names property that is useless.
Each VPU node only need one interrupt.
Change G2 assigned clock to match to the specifications.
In the both nodes all the cloc
Implement all the logic to get G2 hardware decoding HEVC frames.
It support up level 5.1 HEVC stream.
It doesn't support yet 10 bits formats or scaling feature.
Add HANTRO HEVC dedicated control to skip some bits at the beginning
of the slice header. That is very specific to this hardware so can't
Add variant to IMX8M to enable G2/HEVC codec.
Define the capabilities for the hardware up to 3840x2160.
G2 doesn't have postprocessor, use the same clocks and got it
own interruption.
Signed-off-by: Benjamin Gaignard
Reviewed-by: Philipp Zabel
---
version 7:
- Add Philipp Reviewed-by tag.
vers
Make sure that V4L2_PIX_FMT_HEVC_SLICE is correctly handle by v4l2
of the driver.
Signed-off-by: Benjamin Gaignard
---
drivers/staging/media/hantro/hantro_v4l2.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/staging/media/hantro/hantro_v4l2.c
b/drivers/staging/media/hantro/hantro_
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