My name is Reem Hashimy, the Emirates Minister of State and Managing Director
of the United Arab Emirates (Dubai) World Expo 2020 Committee which has been
postponed to October 2021 to March 2022 because of the Covid-19 pandemic.
I am writing to you to manage the funds I received as financial gr
There is a regular need in the kernel to provide a way to declare having
a dynamically sized set of trailing elements in a structure. Kernel code
should always use “flexible array members”[1] for these cases. The older
style of one-element or zero-length arrays should no longer be used[2].
Use fle
On Wed, 2021-03-03 at 16:20 +0100, Benjamin Gaignard wrote:
> Le 03/03/2021 à 15:17, Philipp Zabel a écrit :
> > Hi Benjamin,
> >
> > On Mon, 2021-03-01 at 16:17 +0100, Benjamin Gaignard wrote:
> > > The two VPUs inside IMX8MQ share the same control block which can be see
> > > as a reset hardware
Le 03/03/2021 à 15:17, Philipp Zabel a écrit :
Hi Benjamin,
On Mon, 2021-03-01 at 16:17 +0100, Benjamin Gaignard wrote:
The two VPUs inside IMX8MQ share the same control block which can be see
as a reset hardware block.
This isn't a reset controller though. The control block also contains
clo
Le 03/03/2021 à 15:39, Philipp Zabel a écrit :
On Mon, 2021-03-01 at 16:17 +0100, Benjamin Gaignard wrote:
Rather use a reset like feature inside the driver use the reset
controller API to get the same result.
Signed-off-by: Benjamin Gaignard
---
drivers/staging/media/hantro/Kconfig
On Mon, 2021-03-01 at 16:17 +0100, Benjamin Gaignard wrote:
> Rather use a reset like feature inside the driver use the reset
> controller API to get the same result.
>
> Signed-off-by: Benjamin Gaignard
> ---
> drivers/staging/media/hantro/Kconfig| 1 +
> drivers/staging/media/hantro/i
On Mon, 2021-03-01 at 16:17 +0100, Benjamin Gaignard wrote:
> IMX8MQ SoC got a dedicated hardware block to reset the video processor
> units (G1 and G2).
>
> Signed-off-by: Benjamin Gaignard
> ---
> drivers/reset/Kconfig| 8 ++
> drivers/reset/Makefile | 1 +
> drivers/
Hi Benjamin,
On Mon, 2021-03-01 at 16:17 +0100, Benjamin Gaignard wrote:
> The two VPUs inside IMX8MQ share the same control block which can be see
> as a reset hardware block.
This isn't a reset controller though. The control block also contains
clock gates of some sort and a filter register for
This patch removes some repeated words in code comments.
Signed-off-by: Klemen Košir
---
drivers/staging/unisys/visornic/visornic_main.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/unisys/visornic/visornic_main.c
b/drivers/staging/unisys/visornic/viso
