dce crtc mem req and atombios

Hi, On radeon hardware (I have an evergreen based board): Must stopping/resuming the DCE to access the memory controller be done with the EnableCRTCMemReq atombios table? (from DCE3 in dpm code). Because, in evergreen.c, evergreen_mc_stop and evergreen_mc_resume functions do not make use of that

[PATCH 08/10] drm/radeon: replace pflip and sw_int counters with atomics

> + atomic_tring_int[RADEON_NUM_RINGS]; > boolcrtc_vblank_int[RADEON_MAX_CRTCS]; > - boolpflip[RADEON_MAX_CRTCS]; > - int pflip_refcount[RADEON_MAX_CRTCS]; > + atomic_t

[PATCH 08/10] drm/radeon: replace pflip and sw_int counters with atomics

>> Does the linux API mandates atomic_t to be a 32bits word? > > AFAIK it is, at least for the platforms we care about. > ... Then, the proper course of action would be to add to the linux API, sized atomic operation first, wouldn't it? -- Sylvain

[PATCH 08/10] drm/radeon: replace pflip and sw_int counters with atomics

> Does the linux API mandates atomic_t to be a 32bits word? AFAIK it is, at least for the platforms we care about. ... >>> >>> Then, the proper course of action would be to add to the linux API, sized >>> atomic operation first, wouldn't it? >> >> No, atomic is fine for this, I t

PA_SC_RASTER_CONFIG

Hi, In si.c, the PA_SC_RASTER_CONFIG register is set with a golden value in 'si_init_golden_registers' function but get set nearly immediately after in 'si_setup_rb' function at a finer level (for each sh block of each se block). If I remember well, that golden value would be again set to th

atombios powerplay cac table

Hi, Which GPU generations/families do use the "new" powerplay CAC table, defined when the atombios platform capabilities have the ATOM_PP_PLATFORM_CAP_NEW_CAC_VOLTAGE flag? On drm-next-3.13 branch, commit 70471860ff9f335c60c004d42ebd48945bfa5403, I noticed the following: For the "new" power

atombios powerplay cac table

On Thu, Nov 07, 2013 at 04:57:21AM +0100, Sylvain BERTRAND wrote: > Which GPU generations/families do use the "new" powerplay CAC > table, defined when the atombios platform capabilities have the > ATOM_PP_PLATFORM_CAP_NEW_CAC_VOLTAGE flag? I reply myself, since that was di

radeon atombios, vco_mode forced to 1

Hi, In radeon_atom_get_memory_pll_dividers, the vco_mode is forced to 0 or 1 instead of retaining the atombios value range of 0,1 and 2. Expected? regards, -- Sylvain

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