On 2019-12-20 01:28, Jordan Crouse wrote:
On Thu, Dec 19, 2019 at 06:44:46PM +0530, Sharat Masetty wrote:
The last level system cache can be partitioned to 32 different slices
of which GPU has two slices preallocated. One slice is used for
caching GPU
buffers and the other slice is used for cac
On 2019-12-16 22:07, Jordan Crouse wrote:
Attempt to enable split pagetables if the arm-smmu driver supports it.
This will move the default address space from the default region to
the address range assigned to TTBR1. The behavior should be transparent
to the driver for now but it gets the defaul
On 2020-01-28 03:59, Doug Anderson wrote:
Hi,
On Mon, Jan 27, 2020 at 1:30 AM Sharat Masetty
wrote:
This patch adds the required dt nodes and properties
to enabled A618 GPU.
Signed-off-by: Sharat Masetty
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 103
+++
On 2020-02-01 03:13, Doug Anderson wrote:
Hi,
On Fri, Jan 31, 2020 at 4:04 AM Sharat Masetty
wrote:
+ adreno_smmu: iommu@504 {
+ compatible = "qcom,sc7180-smmu-v2",
"qcom,smmu-v2";
+ reg = <0 0x0504 0 0x1>;
+
