of genpd, by runtime resuming devices in
> the prepare phase, the AMD ACP drm driver no longer have to deal with this
> corner case. So let's just drop the related code in this driver.
>
> Cc: David Airlie
> Cc: Alex Deucher
> Cc: Christian König
> Cc: Maruthi Srinivas
On Fri, Aug 21, 2015 at 4:48 AM, Mark Brown wrote:
>
> On Thu, Aug 20, 2015 at 05:36:34PM -0400, Alex Deucher wrote:
> > From: Maruthi Srinivas Bayyavarapu
> >
> > ACP IP block consists of dedicated DMA and I2S blocks. The PCM driver
> > provides the DMA and C
On Tue, Aug 25, 2015 at 11:36 AM, Mark Brown wrote:
> On Mon, Aug 24, 2015 at 04:08:31PM -0400, Alex Deucher wrote:
>> On Fri, Aug 21, 2015 at 12:17 PM, Mark Brown wrote:
>
>> > What I'm looking for is actual code sharing where we use the same code
>> > for the I2S controller block or a clear and
On Mon, Oct 5, 2015 at 9:01 PM, Mark Brown wrote:
> On Fri, Sep 25, 2015 at 05:48:22PM -0400, Alex Deucher wrote:
>> From: Maruthi Srinivas Bayyavarapu
>>
>> dw i2s controller can work in slave mode, codec being master.
>> dw i2s is made to support master/slav
On Mon, Oct 5, 2015 at 9:11 PM, Mark Brown wrote:
> On Fri, Sep 25, 2015 at 05:48:23PM -0400, Alex Deucher wrote:
>> From: Maruthi Srinivas Bayyavarapu
>>
>> Vendor specific quirk was added to:
>> 1. Support AMD platform which has two dwc controllers with diffe
On Thu, Oct 22, 2015 at 9:44 PM, Mark Brown wrote:
> On Thu, Oct 08, 2015 at 12:12:40PM -0400, Alex Deucher wrote:
>
>> ACP IP block consists of dedicated DMA and I2S blocks. The PCM driver
>> provides the platform DMA component to ALSA core.
>
> Overall my main comment on a lot of this code is th
On Sat, Oct 24, 2015 at 1:01 AM, Mark Brown wrote:
> On Sat, Oct 24, 2015 at 12:20:09AM +0530, maruthi srinivas wrote:
>> On Thu, Oct 22, 2015 at 9:44 PM, Mark Brown wrote:
>> > On Thu, Oct 08, 2015 at 12:12:40PM -0400, Alex Deucher wrote:
>
> Please document this clearl
