在 2017-04-05 10:27，Chen-Yu Tsai 写道：
On Wed, Apr 5, 2017 at 3:53 AM, Icenowy Zheng wrote:
在 2017年04月05日 03:28, Sean Paul 写道:
On Thu, Mar 30, 2017 at 03:46:06AM +0800, Icenowy Zheng wrote:
As we are going to add support for the Allwinner DE2 Mixer in
sun4i-drm
driver, we will finally
于 2017年4月20日 GMT+08:00 下午4:37:07, Maxime Ripard
写到:
On Tue, Apr 18, 2017 at 06:47:56PM +0800, Icenowy Zheng wrote:
>> + /* Get the physical address of the buffer in memory */
>> + gem = drm_fb_cma_get_gem_obj(fb, 0);
>> +
>> + DRM_DEBUG_DRIVER("Usi
在 2017-04-24 16:51，Maxime Ripard 写道：
Hi,
On Sun, Apr 23, 2017 at 06:37:45PM +0800, Icenowy Zheng wrote:
+static const struct of_device_id sunxi_de2_clk_ids[] = {
+ {
+ .compatible = "allwinner,sun8i-a83t-de2-clk",
+ .data = &sun8i_a83
在 2017-06-07 17:42，Maxime Ripard 写道：
On Mon, Jun 05, 2017 at 12:01:48AM +0800, Icenowy Zheng wrote:
+ soc {
+ display_clocks: clock@100 {
+ compatible = "allwinner,sun8i-a83t-de2-clk";
+ reg = <0x0100
在 2017-06-07 17:38，Maxime Ripard 写道：
On Mon, Jun 05, 2017 at 12:01:45AM +0800, Icenowy Zheng wrote:
Allwinner H3 features a TV encoder similar to the one in earlier SoCs,
but has a internal fixed clock divider that divides the TCON1 clock
(called TVE clock in datasheet) by 11.
Add support for
在 2017-06-10 05:24，Jernej Škrabec 写道：
Hi!
Dne petek, 09. junij 2017 ob 18:51:02 CEST je Icenowy Zheng napisal(a):
于 2017年6月10日 GMT+08:00 上午12:49:15, Maxime Ripard
electrons.com> 写到:
>On Wed, Jun 07, 2017 at 04:48:50PM +0800, Icenowy Zheng wrote:
>> >> @@ -189,6 +
在 2017-06-10 22:57，icen...@aosc.io 写道：
在 2017-06-09 22:46，Maxime Ripard 写道：
On Thu, Jun 08, 2017 at 01:01:53PM +0800, icen...@aosc.io wrote:
在 2017-06-07 22:38，Maxime Ripard 写道：
> On Wed, Jun 07, 2017 at 06:01:02PM +0800, Icenowy Zheng wrote:
> > >I have no idea what this is su
在 2017-06-09 22:46，Maxime Ripard 写道：
On Thu, Jun 08, 2017 at 01:01:53PM +0800, icen...@aosc.io wrote:
在 2017-06-07 22:38，Maxime Ripard 写道：
> On Wed, Jun 07, 2017 at 06:01:02PM +0800, Icenowy Zheng wrote:
> > >I have no idea what this is supposed to be doing either.
> > >
在 2017-05-05 00:50，icen...@aosc.io 写道：
在 2017-05-04 21:05，Maxime Ripard 写道：
On Thu, May 04, 2017 at 07:48:53PM +0800, Icenowy Zheng wrote:
Allwinner have a new "Display Engine 2.0" in their new SoCs, which
comes
with mixers to do graphic processing and feed data to TCON, lik
在 2017-05-05 00:57，icen...@aosc.io 写道：
在 2017-05-05 00:50，icen...@aosc.io 写道：
在 2017-05-04 21:05，Maxime Ripard 写道：
On Thu, May 04, 2017 at 07:48:53PM +0800, Icenowy Zheng wrote:
Allwinner have a new "Display Engine 2.0" in their new SoCs, which
comes
with mixers to do graphic proc
在 2017-05-04 21:05，Maxime Ripard 写道：
On Thu, May 04, 2017 at 07:48:53PM +0800, Icenowy Zheng wrote:
Allwinner have a new "Display Engine 2.0" in their new SoCs, which
comes
with mixers to do graphic processing and feed data to TCON, like the
old
backends and frontends.
Add suppo
在 2017-05-04 21:05，Maxime Ripard 写道：
On Thu, May 04, 2017 at 07:48:53PM +0800, Icenowy Zheng wrote:
Allwinner have a new "Display Engine 2.0" in their new SoCs, which
comes
with mixers to do graphic processing and feed data to TCON, like the
old
backends and frontends.
Add suppo
在 2017-05-05 11:31，Chen-Yu Tsai 写道：
On Thu, May 4, 2017 at 7:48 PM, Icenowy Zheng wrote:
Allwinner V3s SoC features a "Display Engine 2.0" with only one TCON
which have RGB LCD output.
Please also mention that it only has one mixer.
For the subject, you could just say "Add d
在 2017-05-03 19:59，Maxime Ripard 写道：
It appears that the total vertical resolution needs to be doubled when
we're not in interlaced. Make sure that is the case.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff -
在 2017-05-05 10:56，Chen-Yu Tsai 写道：
On Thu, May 4, 2017 at 7:48 PM, Icenowy Zheng wrote:
As we are going to add support for the Allwinner DE2 engine in
sun4i-drm
driver, we will finally have two types of display engines -- the DE1
backend and the DE2 mixer. They both do some display blending
在 2017-05-11 03:23，Maxime Ripard 写道：
Hi,
On Thu, May 04, 2017 at 04:05:18PM +0800, Chen-Yu Tsai wrote:
On Wed, May 3, 2017 at 7:59 PM, Maxime Ripard
wrote:
> The A10s Olinuxino has an HDMI connector. Make sure we can use it.
>
> Acked-by: Chen-Yu Tsai
> Signed-off-by: Maxime Ripard
> ---
>
在 2017-05-15 17:24，Maxime Ripard 写道：
On Mon, May 15, 2017 at 12:30:43AM +0800, Icenowy Zheng wrote:
+ de2_clocks: clock@100 {
display_clocks would be better there, we don't have to dissociate de1
with de2
How about de_clocks ? (See A80
在 2017-05-17 17:27，icen...@aosc.io 写道：
在 2017-05-15 17:24，Maxime Ripard 写道：
On Mon, May 15, 2017 at 12:30:43AM +0800, Icenowy Zheng wrote:
+ de2_clocks: clock@100 {
display_clocks would be better there, we don't have to dissociate de1
with de2
How about de_clocks ?
7 ob 20:08:18 CEST je Icenowy Zheng napisal(a):
> >> 于 2017年5月20日 GMT+08:00 上午2:03:30, Maxime Ripard >
> > electrons.com> 写到:
> >> >On Thu, May 18, 2017 at 12:43:50AM +0800, Icenowy Zheng wrote:
> >> >> Allwinner H3 features a TV encoder similar
在 2017-06-01 02:43，Maxime Ripard 写道：
On Wed, May 24, 2017 at 04:25:46PM +0800, Icenowy Zheng wrote:
于 2017年5月24日 GMT+08:00 下午3:30:19, Maxime Ripard
写到:
>On Tue, May 23, 2017 at 09:00:59PM +0800, icen...@aosc.io wrote:
>> 在 2017-05-23 20:53，Maxime Ripard 写道：
>> > On Mon,
在 2017-05-24 16:14，Maxime Ripard 写道：
On Sat, May 20, 2017 at 02:00:22AM +0800, Icenowy Zheng wrote:
于 2017年5月20日 GMT+08:00 上午1:57:53, Maxime Ripard
写到:
>On Thu, May 18, 2017 at 12:43:46AM +0800, Icenowy Zheng wrote:
>> Some SoC's DE2 has two mixers. Defaultly the mixer0 i
hen-Yu Tsai napisal(a):
> > > On Sat, May 20, 2017 at 2:23 AM, Jernej Škrabec
> > wrote:
> > > > Hi,
> > > >
> > > > Dne petek, 19. maj 2017 ob 20:08:18 CEST je Icenowy Zheng napisal(a):
> > > >> 于 2017年5月20日 GMT+08:00 上午2:03:30, Maxim
在 2017-06-05 00:01，Icenowy Zheng 写道：
Allwinner H3 SoC features a TV Encoder like the one in Allwinner A13,
which can only output TV Composite signal.
The display pipeline of H3 is also special -- it has two mixers and
two TCONs, of which the connection can be swapped. The TCONs do not
have
在 2017-06-07 22:38，Maxime Ripard 写道：
On Wed, Jun 07, 2017 at 06:01:02PM +0800, Icenowy Zheng wrote:
>I have no idea what this is supposed to be doing either.
>
>I might be wrong, but I really feel like there's a big mismatch
>between your commit log, and what you actually impl
在 2017-10-16 16:00，Maxime Ripard 写道：
Hi,
I've applied all the other patches.
On Sat, Oct 14, 2017 at 12:02:50PM +0800, Chen-Yu Tsai wrote:
The display backend, as well as other peripherals that have a DRAM
clock gate and access DRAM directly, bypassing the system bus,
address the DRAM starting
在 2017-10-17 17:06，Maxime Ripard 写道：
The current code has the wrong macro to get the registers offsets of
the
UI-registers, with an off-by-0x1000 error.
It works so far by accident, since the UI channel used everywhere else
is
the number of VI planes, which has always been 1 so far, and the o
在 2017-10-17 17:06，Maxime Ripard 写道：
Add support for the A83T display pipeline.
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 3 +++
drivers/gpu/drm/sun4i/sun4i_drv.c | 2 ++
drivers/gpu/drm/sun4i/sun4i_tcon.c
在 2017-10-27 23:06，Icenowy Zheng 写道：
This patchset adds support for the SimpleFB on Allwinner SoCs with
"Display Engine 2.0".
PATCH 1 to PATCH 3 are DE2 CCU fixes for H3/H5 SoCs.
PATCH 4 adds the pipeline strings for DE2 SimpleFB.
PATCH 5 to 7 adds necessary device tree nodes (D
在 2017-08-02 12:53，Jernej Škrabec 写道：
Hi Icenowy,
Dne torek, 01. avgust 2017 ob 15:12:52 CEST je Icenowy Zheng
napisal(a):
Allwinner H3 features a "Display Engine 2.0".
Add device tree bindings for the following parts:
- H3 TCONs
- H3 Mixers
- H3 Display engine
Signed-off-by: Ice
在 2017-08-02 12:47，Jernej Škrabec 写道：
Hi Icenowy,
Dne torek, 01. avgust 2017 ob 15:12:58 CEST je Icenowy Zheng
napisal(a):
As we have already the support for the DE2 on Allwinner H3, add the
display engine pipeline device tree nodes to its DTSI file.
The H5 pipeline has some differences and
Add a driver for generic MIPI DBI panels initialized with MIPI DCS
commands.
Currently a ST7789V-based panel is added to it. This panel has its
configuration pre-programmed into the controller, so no vendor-specific
configuration is needed.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/tiny
This patchset adds a tinydrm driver called simple-dbi, which is a driver
that utilizes only standardized commands in MIPI DCS to activate a MIPI
DBI panel that requires no extra configuration, usually because the
configuration is pre-programmed into the OTP of the LCD controller.
Icenowy Zheng (4
Shenzhen Zhishengxin Technology Co., Ltd. is a LCD module supplier.
Add vendor prefix for it.
Signed-off-by: Icenowy Zheng
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml
b
ff-by: Icenowy Zheng
---
.../bindings/display/simple-dbi.yaml | 72 +++
1 file changed, 72 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/simple-dbi.yaml
diff --git a/Documentation/devicetree/bindings/display/simple-dbi.yaml
b/Document
As I pushed the simple-dbi driver, add myself as the maintainer now.
Signed-off-by: Icenowy Zheng
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 3a00771b9fe2..e05c4910c062 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5803,6 +5803,13
在 2021-08-02星期一的 14:35 +0800，Icenowy Zheng写道：
> Add a driver for generic MIPI DBI panels initialized with MIPI DCS
> commands.
>
> Currently a ST7789V-based panel is added to it. This panel has its
> configuration pre-programmed into the controller, so no vendor-
> specific
在 2021-08-02星期一的 17:08 +0200，Thomas Zimmermann写道：
> Hi
>
> Am 02.08.21 um 08:35 schrieb Icenowy Zheng:
> > Add a driver for generic MIPI DBI panels initialized with MIPI DCS
> > commands.
> >
> > Currently a ST7789V-based panel is added to it. This panel has its
Attaching the panel can fail, so cleanup work is necessary, otherwise
a pointer to freed struct drm_panel* will remain in drm_panel code.
Do the cleanup if panel attaching failed.
Fixes: 69dc678abc2b ("drm/panel: Add Feiyang FY07024DI26A30-D MIPI-DSI LCD
panel")
Signed-off-by: Ice
value
> gets printed.
>
> Signed-off-by: Cai Huoqing
Looks good to me, and thanks for pointing out this helper.
Acked-by: Icenowy Zheng
> ---
> drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c | 13 +
> 1 file changed, 5 insertions(+), 8 deletions(-)
>
> diff
: 26aec25593c2 ("drm/panel: Add Ilitek ILI9881c panel driver")
Cc: sta...@vger.kernel.org
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
于 2021年1月6日 GMT+08:00 下午5:47:20, Jagan Teki 写到:
>On Sat, Nov 28, 2020 at 6:23 PM Icenowy Zheng wrote:
>>
>> Attaching the panel can fail, so cleanup work is necessary, otherwise
>> a pointer to freed struct drm_panel* will remain in drm_panel code.
>>
>>
于 2019年2月5日 GMT+08:00 上午12:26:43, Vasily Khoruzhick 写到:
>On Mon, Feb 4, 2019 at 6:20 AM Maxime Ripard
> wrote:
>>
>> Hi,
>>
>> On Sun, Feb 03, 2019 at 10:54:55AM -0800, Vasily Khoruzhick wrote:
>> > Clock rate check that was added in commit bb43d40d7c83 ("drm/sun4i:
>rgb:
>> > Validate the clock
于 2019年7月9日 GMT+08:00 下午4:55:32, Maxime Ripard 写到:
>On Mon, Jul 08, 2019 at 05:49:21PM -0700, Vasily Khoruzhick wrote:
>> > > Maybe instead of edp-connector one would introduce integrator's
>specific
>> > > connector, for example with compatible
>"olimex,teres-edp-connector"
>> > > which should
On PowerBook6,1 (PowerBook G4 867 12") HWSQ entry 0 (which is currently
always used by nouveau) fails, but the BIOS declares 2 HWSQ entries and
entry 1 works.
Add a quirk to use HWSQ entry 1.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/nouveau/nouveau_bios.c | 7 +++
1 file chang
Created at https://gitlab.freedesktop.org/drm/nouveau/-/issues/158 .
>
> On Mon, Feb 14, 2022 at 11:03 AM Icenowy Zheng wrote:
> >
> > On PowerBook6,1 (PowerBook G4 867 12") HWSQ entry 0 (which is
> > currently
> > always used by nouveau) fails, but the BIOS declares 2 HW
在 2022-05-22星期日的 10:36 +0200，Jernej Škrabec写道：
> Hi!
>
> Dne sobota, 21. maj 2022 ob 15:34:43 CEST je Genfu Pan napisal(a):
> > Accrording the SDK from Allwinner, the scanline value of yuv and
> > rgb for
> > V3s are both 1024.
>
> s/scanline value/scanline length/
>
> Which SDK? All SDKs that I
于 2019年12月24日 GMT+08:00 下午7:28:41, Martin Blumenstingl
写到:
>Hi Alyssa,
>
>On Mon, Dec 16, 2019 at 4:48 PM Alyssa Rosenzweig
> wrote:
>>
>> If so much code is being duplicated over, I'm wondering if it makes
>> sense for us to move some of the common devfreq code to core DRM
>> helpers?
>if you
在 2019-10-03四的 09:53 +0530，Jagan Teki写道：
> Hi Wens,
>
> On Tue, Oct 1, 2019 at 1:34 PM Icenowy Zheng wrote:
> > This reverts commit 62e7511a4f4dcf07f753893d3424decd9466c98b.
> >
> > This commit, although claimed as a refactor, in fact changed the
> > formula.
&
在 2019-10-06日的 22:44 +0800，Icenowy Zheng写道：
> 在 2019-10-03四的 09:53 +0530，Jagan Teki写道：
> > Hi Wens,
> >
> > On Tue, Oct 1, 2019 at 1:34 PM Icenowy Zheng
> > wrote:
> > > This reverts commit 62e7511a4f4dcf07f753893d3424decd9466c98b.
> > >
> >
ldn't be added with 1 for another time.)
Icenowy Zheng (2):
drm/sun4i: dsi: fix the overhead of the horizontal front porch
drm/sun4i: sun6i_mipi_dsi: fix DCS long write packet length
Jagan Teki (1):
drm/sun4i: dsi: Fix video start delay computation
[1]
https://github.com/ayufan-pi
From: Jagan Teki
The LCD timing definitions between Linux DRM vs Allwinner are different,
below diagram shows this clear differences.
Active Front Sync Back
Region Porch Porch
<
The packet length of DCS long write packet should not be added with 1
when constructing long write packet.
Fix this.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/sun4i
The formula in the BSP kernel indicates that a 16-byte overhead is used
when sending the HFP. However, this value is currently set to 6 in the
sun6i_mipi_dsi driver, which makes some panels flashing.
Fix this overhead value.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i
于 2019年10月7日 GMT+08:00 下午7:51:48, Maxime Ripard 写到:
>On Mon, Oct 07, 2019 at 12:03:00AM +0800, Icenowy Zheng wrote:
>> From: Jagan Teki
>>
>> The LCD timing definitions between Linux DRM vs Allwinner are
>different,
>> below diagram shows this clear differ
于 2020年2月22日 GMT+08:00 上午1:13:28, Torsten Duwe 写到:
>On Sat, Feb 22, 2020 at 12:51:27AM +0800, Icenowy Zheng wrote:
>> Current code tries to store the link rate (in bps, which is a big
>> number) in a u8, which surely overflow. Then it's converted back to
>> bandwidth
link rate and then converting back.
Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for v5.5")
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/an
Maybe it should enter fixes?
>
>Best regards
>Thomas
>
>Am 22.02.20 um 03:43 schrieb Icenowy Zheng:
>>
>>
>> 于 2020年2月22日 GMT+08:00 上午1:13:28, Torsten Duwe 写到:
>>> On Sat, Feb 22, 2020 at 12:51:27AM +0800, Icenowy Zheng wrote:
>>>> Current code
correct?
dotclock is correct and vrefresh is only a placeholder value.
>
>Cc: Icenowy Zheng
>Cc: Sam Ravnborg
>Signed-off-by: Ville Syrjälä
>---
> drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/driv
于 2020年3月6日 GMT+08:00 上午2:29:33, Vasily Khoruzhick 写到:
>On Thu, Mar 5, 2020 at 7:28 AM Enric Balletbo i Serra
> wrote:
>>
>> Hi Vasily,
>
>CC: Icenowy and Ondrej
>>
>> Would you mind to check which firmware version is running the anx7688
>in
>> Pi
erra
> > > wrote:
> > > > Hi Vasily,
> > >
> > > CC: Icenowy and Ondrej
> > > > Would you mind to check which firmware version is running the
> > > > anx7688 in
> > > > PinePhone, I think should be easy to check with i2c-tools.
> &
Shenzhen Xingbangda Display Technology Co., Ltd is a company which
produces LCD modules. It supplies the LCD panels of the PinePhone series
(the developers' kit and the final phone).
Add the vendor prefix of it.
Signed-off-by: Icenowy Zheng
---
Documentation/devicetree/bindings/v
Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI LCD panel.
Add its device tree binding.
Signed-off-by: Icenowy Zheng
---
.../display/panel/xingbangda,xbd599.yaml | 50 +++
1 file changed, 50 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/
Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI IPS LCD panel made by
Xingbangda, which is used on PinePhone final assembled phones.
Add support for it.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/panel/Kconfig | 9 +
drivers/gpu/drm/panel/Makefile
The max() function call in horizontal timing calculation shouldn't pad a
length already subtracted with overhead to overhead, instead it should
only prevent the set timing to underflow.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 10 +-
1 file chang
This patchset adds support for the LCD panel of PinePhone.
The first 3 patches are for the panel itself, and the last 2 patches are
for enabling it on PinePhone.
PATCH 4 is the fix of a bug in sun6i_mipi_dsi which will gets triggered
on XBD599.
Icenowy Zheng (5):
dt-bindings: vendor-prefixes
PinePhone uses PWM backlight and a XBD599 LCD panel over DSI for
display.
Add its device nodes.
Signed-off-by: Icenowy Zheng
---
.../dts/allwinner/sun50i-a64-pinephone.dtsi | 37 +++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64
This patchset adds support for the LCD panel of PinePhone.
The first 3 patches are for the panel itself, and the last 2 patches are
for enabling it on PinePhone.
PATCH 4 is the fix of a bug in sun6i_mipi_dsi which will gets triggered
on XBD599.
Icenowy Zheng (5):
dt-bindings: vendor-prefixes
于 2020年3月14日 GMT+08:00 下午4:00:00, Sam Ravnborg 写到:
>Hi Icenowy
>
>A few details in the following.
>
> Sam
>
>On Thu, Mar 12, 2020 at 12:33:27AM +0800, Icenowy Zheng wrote:
>> Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI IPS LCD panel made by
>>
Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI LCD panel.
Add its device tree binding.
Signed-off-by: Icenowy Zheng
---
Changes in v2:
- Example fix.
- Format fix.
.../display/panel/xingbangda,xbd599.yaml | 50 +++
1 file changed, 50 insertions(+)
create mode 1
The max() function call in horizontal timing calculation shouldn't pad a
length already subtracted with overhead to overhead, instead it should
only prevent the set timing to underflow.
Signed-off-by: Icenowy Zheng
---
No changes in v2.
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 10 +---
Shenzhen Xingbangda Display Technology Co., Ltd is a company which
produces LCD modules. It supplies the LCD panels of the PinePhone series
(the developers' kit and the final phone).
Add the vendor prefix of it.
Signed-off-by: Icenowy Zheng
---
No changes in v2.
Documentation/devic
This patchset adds support for the LCD panel of PinePhone.
The first 3 patches are for the panel itself, and the last 2 patches are
for enabling it on PinePhone.
PATCH 4 is the fix of a bug in sun6i_mipi_dsi which will gets triggered
on XBD599.
Icenowy Zheng (5):
dt-bindings: vendor-prefixes
Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI IPS LCD panel made by
Xingbangda, which is used on PinePhone final assembled phones.
Add support for it.
Signed-off-by: Icenowy Zheng
---
Changes in v2:
- Raised copyright info to 2020.
- Sort panel operation functions.
- Sort inclusion.
dr
PinePhone uses PWM backlight and a XBD599 LCD panel over DSI for
display.
Add its device nodes.
Signed-off-by: Icenowy Zheng
---
No changes in v2.
.../dts/allwinner/sun50i-a64-pinephone.dtsi | 37 +++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts
在 2020-03-16星期一的 21:35 +0800，Icenowy Zheng写道：
> PinePhone uses PWM backlight and a XBD599 LCD panel over DSI for
> display.
>
> Add its device nodes.
>
> Signed-off-by: Icenowy Zheng
> ---
> No changes in v2.
>
> .../dts/allwinner/sun50i-a64-pinephone.dtsi |
Add the device tree binding for Pine64's PineTab tablet, which uses
Allwinner A64 SoC.
Signed-off-by: Icenowy Zheng
---
Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml
b/Document
Shenzhen Feixin Photoelectics Co., Ltd is a company to provide LCD
modules.
Add its vendor prefix.
Signed-off-by: Icenowy Zheng
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor
ing
most of the features mentioned above. HDMI is not supported now because
bad LCD-HDMI coexistence situation of mainline A64 display driver, and
the front camera currently lacks a driver and a facility to share the
bus with the rear one.
Signed-off-by: Icenowy Zheng
---
arch/arm64/boot/dts/all
Feixin K101 IM2BA02 is a 10.1" 800x1280 4-lane MIPI-DSI panel.
Add device tree binding for it.
Signed-off-by: Icenowy Zheng
---
.../display/panel/feixin,k101-im2ba02.yaml| 54 +++
1 file changed, 54 insertions(+)
create mode 100644
Documentation/devicetree/bin
Feixin K101 IM2BA02 is a 800x1280 4-lane MIPI-DSI LCD panel.
Add a panel driver for it.
Signed-off-by: Icenowy Zheng
---
MAINTAINERS | 6 +
drivers/gpu/drm/panel/Kconfig | 9 +
drivers/gpu/drm/panel/Makefile| 1 +
.../gpu
f the functionalities of the tablet
available in this device tree.
Icenowy Zheng (5):
dt-bindings: vendor-prefix: add Shenzhen Feixin Photoelectics Co., Ltd
dt-bindings: panel: add Feixin K101 IM2BA02 MIPI-DSI panel
drm/panel: Add Feixin K101 IM2BA02 panel
dt-bindings: arm: sunxi: add bindin
Feixin K101 IM2BA02 is a 800x1280 4-lane MIPI-DSI LCD panel.
Add a panel driver for it.
Signed-off-by: Icenowy Zheng
---
Changes in v2:
- Use regulator_bulk.
- Small code fixes.
MAINTAINERS | 6 +
drivers/gpu/drm/panel/Kconfig | 9
Shenzhen Feixin Photoelectics Co., Ltd is a company to provide LCD
modules.
Add its vendor prefix.
Signed-off-by: Icenowy Zheng
Acked-by: Sam Ravnborg
Acked-by: Rob Herring
---
Changes in v2:
- Added ACKs from Sam and Rob.
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1
ing
most of the features mentioned above. HDMI is not supported now because
bad LCD-HDMI coexistence situation of mainline A64 display driver, the
front camera currently lacks a driver and a facility to share the bus
with the rear one, and the accelerometer currently lacks a DT binding.
Signed-
because a DT binding is
lacked (although a proper driver exists).
Icenowy Zheng (5):
dt-bindings: vendor-prefix: add Shenzhen Feixin Photoelectics Co., Ltd
dt-bindings: panel: add Feixin K101 IM2BA02 MIPI-DSI panel
drm/panel: Add Feixin K101 IM2BA02 panel
dt-bindings: arm: sunxi: add binding
Feixin K101 IM2BA02 is a 10.1" 800x1280 4-lane MIPI-DSI panel.
Add device tree binding for it.
Signed-off-by: Icenowy Zheng
---
Changes in v2:
- Set backlight property to optional. (Technically this panel requires
backlight, but theortically it can be not adjustable.)
- Tweaked the examp
Add the device tree binding for Pine64's PineTab tablet, which uses
Allwinner A64 SoC.
Signed-off-by: Icenowy Zheng
Reviewed-by: Rob Herring
---
Changes in v2:
- Added Review tag by Rob.
Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +
1 file changed, 5 insertions(+)
diff --
Currently, when allocating the memory for BO by Mesa, the lima kernel
driver set only GFP_DMA32 flag; and this allocation may fail when the
memory is relatively adequate, thus retrying is needed.
Add the GFP flags for retrying memory allocation.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm
uldn't repeat to add the delay in DSI
controller, otherwise the timing won't match.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
b/drivers/gpu/dr
to timing error.
Fix the DRQ calculation by change it to use HFP.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
b/drivers/gpu/drm/sun4i/sun6i_mipi_d
ating hsa, and hsa itself is negative when calculating hblk).
This breaks the similar pattern to other formulas, so restoring the
original formula is more proper.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
Don't Be Evil" DevKit, the final PinePhone panel and the
panel on PineTab. Without these patches they need dirty timing hacks to
work.
Icenowy Zheng (3):
Revert "drm/sun4i: dsi: Change the start delay calculation"
drm/sun4i: dsi: fix DRQ calculation
Revert "drm/sun
在 2019-10-02三的 12:36 +0200，Maxime Ripard写道：
> Hi,
>
> On Tue, Oct 01, 2019 at 04:02:50PM +0800, Icenowy Zheng wrote:
> > This patchset fixes some portion of timing calculation in
> > sun6i_mipi_dsi
> > driver according to the BSP driver.
> >
> > Two of t
于 2019年10月3日 GMT+08:00 下午2:45:21, Jagan Teki 写到:
>The LCD timing definitions between Linux DRM vs Allwinner are
>different,
>below diagram shows this clear differences.
>
> Active Front Sync Back
> Region Porch
于 2019年10月3日 GMT+08:00 下午2:45:22, Jagan Teki 写到:
>start value in video start delay was changed in
>commit da676c6aa641 ("drm/sun4i: dsi: Change the start delay
>calculation")
>to match the legacy BSP driver [1].
>
>So, using this existing start delay computation gives the wrong
>start delay val
于 2019年10月3日 GMT+08:00 下午7:47:33, Maxime Ripard 写到:
>On Thu, Oct 03, 2019 at 12:15:24PM +0530, Jagan Teki wrote:
>> Allwinner MIPI DSI controllers are supplied with SoC DSI
>> power rails via VCC-DSI pin.
>>
>> Some board still work without supplying this but give more
>> faith on datasheet and
于 2019年10月3日 GMT+08:00 下午9:19:16, Maxime Ripard 写到:
>On Thu, Oct 03, 2019 at 12:38:43PM +0530, Jagan Teki wrote:
>> On Tue, Oct 1, 2019 at 1:33 PM Icenowy Zheng wrote:
>> >
>> > This reverts commit da676c6aa6413d59ab0a80c97bbc273025e640b2.
>> >
>> &g
although it's still /dev/fb0 and fbcon is bound to it).
Add some code for removing firmware-based FB when initializing KMS of
rockchipdrm.
Tested on Pinebook Pro (RK3399) with U-Boot patchset for initializing
eDP display applied.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/roc
在 2023-06-14星期三的 14:31 -0700，Doug Anderson写道：
> Hi,
>
> On Wed, Jun 14, 2023 at 1:22 AM AngeloGioacchino Del Regno
> wrote:
> >
> > Il 13/06/23 01:32, Douglas Anderson ha scritto:
> > > In order to read the EDID from an eDP panel, you not only need to
> > > power on the bridge chip itself but al
在 2023-08-07星期一的 11:36 +0200，Frank Oltmanns写道：
> From: Icenowy Zheng
>
> In some situaitons, we will want a clock rate be kept while its
> parent
> can change, for example, to make dual-head work on A64, TCON0 clock
> needs to be kept for LCD display and its parent (or grandpa
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