å¨ 2015/8/24 22:48, Rob Herring åé:
> On Mon, Aug 24, 2015 at 7:57 AM, Russell King - ARM Linux
> wrote:
>> On Sun, Aug 23, 2015 at 06:23:14PM -0500, Rob Herring wrote:
>>> On Wed, Aug 19, 2015 at 9:50 AM, Yakir Yang wrote:
>>>> + -analogix,color-d
> On Wed, Aug 19, 2015 at 9:50 AM, Yakir Yang wrote:
>>>>> + -analogix,color-depth:
>>>>> + number of bits per colour component.
>>>>> + COLOR_6 = 0, COLOR_8 = 1, COLOR_10 = 2, COLOR_12
>>>>> =
Hi Thierry,
å¨ 2015/8/25 18:06, Thierry Reding åé:
> On Tue, Aug 25, 2015 at 05:41:19PM +0800, Yakir Yang wrote:
>> Hi Thierry,
>>
>> å¨ 2015/8/25 17:12, Thierry Reding åé:
>>> On Mon, Aug 24, 2015 at 09:48:27AM -0500, Rob Herring wrote:
>>>>
Hi Thierry,
å¨ 2015/8/25 22:16, Thierry Reding åé:
> On Tue, Aug 25, 2015 at 09:48:01PM +0800, Yakir Yang wrote:
>> Hi Thierry & Rob,
>>
>> å¨ 2015/8/25 21:27, Rob Herring åé:
>>> On Tue, Aug 25, 2015 at 4:15 AM, Thierry Reding
>>> wrote:
&g
Hi Thierry,
å¨ 2015/8/25 17:58, Thierry Reding åé:
> On Wed, Aug 19, 2015 at 09:50:34AM -0500, Yakir Yang wrote:
> [...]
>> +-analogix,color-space:
>> +input video data format.
>> +COLOR_RGB = 0, COLOR_YCBCR422 = 1, COLOR_YCBCR444 =
gt; Signed-off-by: Philipp Zabel
> the person working the most on the rockchip dw_hdmi currently is probably
> Yakir Yang (included now).
>
> But even to me with my general Rockchip work area outside the drm this looks
> good, as there isn't any functional change present in
Hi Philipp & Heiko,
å¨ 2015/8/28 9:17, Yakir Yang åé:
> Hi Philipp,
>
> å¨ 2015/8/27 19:26, Heiko Stuebner åé:
>> Hi Philipp,
>>
>> Am Donnerstag, 27. August 2015, 12:56:07 schrieb Philipp Zabel:
>>> It is replaced by drm_of_encoder_active_endpoin
2Gbps, 2.7Gbps, 5.4Gbps}.
Signed-off-by: Yakir Yang
---
Changes in v4:
- Take Jingoo Han suggest, update commit message more readable.
- Adjust the order from 05 to 04
Changes in v3:
- Take Thierry Reding suggest, link_rate and lane_count shouldn't config to
the DT property value directly,
This phy driver would control the Rockchip DisplayPort module
phy clock and phy power, it is relate to analogix_dp-rockchip
dp driver. If you want DP works rightly on rockchip platform,
then you should select both of them.
Signed-off-by: Yakir Yang
---
Changes in v4:
- Take Kishon suggest, add
ld
rebase on kernel/next/linux-next.git when I'm preparing v4 series.
Thanks,
- Yakir
> Regards,
> Romain
>
> 2015-08-21 15:16 GMT+02:00 Thierry Reding :
>> On Fri, Aug 21, 2015 at 08:24:16PM +0900, Jingoo Han wrote:
>>> On 2015. 8. 21., at PM 7:01, Yakir Yang wro
node with remote-endpoint method,
and create devicetree binding for driver.
- Remove the clock enable/disbale with "sclk_edp" & "sclk_edp_24m",
leave those clock to rockchip dp phy driver.
- Add GNU license v2 declared and samsung copyright
- Fix compile failed dut
After run "checkpatch.pl -f --subjective" command, I see there
are lots of alignment problem in exynos_dp driver, so let just
fix them.
- Take Romain suggest, rebase on linux-next branch
Signed-off-by: Yakir Yang
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Take J
provide the backward compatibility, so there are no
bisectability break that make this change in a separate patch.
Signed-off-by: Yakir Yang
---
Changes in v4:
- Take Krzysztof suggest, separate all DTS changes to a separate patch.
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts
From: Mark Yao
Add bpc and color mode setting in rockchip_drm_vop driver, so
connector could try to use the edid drm_display_info to config
vop output mode.
Signed-off-by: Mark Yao
Signed-off-by: Yakir Yang
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
drivers/gpu/drm
In order to move exynos dp code to bridge directory,
we need to convert driver drm bridge mode first. As
dp driver already have a ptn3460 bridge, so we need
to move ptn bridge to the next bridge of dp bridge.
Signed-off-by: Yakir Yang
---
Changes in v4:
- Take Romain suggest, rebase on linux
Split the dp core driver from exynos directory to bridge
directory, and rename the core driver to analogix_dp_*,
leave the platform code to analogix_dp-exynos.
Signed-off-by: Yakir Yang
---
Changes in v4:
- Take Rob suggest, update "analogix,hpd-gpios" to "hpd-gpios" DT pr
() in to achieve the compatibility hacks.
Signed-off-by: Yakir Yang
---
Changes in v4:
- Take Krzysztof suggest, provide backword compatibility with samsung.
- Take Thierry suggest, add "color-depth" and "color-space" dynamic parsed.
Changes in v3:
- Take Thierry Reding su
Analogix dp driver is split from exynos dp driver, so we just
make an copy of exynos_dp.txt, and then simplify exynos_dp.txt
Beside update some exynos dtsi file with the latest change
according to the devicetree binding documents.
Signed-off-by: Yakir Yang
---
Changes in v4:
- Take Krzysztof
Rockchip have three clocks for dp controller, we leave pclk_edp
to analogix_dp driver control, and keep the sclk_edp_24m and
sclk_edp in platform driver.
Signed-off-by: Yakir Yang
---
Changes in v4:
- Remove some deprecated DT properties in rockchip dp document.
Changes in v3:
- Take Thierry
Signed-off-by: Yakir Yang
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Add GNU license v2 declared and samsung copyright
drivers/gpu/drm/exynos/exynos_dp.c | 1 +
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 1 +
include/drm/bridge/analogix_dp.h
RK3288 need some special registers setting, we can separate
them out by the dev_type of plat_data.
Signed-off-by: Yakir Yang
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Fix compile failed dut to phy_pd_addr variable misspell error
drivers/gpu/drm/bridge/analogix
There are some IP limit on rk3288 that only support 4 physical lanes
of 2.7/1.6 Gbps/lane, so seprate them out by device_type flag.
Signed-off-by: Yakir Yang
---
Changes in v4:
- Take Thierry suggest, seprate the link-rate and lane-count limit
out with the device_type flag.
Changes in v3
Some edp screen do not have hpd signal, so we can't just return
failed when hpd plug in detect failed.
This is an hardware property, so we need add a devicetree property
"analogix,need-force-hpd" to indicate this sutiation.
Signed-off-by: Yakir Yang
---
Changes in v4: None
Chang
This change just make a little clean to make code more like
drm core expect, move hdp detect code from bridge->enable(),
and place them into connector->detect().
Signed-off-by: Yakir Yang
---
Changes in v4:
- Take Jingoo suggest, add commit messages.
Changes in v3:
- move dp hpd det
Display Port monitor could support kinds of mode which indicate
in monitor edid, not just one single display resolution which
defined in panel or devivetree property display timing.
Signed-off-by: Yakir Yang
---
Changes in v4:
- Call drm_panel_prepare() in .get_modes function, ensure panel
Hi Heiko,
On 11/27/2015 09:32 PM, Heiko Stübner wrote:
> Am Mittwoch, 28. Oktober 2015, 16:56:01 schrieb Yakir Yang:
>> There are some IP limit on rk3288 that only support 4 physical lanes
>> of 2.7/1.6 Gbps/lane, so seprate them out by device_type flag.
>>
>> Tested-b
rce-hpd" to indicate whether driver need foce
hpd when hpd detect failed.
- move dp hpd detect to connector detect function.
- Add edid modes parse support
Changes in v2:
- Remove new copyright (Jingoo)
- Fix compiled failed due to analogix_dp_device misspell
- Improved commit message more re
t the connector.
They reason why connector need register in helper driver is rockchip drm
haven't implement the atomic API, but Exynos drm have implement it, so
there would need two different connector helper functions, that's why we
leave the connector register in helper driver.
Signed-o
Fix some obvious alignment problems, like alignment and line
over 80 characters problems, make this easy to be maintained
later.
Signed-off-by: Yakir Yang
Reviewed-by: Krzysztof Kozlowski
Tested-by: Javier Martinez Canillas
---
Changes in v10: None
Changes in v9: None
Changes in v8: None
2Gbps, 2.7Gbps, 5.4Gbps}.
Signed-off-by: Yakir Yang
Tested-by: Javier Martinez Canillas
---
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4:
- Update commit message more readable. (Jingoo)
- Adjust the order from
: Yakir Yang
Reviewed-by: Krzysztof Kozlowski
Tested-by: Javier Martinez Canillas
---
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7:
- Back to use the of_property_read_bool() interfacs to provoid backward
compatibility of "hsync-active-high" "vs
Analogix dp driver is split from exynos dp driver, so we just
make an copy of exynos_dp.txt, and then simplify exynos_dp.txt
Beside update some exynos dtsi file with the latest change
according to the devicetree binding documents.
Signed-off-by: Yakir Yang
Tested-by: Javier Martinez Canillas
compatibility is fully preserved, so there are no
bisectability break that make this change in a separate patch.
Signed-off-by: Yakir Yang
Reviewed-by: Krzysztof Kozlowski
Tested-by: Javier Martinez Canillas
---
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes
Rockchip have three clocks for dp controller, we leave pclk_edp
to analogix_dp driver control, and keep the sclk_edp_24m and
sclk_edp in platform driver.
Signed-off-by: Yakir Yang
Tested-by: Javier Martinez Canillas
---
Changes in v10:
- Correct the ROCKCHIP_ANALOGIX_DP indentation in Kconfig
Rockchip DP driver is a helper driver of analogix_dp coder driver,
so most of the DT property should be descriped in analogix_dp document.
Signed-off-by: Yakir Yang
Reviewed-by: Heiko Stuebner
---
Changes in v10: None
Changes in v9:
- Document more details for 'ports' property.
Cha
Add phy driver for the Rockchip DisplayPort PHY module. This
is required to get DisplayPort working in Rockchip SoCs.
Signed-off-by: Yakir Yang
Reviewed-by: Heiko Stuebner
---
Changes in v10:
- Fix the wrong macro value of GRF_EDP_REF_CLK_SEL_INTER_HIWORD_MASK
BIT(4) -> BIT(20)
Changes
Add dt binding documentation for rockchip display port PHY.
Signed-off-by: Yakir Yang
Reviewed-by: Heiko Stuebner
---
Changes in v10: None
Changes in v9: None
Changes in v8:
- Remove the specific address in the example node name. (Heiko)
Changes in v7:
- Simplify the commit message. (Kishon
From: Mark Yao
Add bpc and color mode setting in rockchip_drm_vop driver, so
connector could try to use the edid drm_display_info to config
vop output mode.
Signed-off-by: Mark Yao
Signed-off-by: Yakir Yang
---
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
RK3288 need some special registers setting, we can separate
them out by the dev_type of plat_data.
Signed-off-by: Yakir Yang
Tested-by: Javier Martinez Canillas
---
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes
There are some IP limit on rk3288 that only support 4 physical lanes
of 2.7/1.6 Gbps/lane, so seprate them out by device_type flag.
Signed-off-by: Yakir Yang
Tested-by: Javier Martinez Canillas
---
Changes in v10:
- Remove the surplus "plat_data" check. (Heiko)
- switch (dp-
Some edp screen do not have hpd signal, so we can't just return
failed when hpd plug in detect failed.
This is an hardware property, so we need add a devicetree property
"analogix,need-force-hpd" to indicate this sutiation.
Signed-off-by: Yakir Yang
Tested-by: Javier Ma
do not start enabling DP at bind() phase
But for now the connector status don't hardcode to connected,
need to operate dp phy in .detect function, so we need to revert
parts if Gustavo Padovan's changes, add phy poweron
function in bind time.
Signed-off-by: Yakir Yang
Tested-by: Javier M
:
drm/exynos: do not start enabling DP at bind() phase
But for now driver need to read edid message in .get_modes()
function, so controller must be inited in bind time, so we
need to add controller init back.
Signed-off-by: Yakir Yang
Tested-by: Javier Martinez Canillas
---
Changes in v10: None
;t have this problem, then driver would received
the reply command very soon, so no more additional wait time would bring
to Exynos platform.
Signed-off-by: Yakir Yang
---
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
On 12/07/2015 02:38 PM, Yakir Yang wrote:
> Split the dp core driver from exynos directory to bridge directory,
> and rename the core driver to analogix_dp_*, rename the platform
> code to exynos_dp.
>
> Beside the new analogix_dp driver would export six hooks.
> "
t the connector.
They reason why connector need register in helper driver is rockchip drm
haven't implement the atomic API, but Exynos drm have implement it, so
there would need two different connector helper functions, that's why we
leave the connector register in helper driver.
Signed-o
Hi Rob,
Thanks
- Yakir
On 12/08/2015 11:01 PM, Rob Herring wrote:
> On Mon, Dec 07, 2015 at 02:39:07PM +0800, Yakir Yang wrote:
>> Analogix dp driver is split from exynos dp driver, so we just
>> make an copy of exynos_dp.txt, and then simplify exynos_dp.txt
>>
>> Bes
Hi Rob,
On 12/08/2015 11:03 PM, Rob Herring wrote:
> On Mon, Dec 07, 2015 at 02:39:34PM +0800, Yakir Yang wrote:
>> Rockchip DP driver is a helper driver of analogix_dp coder driver,
>> so most of the DT property should be descriped in analogix_dp document.
>>
>>
Hi Rob
On 12/08/2015 11:06 PM, Rob Herring wrote:
> On Mon, Dec 07, 2015 at 02:39:50PM +0800, Yakir Yang wrote:
>> Add dt binding documentation for rockchip display port PHY.
>>
>> Signed-off-by: Yakir Yang
>> Reviewed-by: Heiko Stuebner
> One possible typo below
Hi Rob,
Thanks for your respond.
On 12/08/2015 11:09 PM, Rob Herring wrote:
> On Mon, Dec 07, 2015 at 02:40:42PM +0800, Yakir Yang wrote:
>> Some edp screen do not have hpd signal, so we can't just return
>> failed when hpd plug in detect failed.
>>
>> This is
Analogix dp driver is split from exynos dp driver, so we just
make an copy of exynos_dp.txt, and then simplify exynos_dp.txt
Beside update some exynos dtsi file with the latest change
according to the devicetree binding documents.
Signed-off-by: Yakir Yang
Acked-by: Rob Herring
Tested-by
Rockchip DP driver is a helper driver of analogix_dp coder driver,
so most of the DT property should be descriped in analogix_dp document.
Signed-off-by: Yakir Yang
Acked-by: Rob Herring
Reviewed-by: Heiko Stuebner
---
Changes in v10.1:
- Add the ack from Rob Herring
Changes in v10: None
Add dt binding documentation for rockchip display port PHY.
Signed-off-by: Yakir Yang
Acked-by: Rob Herring
Reviewed-by: Heiko Stuebner
---
Changes in v10.1:
- Add the ack from Rob Herring
- Correct the title of this rockchip dp phy document(Rob)
Changes in v9: None
Changes in v8:
- Remove
Some edp screen do not have hpd signal, so we can't just return
failed when hpd plug in detect failed.
This is an hardware property, so we need add a devicetree property
"analogix,need-force-hpd" to indicate this sutiation.
Signed-off-by: Yakir Yang
Tested-by: Javier Ma
Hi Heiko,
Thanks a lot for great debugging.
On 12/08/2015 11:33 PM, Heiko Stübner wrote:
> Hi Yakir,
>
> Am Montag, 7. Dezember 2015, 14:37:19 schrieb Yakir Yang:
>> The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller
>> share the same IP, so a lot of
Hi Rob,
On 12/09/2015 12:25 PM, Rob Herring wrote:
> On Wed, Dec 09, 2015 at 10:10:39AM +0800, Yakir Yang wrote:
>> Some edp screen do not have hpd signal, so we can't just return
>> failed when hpd plug in detect failed.
>>
>> This is an hardware property, so w
Some edp screen do not have hpd signal, so we can't just return
failed when hpd plug in detect failed.
This is an hardware property, so we need add a devicetree property
"force-hpd" to indicate this sutiation.
Signed-off-by: Yakir Yang
Acked-by: Rob Herring
Tested-by: Javier Ma
Hi Heiko,
On 12/09/2015 10:51 PM, Heiko Stübner wrote:
> Hi Yakir,
>
> Am Mittwoch, 9. Dezember 2015, 11:49:10 schrieb Yakir Yang:
>> Thanks a lot for great debugging.
>>
>> On 12/08/2015 11:33 PM, Heiko Stübner wrote:
>>> Hi Yakir,
>>>
>>&g
do not start enabling DP at bind() phase
But for now the connector status don't hardcode to connected,
need to operate dp phy in .detect function, so we need to revert
parts if Gustavo Padovan's changes, add phy poweron
function in bind time.
Signed-off-by: Yakir Yang
Tested-by: Javier M
Turn off the panel power in suspend time would help to reduce
power waste.
Signed-off-by: Yakir Yang
---
This patch was introduced in v10.1, suggested by Heiko
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4
sh before
encoder disabled.
The flush work in bridge disable time is try to ensure the HPD event
won't be missed before display card disabled, actually we can take a
fast respond way(interrupt thread) to update DRM HPD event to fix the
delay update and possible dead lock.
Signed-off-by: Yakir Y
Hi Jean,
Sorry about miss your comments :)
On 01/29/2016 03:20 PM, Jean-Francois Moine wrote:
> On Fri, 29 Jan 2016 14:47:39 +0800
> Yakir Yang wrote:
>
>> The Innosilicon HDMI is a low power HDMI 1.4 transmitter
>> IP, and it have been integrated on some rockchip CPUs
&g
The Innosilicon HDMI is a low power HDMI 1.4 transmitter
IP, and it have been integrated on some rockchip CPUs
(like RK3036, RK312x).
Signed-off-by: Yakir Yang
---
Changes in v8.1:
- Removed the unused "drm_encoder_slave.h" head file. (Jean)
Changes in v8:
- Don't check whether
t the connector.
They reason why connector need register in helper driver is rockchip drm
haven't implement the atomic API, but Exynos drm have implement it, so
there would need two different connector helper functions, that's why we
leave the connector register in helper driver.
Signed-o
From: Heiko Stuebner
The core functionality now resides in the generic bridge part so the
exynos-specific implementation details can get a more suitable nameing.
Signed-off-by: Heiko Stuebner
---
This patch is splited from "[PATCH v13 01/17] drm: bridge: analogix/dp: split
exynos dp driver to b
From: Heiko Stuebner
In the original split we kept the register constants intact to keep the
diff small. Still the constants are Analogix-specific, so rename them now.
Signed-off-by: Heiko Stuebner
---
This patch is splited from "[PATCH v13 01/17] drm: bridge: analogix/dp: split
exynos dp drive
t the connector.
They reason why connector need register in helper driver is rockchip drm
haven't implement the atomic API, but Exynos drm have implement it, so
there would need two different connector helper functions, that's why we
leave the connector register in helper driver.
Signed-off-
From: Heiko Stuebner
The core functionality now resides in the generic bridge part so the
exynos-specific implementation details can get a more suitable nameing.
Signed-off-by: Heiko Stuebner
Signed-off-by: Yakir Yang
---
Changes in v14: None
Changes in v13: None
Changes in v12: None
Changes
Fix some obvious alignment problems, like alignment and line
over 80 characters problems, make this easy to be maintained
later.
Signed-off-by: Yakir Yang
Acked-by: Jingoo Han
Reviewed-by: Krzysztof Kozlowski
Tested-by: Javier Martinez Canillas
---
Changes in v14: None
Changes in v13: None
Analogix dp driver is split from exynos dp driver, so we just
make an copy of exynos_dp.txt, and then simplify exynos_dp.txt
Beside update some exynos dtsi file with the latest change
according to the devicetree binding documents.
Signed-off-by: Yakir Yang
Acked-by: Rob Herring
---
Changes in
Rockchip DP driver is a helper driver of analogix_dp coder driver,
so most of the DT property should be descriped in analogix_dp document.
Signed-off-by: Yakir Yang
Acked-by: Rob Herring
Reviewed-by: Heiko Stuebner
---
Changes in v14: None
Changes in v13: None
Changes in v12: None
Changes in
RK3288 need some special registers setting, we can separate
them out by the dev_type of plat_data.
Signed-off-by: Yakir Yang
---
Changes in v14: None
Changes in v13: None
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Some edp screen do not have hpd signal, so we can't just return
failed when hpd plug in detect failed.
This is an hardware property, so we need add a devicetree property
"analogix,need-force-hpd" to indicate this sutiation.
Signed-off-by: Yakir Yang
Acked-by: Rob Herring
Te
do not start enabling DP at bind() phase
But for now the connector status don't hardcode to connected,
need to operate dp phy in .detect function, so we need to revert
parts if Gustavo Padovan's changes, add phy poweron
function in bind time.
Signed-off-by: Yakir Yang
Tested-by: Javier M
:
drm/exynos: do not start enabling DP at bind() phase
But for now driver need to read edid message in .get_modes()
function, so controller must be inited in bind time, so we
need to add controller init back.
Signed-off-by: Yakir Yang
Tested-by: Javier Martinez Canillas
---
Changes in v14: None
Turn off the panel power in suspend time would help to reduce
power waste.
Signed-off-by: Yakir Yang
---
Changes in v14: None
Changes in v13: None
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
From: Heiko Stuebner
In the original split we kept the register constants intact to keep the
diff small. Still the constants are Analogix-specific, so rename them now.
Signed-off-by: Heiko Stuebner
Signed-off-by: Yakir Yang
---
Changes in v14: None
Changes in v13: None
Changes in v12: None
: Yakir Yang
Reviewed-by: Krzysztof Kozlowski
Tested-by: Javier Martinez Canillas
---
Changes in v14: None
Changes in v13: None
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7:
- Back to use the of_property_read_bool() interfacs to
compatibility is fully preserved, so there are no
bisectability break that make this change in a separate patch.
Signed-off-by: Yakir Yang
Reviewed-by: Krzysztof Kozlowski
Tested-by: Javier Martinez Canillas
---
Changes in v14: None
Changes in v13: None
Changes in v12: None
Changes in v11: None
There are some IP limit on rk3288 that only support 4 physical lanes
of 2.7/1.6 Gbps/lane, so seprate them out by device_type flag.
Signed-off-by: Yakir Yang
Tested-by: Javier Martinez Canillas
---
Changes in v14: None
Changes in v13: None
Changes in v12: None
Changes in v11: None
Changes in
val = exynos_dp_read_bytes_from_i2c(...
...);
+ retval =
+ exynos_dp_read_bytes_from_i2c(..);
- Get panel node with remote-endpoint method, and create devicetree binding
for driver. (Heiko)
- Remove the clock enable/disbale with "sclk_edp&quo
2Gbps, 2.7Gbps, 5.4Gbps}.
Signed-off-by: Yakir Yang
Tested-by: Javier Martinez Canillas
---
Changes in v14: None
Changes in v13: None
Changes in v12:
- Remove the enum link_rate_type struct, using the marcos in drm_dp_helper.h
(Jingoo)
Changes in v11: None
Changes in v10: None
Changes in v9: None
Ch
Rockchip have three clocks for dp controller, we leave pclk_edp
to analogix_dp driver control, and keep the sclk_edp_24m and
sclk_edp in platform driver.
Signed-off-by: Yakir Yang
Tested-by: Javier Martinez Canillas
---
Changes in v14: None
Changes in v13:
- Use .enable instead of preprare
sh before
encoder disabled.
The flush work in bridge disable time is try to ensure the HPD event
won't be missed before display card disabled, actually we can take a
fast respond way(interrupt thread) to update DRM HPD event to fix the
delay update and possible dead lock.
Signed-off-by: Yakir Y
Hi Thierry,
Thanks for your suggest :)
On 09/21/2015 05:15 PM, Thierry Reding wrote:
> On Mon, Sep 21, 2015 at 04:45:44PM +0800, Yakir Yang wrote:
>> Hi Heiko,
>>
>> On 09/02/2015 10:15 AM, Yakir Yang wrote:
>>> Hi Heiko,
>>>
>>> å¨ 09/02/201
Hi Thierry,
On 09/21/2015 07:22 PM, Thierry Reding wrote:
> On Mon, Sep 21, 2015 at 06:27:40PM +0800, Yakir Yang wrote:
>> Hi Thierry,
>>
>> Thanks for your suggest :)
>>
>> On 09/21/2015 05:15 PM, Thierry Reding wrote:
>>> On Mon, Sep 21, 2015 at 04:45:4
er is rockchip drm
haven't implement the atomic API, but Exynos drm have implement it, so
there would need two different connector helper functions, that's why we
leave the connector register in helper driver.
Signed-off-by: Yakir Yang
---
Changes in v5:
- Correct the check condition
2Gbps, 2.7Gbps, 5.4Gbps}.
Signed-off-by: Yakir Yang
---
Changes in v5: None
Changes in v4:
- Update commit message more readable. (Jingoo)
- Adjust the order from 05 to 04
Changes in v3:
- The link_rate and lane_count shouldn't config to the DT property value
directly, but we can take those a
: Yakir Yang
---
Changes in v5:
- Switch video timing type to "u32", so driver could use "of_property_read_u32"
to get the backword timing values. Krzysztof suggest me that driver could use
the "of_property_read_bool" to get backword timing values, but that interfa
24M>;
clock-names = "24m";
#phy-cells = <0>;
};
Signed-off-by: Yakir Yang
---
Changes in v5:
- Split binding doc's from driver changes. (Rob)
- Update the rockchip,grf explain in document, and correct the clock required
elemets in docu
Display Port monitor could support kinds of mode which indicate
in monitor edid, not just one single display resolution which
defined in panel or devivetree property display timing.
Signed-off-by: Yakir Yang
---
Changes in v5: None
Changes in v4:
- Call drm_panel_prepare() in .get_modes function
parse support
Changes in v2:
- Keep author name list no changed (Jingoo)
- Remove new copyright (Jingoo)
- Fix compiled failed due to analogix_dp_device misspell
- Improved commit message more readable, and avoid using some
uncommon style like bellow: (Joe Preches)
- retval = exynos_dp_read_byte
In order to move exynos dp code to bridge directory,
we need to convert driver drm bridge mode first. As
dp driver already have a ptn3460 bridge, so we need
to move ptn bridge to the next bridge of dp bridge.
Signed-off-by: Yakir Yang
---
Changes in v5: None
Changes in v4: None
Changes in v3
Fix some obvious alignment problems, like alignment and line
over 80 characters problems, make this easy to be maintained
later.
Signed-off-by: Yakir Yang
---
Changes in v5:
- Resequence this patch after analogix_dp driver have been split
from exynos_dp code, and rephrase reasonable commit
Analogix dp driver is split from exynos dp driver, so we just
make an copy of exynos_dp.txt, and then simplify exynos_dp.txt
Beside update some exynos dtsi file with the latest change
according to the devicetree binding documents.
Signed-off-by: Yakir Yang
---
Changes in v5: None
Changes in v4
From: Mark Yao
Add bpc and color mode setting in rockchip_drm_vop driver, so
connector could try to use the edid drm_display_info to config
vop output mode.
Signed-off-by: Mark Yao
Signed-off-by: Yakir Yang
---
Changes in v5:
- Fix compiled error (Heiko)
- Using the connector display info
Rockchip have three clocks for dp controller, we leave pclk_edp
to analogix_dp driver control, and keep the sclk_edp_24m and
sclk_edp in platform driver.
Signed-off-by: Yakir Yang
---
Changes in v5:
- Remove the empty line at the end of document, and correct the endpoint
numbers in the example
Some edp screen do not have hpd signal, so we can't just return
failed when hpd plug in detect failed.
This is an hardware property, so we need add a devicetree property
"analogix,need-force-hpd" to indicate this sutiation.
Signed-off-by: Yakir Yang
---
Changes in v5: None
Chan
This change just make a little clean to make code more like
drm core expect, move hdp detect code from bridge->enable(),
and place them into connector->detect().
Signed-off-by: Yakir Yang
---
Changes in v5: None
Changes in v4:
- Take Jingoo suggest, add commit messages.
Changes in v3:
- m
RK3288 need some special registers setting, we can separate
them out by the dev_type of plat_data.
Signed-off-by: Yakir Yang
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- Fix compile failed dut to phy_pd_addr variable misspell error
drivers/gpu/drm/bridge
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