property and set mdp clk during resume sequence.
- Add fixes tag.
Changes in v3:
- Remove extra line after fixes tag.(Stephen Boyd)
Fixes: 62fbdce91("arm64: dts: qcom: sc7280: add display dt nodes")
Signed-off-by: Vinod Polimera
Reviewed-by: Stephen Boyd
---
arch/arm64/boot/dts/qcom/s
use max clock during probe/bind sequence from the opp table.
The clock will be scaled down when framework sends an update.
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
b
m8250.dtsi: add display system nodes")
Signed-off-by: Vinod Polimera
Reviewed-by: Stephen Boyd
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi
b/arch/arm64/boot/dts/qcom/sm8250.dtsi
ind
dm845: Add dpu to sdm845 dts file")
Signed-off-by: Vinod Polimera
Reviewed-by: Stephen Boyd
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
ind
c7180: add display dt nodes")
Signed-off-by: Vinod Polimera
Reviewed-by: Stephen Boyd
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi
b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index e1c46b
uency in opp
table"
Changes in v4:
- Add similar change for sm8250.(Dmitry)
Changes in v5:
- Add change to set mdp clk to max frequency in opp table during mdp probe/bind.
Vinod Polimera (5):
arm64/dts/qcom/sc7280: remove assigned-clock-rate property for mdp clk
arm64/dts/qcom/sc71
e
> sequence.
> > - Add fixes tag.
> >
> > Changes in v3:
> > - Remove extra line after fixes tag.(Stephen Boyd)
>
> This changelog should be removed.
>
> >
> > Fixes: 62fbdce91("arm64: dts: qcom: sc7280: add display dt nodes")
>
> I thought folks were saying that this is bad to keep? I don't really
> mind either way, but I guess it's better to drop the fixes tag because
> this is largely a performance improvement?
>
> > Signed-off-by: Vinod Polimera
> > Reviewed-by: Stephen Boyd
Drop the assigned clock rate property and vote on the mdp clock as per
calculated value during the usecase.
This patch is dependent on below patch
https://patchwork.kernel.org/patch/12774067/
Signed-off-by: Vinod Polimera
Reviewed-by: Stephen Boyd
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 9
Drop the assigned clock rate property and vote on the mdp clock as per
calculated value during the usecase.
This patch is dependent on below patch
https://patchwork.kernel.org/patch/12774067/
Signed-off-by: Vinod Polimera
Reviewed-by: Stephen Boyd
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 9
ncy in opp table during mdp probe/bind.
Changes in v6:
- Remove change log in dt patch.
- Fix the leak reference for opp by adding dev_pm_opp_put. (Dmitry)
Vinod Polimera (5):
drm/msm/disp/dpu1: set mdp clk to the maximum frequency in opp table
during probe
arm64: dts: qcom: sm7280: remov
use max clock during probe/bind sequence from the opp table.
The clock will be scaled down when framework sends an update.
Fixes: 25fdd5933("drm/msm: Add SDM845 DPU support")
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 8
1 file changed, 8
Drop the assigned clock rate property and vote on the mdp clock as per
calculated value during the usecase.
This patch is dependent on below patch
https://patchwork.kernel.org/patch/12774067/
Signed-off-by: Vinod Polimera
Reviewed-by: Stephen Boyd
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 9
Drop the assigned clock rate property and vote on the mdp clock as per
calculated value during the usecase.
This patch is dependent on below patch
https://patchwork.kernel.org/patch/12774067/
Signed-off-by: Vinod Polimera
Reviewed-by: Stephen Boyd
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 9
of any links or attachments, and do not enable macros.
>
> On Tue, 8 Mar 2022 at 19:55, Vinod Polimera
> wrote:
> >
> > use max clock during probe/bind sequence from the opp table.
> > The clock will be scaled down when framework sends an update.
> >
> > Signe
>
> Hi,
>
> On Tue, Mar 8, 2022 at 8:55 AM Vinod Polimera
> wrote:
> >
> > use max clock during probe/bind sequence from the opp table.
> > The clock will be scaled down when framework sends an update.
> >
> > Signed-off-by: Vinod Polimera
>
> -Original Message-
> From: Doug Anderson
> Sent: Monday, March 14, 2022 7:28 PM
> To: dmitry.barysh...@linaro.org
> Cc: Vinod Polimera ; Stephen Boyd
> ; quic_vpolimer ;
> devicet...@vger.kernel.org; dri-devel@lists.freedesktop.org;
> freedr...@lists.fr
: Kalyan Thota
Signed-off-by: Vinod Polimera
---
arch/arm64/configs/defconfig | 4 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 218 +++--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 18 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 119
based on supported rotations for each hw.
Co-developed-by: Kalyan Thota
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 187 ++---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 18 +++
drivers/gpu/drm/msm
based on supported rotations for each hw.
Changes in V5:
- update boolean value to true/false and add it for qcm2290.
Co-developed-by: Kalyan Thota
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 187
y
> of any links or attachments, and do not enable macros.
>
> Quoting Vinod Polimera (2022-03-14 07:46:53)
> > use max clock during probe/bind sequence from the opp table.
> > The clock will be scaled down when framework sends an update.
>
> Capitalize 'use'
2-git-send-email-quic_vpoli...@quicinc.com/
Signed-off-by: Vinod Polimera
Reviewed-by: Stephen Boyd
Reviewed-by: Douglas Anderson
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm6
2-git-send-email-quic_vpoli...@quicinc.com/
Signed-off-by: Vinod Polimera
Reviewed-by: Stephen Boyd
Reviewed-by: Douglas Anderson
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi
b/arch/arm6
2-git-send-email-quic_vpoli...@quicinc.com/
Signed-off-by: Vinod Polimera
Reviewed-by: Stephen Boyd
Reviewed-by: Douglas Anderson
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
b/arch/arm6
want to transition it to kernel without underflowing.
The clock will be scaled down later when framework sends an update.
Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support")
Signed-off-by: Vinod Polimera
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Douglas Anderson
---
drivers/gpu/dr
2-git-send-email-quic_vpoli...@quicinc.com/
Signed-off-by: Vinod Polimera
Reviewed-by: Stephen Boyd
Reviewed-by: Douglas Anderson
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi
b/arch/arm6
opp table
during mdp probe/bind.
Changes in v6:
- Remove change log in dt patch.
- Fix the leak reference for opp by adding dev_pm_opp_put. (Dmitry)
Changes in v7:
- Update commit message and fix tag. (Stephen/Doug)
Vinod Polimera (5):
drm/msm/disp/dpu1: set mdp clk to the maximum frequency in
: Kalyan Thota
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h| 21 +++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 185 ++---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 18 +++
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 109
:
- Rebase changes to the latest code base.
- Append rotation config variables with v2 and
remove unused variables.(Dmitry)
- Move pixel_ext setup separately from scaler3 config.(Dmitry)
- Add 270 degree rotation to supported rotation list.(Dmitry)
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod
Panels with higher refresh rate will need mdp clk above 300Mhz.
Select max frequency for mdp clock during bootup, dpu driver will
scale down the clock as per usecase when first update from the framework is
received.
Signed-off-by: Vinod Polimera
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 2
Use atomic enable/disable for bridge callbacks to access certain
states like self-refresh.
This change avoids panel prepare/unprepare based on self-refresh
state.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
Changes in V2:
- As per review
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 31 +
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 30 +++-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 2 +-
3 files changed, 57 insertions(+), 6 deletions
Use atomic variants for encoder callback functions such that
certain states like self-refresh can be accessed as part of
enable/disable sequence.
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
Changes in v2:
- As per review suggestion by Dmitry.
---
drivers/gpu/drm/msm/disp/dpu1
*** BLURB HERE ***
Vinod Polimera (4):
drm/msm/dp: Add basic PSR support for eDP
drm/bridge: use atomic enable/disable for bridge callbacks
drm/msm/disp/dpu1: use atomic enable/disable callbacks for encoder
functions
drm/msm/disp/dpu1: add PSR support for eDP interface in dpu driver
Add support for basic panel self refresh (PSR) feature for eDP.
Add a new interface to set PSR state in the sink from DPU.
Program the eDP controller to issue PSR enter and exit SDP to
the sink.
Signed-off-by: Sankeerth Billakanti
Changes in v2:
- Use dp bridge to set psr entry/exit instead of
*** BLURB HERE ***
Vinod Polimera (2):
arm64/dts/qcom/sc7280: remove assigned-clock-rate property for mdp clk
drm/msm/disp/dpu1: set mdp clk to the maximum frequency in opp table
arch/arm64/boot/dts/qcom/sc7280.dtsi| 9 ++---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 3 +++
2 files
use max clock during resume sequence from the opp table.
The clock will be scaled down when framework sends an update.
Fixes: 62fbdce91("arm64: dts: qcom: sc7280: add display dt nodes")
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 3 +++
1 file
: add display dt nodes")
Signed-off-by: Vinod Polimera
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index baf1653..408cf6c 100644
--- a/arch/
*** BLURB HERE ***
Vinod Polimera (3):
arm64/dts/qcom/sc7280: remove assigned-clock-rate property for mdp clk
arm64/dts/qcom/sc7180: remove assigned-clock-rate property for mdp clk
arm64/dts/qcom/sdm845: remove assigned-clock-rate property for mdp clk
arch/arm64/boot/dts/qcom/sc7180.dtsi
uency in opp
table"
Fixes: 62fbdce91("arm64: dts: qcom: sc7280: add display dt nodes")
Signed-off-by: Vinod Polimera
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
b/arch
c7180: add display dt nodes")
Signed-off-by: Vinod Polimera
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi
b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index e1c46b8..eaab746 100644
--- a/
dm845: Add dpu to sdm845 dts file")
Signed-off-by: Vinod Polimera
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 0d6286d..80dc486 100644
om: sc7280: add display dt nodes")
>
> Presumably this is the wrong fixes tag, see below.
>
> >
> > Signed-off-by: Vinod Polimera
> > ---
> > drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 3 +++
> > 1 file changed, 3 insertions(+)
> >
> > dif
uency in opp
table"
Changes in v4:
- Add similar change for sm8250.(Dmitry)
Vinod Polimera (4):
arm64/dts/qcom/sc7280: remove assigned-clock-rate property for mdp clk
arm64/dts/qcom/sc7180: remove assigned-clock-rate property for mdp clk
arm64/dts/qcom/sdm845: remove assigned-clock-rat
c7180: add display dt nodes")
Signed-off-by: Vinod Polimera
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi
b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index e1c46b8..eaab746 100644
--- a/
m8250.dtsi: add display system nodes")
Signed-off-by: Vinod Polimera
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi
b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index fdaf303..2105eb7 100644
dm845: Add dpu to sdm845 dts file")
Signed-off-by: Vinod Polimera
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 0d6286d..80dc486 100644
property and set mdp clk during resume sequence.
- Add fixes tag.
Changes in v3:
- Remove extra line after fixes tag.(Stephen Boyd)
Fixes: 62fbdce91("arm64: dts: qcom: sc7280: add display dt nodes")
Signed-off-by: Vinod Polimera
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 ++-
indentation.
- Add check if 90 rotation is supported and add supported rotations to rot_cfg.
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 44 +++---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 17
drivers/gpu/drm/msm
> WARNING: This email originated from outside of Qualcomm. Please be wary
> of any links or attachments, and do not enable macros.
>
> On 18/02/2022 14:30, Vinod Polimera wrote:
> > - Some DPU versions support inline rot90. It is supported only for
> > limited amount of U
t;
> > > On Fri, 4 Mar 2022 at 02:56, Stephen Boyd
> wrote:
> > > >
> > > > Quoting Dmitry Baryshkov (2022-03-03 15:50:50)
> > > > > On Thu, 3 Mar 2022 at 12:40, Vinod Polimera
> wrote:
> > > > > >
> > > > >
el0_svc_compat+0x20/0x70
el0t_32_sync_handler+0xa8/0xcc
el0t_32_sync+0x1a8/0x1ac
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/msm_drv.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 4448536..d62ac66
truct dpu_irq into struct
dpu_hw_intr")
Signed-off-by: Vinod Polimera
Reviewed-by: Stephen Boyd
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
b/drive
el0_svc_compat+0x20/0x70
el0t_32_sync_handler+0xa8/0xcc
el0t_32_sync+0x1a8/0x1ac
Changes in v2:
- Add fixes tag.
Fixes: 623f279c778 ("drm/msm: fix shutdown hook in case GPU components failed
to bind")
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/msm_drv.c | 6 +-
1 file changed, 5
> -Original Message-
> From: Dmitry Baryshkov
> Sent: Friday, June 3, 2022 3:07 PM
> To: Vinod Polimera (QUIC) ; dri-
> de...@lists.freedesktop.org; linux-arm-...@vger.kernel.org;
> freedr...@lists.freedesktop.org; devicet...@vger.kernel.org
> Cc: linux-ker...@vg
Use atomic variants for encoder callback functions such that
certain states like self-refresh can be accessed as part of
enable/disable sequence.
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 10 ++
1 file changed, 6
This change avoids panel prepare/unprepare based on self-refresh
state.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/bridge/panel.c | 102 +++--
1 file changed, 98 insertions(+), 4
Enable PSR on eDP interface using drm self-refresh librabry.
This patch uses a trigger from self-refresh library to enter/exit
into PSR, when there are no updates from framework.
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 36
Use atomic variants for panel bridge callback functions such that
certain states like self-refresh can be accessed as part of
enable/disable sequence.
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/bridge/panel.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff
Add support for basic panel self refresh (PSR) feature for eDP.
Add a new interface to set PSR state in the sink from DPU.
Program the eDP controller to issue PSR enter and exit SDP to
the sink.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/dp
form.
- Define bit fields for PSR settings.
- Add comments explaining the steps to enter/exit psr.
- Change DRM_INFO to drm_dbg_db.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
Vinod Polimera (5):
drm/msm/dp: Add basic PSR support for eDP
yant ; Sankeerth Billakanti (QUIC)
> ; quic_vproddut
> Subject: Re: [PATCH v2 4/4] drm/msm/disp/dpu1: add PSR support for eDP
> interface in dpu driver
>
> WARNING: This email originated from outside of Qualcomm. Please be wary
> of any links or attachments, and do not enable macros.
>
&
Add support for basic panel self refresh (PSR) feature for eDP.
Add a new interface to set PSR state in the sink from DPU.
Program the eDP controller to issue PSR enter and exit SDP to
the sink.
Signed-off-by: Sankeerth Billakanti
---
drivers/gpu/drm/msm/dp/dp_catalog.c | 81
Enable PSR on eDP interface using drm self-refresh librabry.
This patch uses a trigger from self-refresh library to enter/exit
into PSR, when there are no updates from framework.
Signed-off-by: Vinod Polimera
Signed-off-by: Kalyan Thota
---
drivers/gpu/drm/bridge/panel.c | 64
rpm_callback+0x30/0x88
rpm_resume+0x36c/0x49c
__pm_runtime_resume+0x80/0xb0
dpu_core_irq_uninstall+0x30/0xb0
dpu_irq_uninstall+0x18/0x24
msm_drm_uninit+0xd8/0x16c
Fixes: 25fdd5933e4 ("drm/msm: Add SDM845 DPU support")
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm
+0xc4/0x150
device_initial_probe+0x1c/0x28
Fixes: a73033619ea ("drm/msm/dpu: squash dpu_core_irq into dpu_hw_interrupts")
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/msm
ned-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
index c515b7c..ab28577 100644
--- a/drivers/gpu/drm/msm
Add support for basic panel self refresh (PSR) feature for eDP.
Add a new interface to set PSR state in the sink from DPU.
Program the eDP controller to issue PSR enter and exit SDP to
the sink.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/dp
Use atomic variants for encoder callback functions such that
certain states like self-refresh can be accessed as part of
enable/disable sequence.
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 10
ff-by: Sankeerth Billakanti
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
Vinod Polimera (7):
drm/msm/disp/dpu1: clear dpu_assign_crtc and get crtc from drm_enc
instead of dpu_enc
drm: add helper functions to retrieve old and new crtc
drm/msm/dp: Add basic PSR support fo
Add new helper functions, drm_atomic_get_old_crtc_for_encoder
and drm_atomic_get_new_crtc_for_encoder to retrieve the
corresponding crtc for the encoder.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/drm_atomic.c | 60
This change will handle the psr entry exit cases in the panel
bridge atomic callback functions. For example, the panel power
should not turn off if the panel is entering psr.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/bridge/panel.c | 48
Update crtc retrieval from dpu_enc to drm_enc, since new links get set
as part of the update legacy mode set. The dpu_enc->crtc cache is no
more needed, hence cleaning it as part of this change.
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 4
drivers/
Enable PSR on eDP interface using drm self-refresh librabry.
This patch uses a trigger from self-refresh library to enter/exit
into PSR, when there are no updates from framework.
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 13
Use atomic variants for panel bridge callback functions such that
certain states like self-refresh can be accessed as part of
enable/disable sequence.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/bridge/panel.c | 20
1 file changed
ryshkov
> Sent: Wednesday, July 6, 2022 12:34 AM
> To: Vinod Polimera (QUIC) ; dri-
> de...@lists.freedesktop.org; linux-arm-...@vger.kernel.org;
> freedr...@lists.freedesktop.org; devicet...@vger.kernel.org
> Cc: linux-ker...@vger.kernel.org; robdcl...@gmail.com;
> dian
,
edp_bridge_mode_valid under the eDP bridge ops.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/dp/dp_display.c | 8
drivers/gpu/drm/msm/dp/dp_drm.c | 34 +-
2 files changed, 33 insertions(+), 9 deletions(-)
diff
Add support for basic panel self refresh (PSR) feature for eDP.
Add a new interface to set PSR state in the sink from DPU.
Program the eDP controller to issue PSR enter and exit SDP to
the sink.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/dp
Use atomic variants for encoder callback functions such that
certain states like self-refresh can be accessed as part of
enable/disable sequence.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 10
Update crtc retrieval from dpu_enc to dpu_enc connector state,
since new links get set as part of the dpu enc virt mode set.
The dpu_enc->crtc cache is no more needed, hence cleaning it as
part of this change.
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c|
Use atomic variants for DP bridge callback functions so that
the atomic state can be accessed in the interface drivers.
The atomic state will help the driver find out if the display
is in self refresh state.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm
Add support for basic panel self refresh (PSR) feature for eDP.
Add a new interface to set PSR state in the sink from DPU.
Program the eDP controller to issue PSR enter and exit SDP to
the sink.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/dp
Enable PSR on eDP interface using drm self-refresh librabry.
This patch uses a trigger from self-refresh library to enter/exit
into PSR, when there are no updates from framework.
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 13
Use atomic variants for panel bridge callback functions such that
certain states like self-refresh can be accessed as part of
enable/disable sequence.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/bridge/panel.c | 20
Add new helper functions, drm_atomic_get_old_crtc_for_encoder
and drm_atomic_get_new_crtc_for_encoder to retrieve the
corresponding crtc for the encoder.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/drm_atomic.c | 60
This change will handle the psr entry exit cases in the panel
bridge atomic callback functions. For example, the panel power
should not turn off if the panel is entering psr.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/bridge/panel.c | 48
According to KMS documentation, The driver must not release any shared
resources if active is set to false but enable still true.
Fixes: ccc862b957c6 ("drm/msm/dpu: Fix reservation failures in modeset")
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2
urces.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
Vinod Polimera (10):
drm/msm/disp/dpu1: clear dpu_assign_crtc and get crtc from connector
state instead of dpu_enc
drm: add helper functions to retrieve old and new crtc
drm/msm/dp: use a
dpu_find_format inline function to separate commit. (Dmitry)
- Remove rot_cfg from SSPP_BLK and use DPU_SSPP_INLINE_ROTATION caps
to append supported rotations. (Dmitry)
- Misc Changes.
Co-developed-by: Kalyan Thota
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
Vinod Polimera (2):
drm/msm
-by: Kalyan Thota
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 173 +++--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 16 +++
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 129 ++
drivers
Check if the dpu format is supported or not using dpu_find_format.
Co-developed-by: Kalyan Thota
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h | 22 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 10
dpu_find_format inline function to separate commit. (Dmitry)
- Remove rot_cfg from SSPP_BLK and use DPU_SSPP_INLINE_ROTATION caps
to append supported rotations. (Dmitry)
- Misc Changes.
Changes in V8:
- Misc changes.
Co-developed-by: Kalyan Thota
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
Check if the dpu format is supported or not using dpu_find_format.
Co-developed-by: Kalyan Thota
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h | 22 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 10
-by: Kalyan Thota
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 43 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 16 +++
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 129 -
drivers/gpu/drm
> -Original Message-
> From: Doug Anderson
> Sent: Friday, July 29, 2022 5:48 AM
> To: Vinod Polimera (QUIC)
> Cc: dri-devel ; linux-arm-msm m...@vger.kernel.org>; freedreno ;
> open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
> ; LKML ; Rob
> Clar
,
edp_bridge_mode_valid under the eDP bridge ops.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_display.c | 8
drivers/gpu/drm/msm/dp/dp_drm.c | 34 +-
2 files changed, 33
Update crtc retrieval from dpu_enc to dpu_enc connector state,
since new links get set as part of the dpu enc virt mode set.
The dpu_enc->crtc cache is no more needed, hence cleaning it as
part of this change.
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c|
Reset the datapath after disabling the timing gen, such that
it can start on a clean slate when the intf is enabled back.
This was a recommended sequence from the DPU HW programming guide.
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 1 +
1 file
Use atomic variants for DP bridge callback functions so that
the atomic state can be accessed in the interface drivers.
The atomic state will help the driver find out if the display
is in self refresh state.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
Reviewed-by: Dmitry
Add support for basic panel self refresh (PSR) feature for eDP.
Add a new interface to set PSR state in the sink from DPU.
Program the eDP controller to issue PSR enter and exit SDP to
the sink.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
Reviewed-by: Dmitry Baryshkov
Add new helper functions, drm_atomic_get_old_crtc_for_encoder
and drm_atomic_get_new_crtc_for_encoder to retrieve the
corresponding crtc for the encoder.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
Reviewed-by: Douglas Anderson
---
drivers/gpu/drm/drm_atomic.c | 60
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