Hello Brian,
(+Uma in cc)
Thanks for your comments, Let me try to fill-in for Harry to keep the
design discussion going. Please find my comments inline.
On 8/2/2021 10:00 PM, Brian Starkey wrote:
Hi,
Thanks for having a stab at this, it's a massive complex topic to
solve.
Do you have the th
On 3/9/2022 8:47 AM, Simon Ser wrote:
Hi,
Maybe it would be a good idea to state the intended use-case in the
commit message?
It was added in the second patch, but yeah, it makes more sense to add a
cover-letter probably.
And explain why the current (driver-specific IIRC) APIs
aren't e
On 3/10/2022 4:24 PM, Rob Clark wrote:
On Thu, Mar 10, 2022 at 1:55 AM Christian König
wrote:
Am 09.03.22 um 19:12 schrieb Rob Clark:
On Tue, Mar 8, 2022 at 11:40 PM Shashank Sharma
wrote:
From: Shashank Sharma
This patch adds a new sysfs event, which will indicate
the userland about
On 3/10/2022 6:10 PM, Rob Clark wrote:
On Thu, Mar 10, 2022 at 8:21 AM Sharma, Shashank
wrote:
On 3/10/2022 4:24 PM, Rob Clark wrote:
On Thu, Mar 10, 2022 at 1:55 AM Christian König
wrote:
Am 09.03.22 um 19:12 schrieb Rob Clark:
On Tue, Mar 8, 2022 at 11:40 PM Shashank Sharma
On 3/10/2022 7:33 PM, Abhinav Kumar wrote:
On 3/10/2022 9:40 AM, Rob Clark wrote:
On Thu, Mar 10, 2022 at 9:19 AM Sharma, Shashank
wrote:
On 3/10/2022 6:10 PM, Rob Clark wrote:
On Thu, Mar 10, 2022 at 8:21 AM Sharma, Shashank
wrote:
On 3/10/2022 4:24 PM, Rob Clark wrote:
On Thu
On 3/10/2022 8:35 PM, Rob Clark wrote:
On Thu, Mar 10, 2022 at 11:14 AM Sharma, Shashank
wrote:
On 3/10/2022 7:33 PM, Abhinav Kumar wrote:
On 3/10/2022 9:40 AM, Rob Clark wrote:
On Thu, Mar 10, 2022 at 9:19 AM Sharma, Shashank
wrote:
On 3/10/2022 6:10 PM, Rob Clark wrote:
On
On 3/10/2022 8:56 PM, Rob Clark wrote:
On Thu, Mar 10, 2022 at 11:44 AM Sharma, Shashank
wrote:
On 3/10/2022 8:35 PM, Rob Clark wrote:
On Thu, Mar 10, 2022 at 11:14 AM Sharma, Shashank
wrote:
On 3/10/2022 7:33 PM, Abhinav Kumar wrote:
On 3/10/2022 9:40 AM, Rob Clark wrote:
On
On 3/16/2022 10:50 PM, Rob Clark wrote:
On Tue, Mar 8, 2022 at 11:40 PM Shashank Sharma
wrote:
From: Shashank Sharma
This patch adds a new sysfs event, which will indicate
the userland about a GPU reset, and can also provide
some information like:
- process ID of the process involved with
] On Behalf Of Daniel Vetter
Sent: Wednesday, August 3, 2016 5:18 PM
To: Sharma, Shashank
Cc: dri-devel at lists.freedesktop.org; intel-gfx at lists.freedesktop.org;
ville.syrjala at linux.intel.com; rodrigo.vivi at gmail.com; Vetter, Daniel
Subject: Re: [PATCH 0/4]: Picture aspect ratio support
in our HWComposer, and I guess it would be
required for X and Wayland too, coz finally these guys issue the modeset.
So May be X server is not handling these flags, ignoring these flags, and
sending the flagless modeset back to libdrm.
Regards
Shashank
-Original Message-
From: Jose A
Thanks for the review, Sean.
My comments, inline.
Regards
Shashank
On 8/3/2016 11:10 PM, Sean Paul wrote:
> On Wed, Aug 3, 2016 at 6:56 AM, Shashank Sharma
> wrote:
>> This patch adds drm flag bits for aspect ratio information
>>
>> Currently drm flag bits don't have field for mode's picture
>>
Regards
Shashank
On 8/3/2016 11:14 PM, Sean Paul wrote:
> On Wed, Aug 3, 2016 at 6:56 AM, Shashank Sharma
> wrote:
>> Current DRM layer functions dont parse aspect ratio information
> s/dont/don't/
Got it.
>
>> while converting a user mode->kernel mode or viceversa. This
> s/viceversa/vice vers
Hello Emil,
Thanks for your time.
I have got mixed opinion on this.
IMHO we should expose them to userspace too, as UI agents like Hardware
composer/X/Wayland must know what does these
flags means, so that they can display them on the end user screen (like
settings menu)
But few people even
Thanks Daniel.
My comments, inline.
Regards
Shashank
On 8/4/2016 4:06 PM, Daniel Vetter wrote:
> On Thu, Aug 04, 2016 at 03:46:09PM +0530, Sharma, Shashank wrote:
>> Hello Emil,
>>
>> Thanks for your time.
>>
>> I have got mixed opinion on this.
>>
>>
Regards
Shashank
On 8/4/2016 5:04 PM, Emil Velikov wrote:
> On 4 August 2016 at 11:16, Sharma, Shashank
> wrote:
>> Hello Emil,
>>
>> Thanks for your time.
>>
>> I have got mixed opinion on this.
>>
>> IMHO we should expose them to userspa
Regards
Shashank
On 8/4/2016 7:46 PM, Jose Abreu wrote:
> Hi Sharma,
>
>
> On 03-08-2016 16:47, Sharma, Shashank wrote:
>> Hello Joes,
>>> I've also seen this before and I am using them in order to pass HDMI
>>> compliance. Without
>>> these p
Regards
Shashank
On 8/4/2016 9:39 PM, Daniel Vetter wrote:
> On Thu, Aug 04, 2016 at 03:31:45PM +0100, Emil Velikov wrote:
>> On 4 August 2016 at 14:15, Sharma, Shashank
>> wrote:
>>> On 8/4/2016 5:04 PM, Emil Velikov wrote:
>>>> On 4 August 2016 at
.
Will keep you in CC.
I am planning to send a new patch set by tonight.
Regards
Shashank
-Original Message-
From: daniel.vetter at ffwll.ch [mailto:daniel.vet...@ffwll.ch] On Behalf Of
Daniel Vetter
Sent: Tuesday, August 9, 2016 7:14 PM
To: Jose Abreu
Cc: Sharma, Shashank ; Emil Velikov
Hello Uma,
V7 looks good to me, please feel free to use for the whole series:
Reviewed-by: Shashank Sharma
Regards
Shashank
On 4/3/2019 1:50 AM, Uma Shankar wrote:
This patch series enables HDR support in drm. It basically defines
HDR metadata structures, property to pass content (after ble
per, Matthew D ;
> seanp...@chromium.org; brian.star...@arm.com; dcasta...@chromium.org;
> Sharma, Shashank
> Subject: Re: [v3 6/7] drm: Add Client Cap for advance gamma mode
>
> fre 2019-04-12 klockan 15:51 +0530 skrev Uma Shankar:
> > Introduced a client cap for advance cap mode
>
On 4/15/2019 7:42 PM, Lankhorst, Maarten wrote:
mån 2019-04-15 klockan 19:26 +0530 skrev Sharma, Shashank:
-Original Message-
From: Lankhorst, Maarten
Sent: Monday, April 15, 2019 4:28 PM
To: Shankar, Uma ; intel-gfx@lists.freedeskt
op.org; dri-
de...@lists.freedesktop.org
Cc: Syrjala
Hello Ville,
On 1/29/2019 9:33 PM, Ville Syrjälä wrote:
On Tue, Jan 29, 2019 at 03:57:29PM +, Shankar, Uma wrote:
-Original Message-
From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
Ville Syrjälä
Sent: Tuesday, January 29, 2019 9:14 PM
To: Shankar, U
Regards
Shashank
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
> Shankar, Uma
> Sent: Friday, February 8, 2019 5:45 PM
> To: Ville Syrjälä
> Cc: intel-...@lists.freedesktop.org; Syrjala, Ville
> ; dri-
> de...@lists.freedesktop.org;
Regards
Shashank
On 2/8/2019 6:22 PM, Ville Syrjälä wrote:
On Fri, Feb 08, 2019 at 12:36:25PM +, Sharma, Shashank wrote:
Regards
Shashank
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
Shankar, Uma
Sent: Friday, February 8, 2019
Regards
Shashank
On 2/8/2019 7:00 PM, Ville Syrjälä wrote:
On Fri, Feb 08, 2019 at 06:36:39PM +0530, Sharma, Shashank wrote:
Regards
Shashank
On 2/8/2019 6:22 PM, Ville Syrjälä wrote:
On Fri, Feb 08, 2019 at 12:36:25PM +, Sharma, Shashank wrote:
Regards
Shashank
-Original
Regards
Shashank
On 12/11/2018 11:44 PM, Uma Shankar wrote:
This patch adds a colorspace connector property, enabling
userspace to switch to various supported colorspaces.
This will help enable BT2020 along with other colorspaces.
v2: Addressed Maarten and Ville's review comments. Enhanced
th
Regards
Shashank
On 12/11/2018 11:44 PM, Uma Shankar wrote:
This patch attaches the colorspace connector property to the
hdmi connector. Based on colorspace change, modeset will be
triggered to switch to new colorspace.
Based on colorspace property value create an infoframe
with appropriate c
Regards
Shashank
On 12/12/2018 2:08 AM, Uma Shankar wrote:
This patch adds a blob property to get HDR metadata
information from userspace. This will be send as part
of AVI Infoframe to panel.
v2: Rebase and modified the metadata structure elements
as per Ville's POC changes.
Signed-off-by: U
Regards
Shashank
On 12/12/2018 2:08 AM, Uma Shankar wrote:
Add bit field and macro for extended tag in CEA block. Also,
declare macros for HDR metadata block.
This should have been a part of patch, where these macros are being
used, so that we can see it being used properly. While re-basing c
Regards
Shashank
On 12/12/2018 2:08 AM, Uma Shankar wrote:
HDR metadata block is introduced in CEA-861.3 spec.
Parsing the same to get the panel's HDR metadata.
v2: Rebase and added Ville's POC changes to the patch.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_edid.c | 45 ++
Regards
Shashank
On 12/12/2018 2:08 AM, Uma Shankar wrote:
CEA 861.3 spec adds colorimetry data block for HDMI.
Parsing the block to get the colorimetry data from
panel.
v2: Rebase
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_edid.c | 24
include/drm/drm_c
Regards
Shashank
On 12/12/2018 2:08 AM, Uma Shankar wrote:
Attach HDR metadata property to connector object.
v2: Rebase
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_hdmi.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/
Regards
Shashank
On 12/12/2018 2:08 AM, Uma Shankar wrote:
HDR source metadata set and get property implemented in this
patch.
Again, HDR output metadata ? How about re-arranging the line like "This
patch implements get() and set() functions for HDR output metadata
property" just to make it
Regards
Shashank
On 12/12/2018 2:08 AM, Uma Shankar wrote:
Enable Dynamic Range and Mastering Infoframe for HDR
content, which is defined in CEA 861.3 spec.
The metadata will be computed based on blending
policy in userspace compositors and passed as a connector
property blob to driver. The s
Regards
Shashank
On 12/12/2018 2:08 AM, Uma Shankar wrote:
Enable writing of HDR metadata infoframe to panel.
The data will be provid by usersapace compositors, based
on blending policies and passsed to driver through a blob
property.
v2: Rebase
Signed-off-by: Uma Shankar
---
drivers/gpu/
Regards
Shashank
On 12/12/2018 2:08 AM, Uma Shankar wrote:
From: Ville Syrjälä
ADD HLG EOTF to the list of EOTF transfer functions
supported.
Would it be possible to add some details about HLG ?
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_edid.c | 4
Regards
Shashank
On 12/12/2018 2:08 AM, Uma Shankar wrote:
From: Ville Syrjälä
This patch enables infoframes on GLK+ to be
used to send HDR metadata to HDMI sink.
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/i915_reg.h | 4
drivers/gpu/drm/i9
Regards
Shashank
On 12/12/2018 2:08 AM, Uma Shankar wrote:
From: Ville Syrjälä
Function argument for hdmi_drm_infoframe_log is made constant.
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/video/hdmi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
Regards
Shashank
On 1/8/2019 11:10 AM, Shankar, Uma wrote:
-Original Message-
From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
Sharma, Shashank
Sent: Thursday, December 20, 2018 11:47 PM
To: Shankar, Uma ; intel-...@lists.freedesktop.org;
dri-devel
On 1/8/2019 12:10 PM, Shankar, Uma wrote:
-Original Message-
From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
Sharma, Shashank
Sent: Thursday, December 20, 2018 11:54 PM
To: Shankar, Uma ; intel-...@lists.freedesktop.org;
dri-devel@lists.freedesktop.org
Hello Uma,
> -Original Message-
> From: Shankar, Uma
> Sent: Monday, March 11, 2019 9:28 AM
> To: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: Lankhorst, Maarten ; Syrjala, Ville
> ; Sharma, Shashank ;
> emil.l.veli...@gmail.com; brian.star
> -Original Message-
> From: Shankar, Uma
> Sent: Monday, March 11, 2019 9:28 AM
> To: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: Lankhorst, Maarten ; Syrjala, Ville
> ; Sharma, Shashank ;
> emil.l.veli...@gmail.com; brian.star...@arm.com
> -Original Message-
> From: Shankar, Uma
> Sent: Monday, March 11, 2019 9:28 AM
> To: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: Lankhorst, Maarten ; Syrjala, Ville
> ; Sharma, Shashank ;
> emil.l.veli...@gmail.com; brian.star...@arm.com
> -Original Message-
> From: Shankar, Uma
> Sent: Monday, March 11, 2019 9:28 AM
> To: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: Lankhorst, Maarten ; Syrjala, Ville
> ; Sharma, Shashank ;
> emil.l.veli...@gmail.com; brian.star...@arm.com
size_t size);
ssize_t hdmi_avi_infoframe_pack_only(const struct hdmi_avi_infoframe *frame,
void *buffer, size_t size);
int hdmi_avi_infoframe_check(struct hdmi_avi_infoframe *frame);
+int hdmi_drm_infoframe_init(struct hdmi_drm
On 3/11/2019 9:27 AM, Uma Shankar wrote:
Enable writing of HDR metadata infoframe to panel.
The data will be provid by usersapace compositors, based
on blending policies and passsed to driver through a blob
property.
v2: Rebase
v3: Fixed a warning message
v4: Addressed Shashank's review comme
On 3/11/2019 9:28 AM, Uma Shankar wrote:
From: Ville Syrjälä
ADD HLG EOTF to the list of EOTF transfer functions supported.
Hybrid Log-Gamma (HLG) is a high dynamic range (HDR) standard.
HLG defines a nonlinear transfer function in which the lower
half of the signal values use a gamma curve an
On 3/20/2019 12:47 PM, Shankar, Uma wrote:
-Original Message-
From: Sharma, Shashank
Sent: Friday, March 15, 2019 1:01 PM
To: Shankar, Uma ; intel-...@lists.freedesktop.org; dri-
de...@lists.freedesktop.org
Cc: Lankhorst, Maarten ; Syrjala, Ville
; emil.l.veli...@gmail.com; brian.star
On 3/20/2019 4:18 PM, Uma Shankar wrote:
HDR metadata block is introduced in CEA-861.3 spec.
Parsing the same to get the panel's HDR metadata.
v2: Rebase and added Ville's POC changes to the patch.
v3: No Change
v4: Addressed Shashank's review comments
Signed-off-by: Uma Shankar
---
drive
On 3/20/2019 4:18 PM, Uma Shankar wrote:
Enable writing of HDR metadata infoframe to panel.
The data will be provid by usersapace compositors, based
on blending policies and passsed to driver through a blob
property.
v2: Rebase
v3: Fixed a warning message
v4: Addressed Shashank's review comme
On 3/20/2019 4:18 PM, Uma Shankar wrote:
HDR metadata requires a infoframe to be set. Due to fastset,
full modeset is not performed hence adding it to update_pipe
to handle that.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_ddi.c | 13 +
1 file changed, 13 insertions
_infoframe *frame);
enum hdmi_spd_sdi {
HDMI_SPD_SDI_UNKNOWN,
With that minor comment related to description fixed, this patch looks
good to me. Please feel free to use:
Reviewed-by: Shashank Sharma
- Shashank
___
dri-devel mailing list
dri-devel@lists.fre
On 3/20/2019 4:18 PM, Uma Shankar wrote:
From: Ville Syrjälä
This patch enables infoframes on GLK+ to be
used to send HDR metadata to HDMI sink.
v2: Addressed Shashank's review comment.
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/i915_reg.h | 4 +++
On 3/20/2019 4:18 PM, Uma Shankar wrote:
This patch enables modeset whenever HDR metadata
needs to be updated to sink.
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_atomic.c | 15 ++-
drivers/gpu/drm/i915/intel_hdmi.c | 4
2 fil
ASPECT_64_27, },
+ /* 127 - 5120x2160@100Hz 64:27 */
+ { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 1485000, 5120, 6216,
+ 6304, 6600, 0, 2160, 2168, 2178, 2250, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 100, .picture_aspect_ratio = HDMI_PICT
Hi Ville,
On 7/11/2019 4:02 PM, Ville Syrjala wrote:
From: Ville Syrjälä
We're going to need two cea mode tables (on for VICs < 128,
another one for VICs >= 193). To that end replace the direct
edid_cea_modes[] lookups with a function call. And we'll rename
the array to edid_cea_modes_0[] to i
Hi Ram,
Just a minor nitpick.
Regards
Shashank
> -Original Message-
> From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
> Ramalingam C
> Sent: Friday, July 12, 2019 12:30 PM
> To: intel-gfx ; dri-devel de...@lists.freedesktop.org>; Pekka Paalanen ; Daniel
> V
On 8/2/2022 5:58 PM, Michel Dänzer wrote:
On 2022-08-02 15:55, Shashank Sharma wrote:
This patch adds:
- A new input parameter "flags" in the amdgpu_ctx_create2 call.
- Some new flags defining workload type hints.
- Some change in the caller function of amdgpu_ctx_create2, to
accomodate this
On 8/8/2022 12:59 PM, Christian König wrote:
Am 02.08.22 um 15:55 schrieb Shashank Sharma:
This patch adds:
- A new input parameter "flags" in the amdgpu_ctx_create2 call.
- Some new flags defining workload type hints.
- Some change in the caller function of amdgpu_ctx_create2, to
accomoda
Acked-by: Shashank Sharma
Regards
Shashank
-Original Message-
From: dri-devel On Behalf Of
Christian König
Sent: Thursday, April 7, 2022 1:46 PM
To: pet...@infradead.org; daniel.vet...@ffwll.ch;
dri-devel@lists.freedesktop.org
Cc: Koenig, Christian
Subject: [PATCH] futex: add missing
Hey Daniel,
> -Original Message-
> From: Daniel Vetter On Behalf Of Daniel Vetter
> Sent: Tuesday, October 22, 2019 3:39 PM
> To: Sharma, Shashank
> Cc: dri-devel@lists.freedesktop.org; intel-...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 1/3] drm: Introd
Hello Ville,
Thanks for the comments, mine inline.
On 10/22/2019 5:50 PM, Ville Syrjälä wrote:
On Tue, Oct 22, 2019 at 03:29:44PM +0530, Shashank Sharma wrote:
This patch adds a scaling filter mode porperty
to allow:
- A driver/HW to showcase it's scaling filter capabilities.
- A userspace to
On 10/22/2019 5:56 PM, Ville Syrjälä wrote:
On Tue, Oct 22, 2019 at 03:29:44PM +0530, Shashank Sharma wrote:
This patch adds a scaling filter mode porperty
to allow:
- A driver/HW to showcase it's scaling filter capabilities.
- A userspace to pick a desired effect while scaling.
This option wi
Hello Mihail,
Thanks for your review, my comments inline.
On 10/22/2019 6:56 PM, Mihail Atanassov wrote:
Hi Shashank,
On Tuesday, 22 October 2019 10:59:44 BST Shashank Sharma wrote:
This patch adds a scaling filter mode porperty
to allow:
- A driver/HW to showcase it's scaling filter capabili
Hello Harry,
Thanks for your comments, please find mine inline.
On 10/22/2019 7:36 PM, Harry Wentland wrote:
On 2019-10-22 8:20 a.m., Ville Syrjälä wrote:
On Tue, Oct 22, 2019 at 03:29:44PM +0530, Shashank Sharma wrote:
This patch adds a scaling filter mode porperty
to allow:
- A driver/HW t
Hello Ville,
On 9/25/2019 7:24 PM, Ville Syrjala wrote:
From: Ville Syrjälä
We're going to need two cea mode tables (on for VICs < 128,
another one for VICs >= 193). To that end replace the direct
edid_cea_modes[] lookups with a function call. And we'll rename
the array to edid_cea_modes_0[] t
On 9/25/2019 7:25 PM, Ville Syrjala wrote:
From: Ville Syrjälä
Add a second table to the cea modes with VIC >= 193.
Cc: Hans Verkuil
Cc: Shashank Sharma
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_edid.c | 151 -
1 file changed, 149 insertion
On 9/25/2019 7:25 PM, Ville Syrjala wrote:
From: Ville Syrjälä
Now that the cea mode handling is not 100% tied to the single
array the dummy VIC 0 mode is pretty much pointles. Throw it
out.
Cc: Hans Verkuil
Cc: Shashank Sharma
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_edid.c
Hello Ram,
On 8/22/2019 8:48 PM, Ramalingam C wrote:
I915 converts it's port value into ddi index defiend by ME FW
and pass it as a member of hdcp_port_data structure.
Hence expose the enum mei_fw_ddi to I915 through
i915_mei_interface.h.
Signed-off-by: Ramalingam C
Acked-by: Jani Nikula
---
efine port_name(p) ((p) + 'A')
-
#endif/* _I915_DRM_H_ */
Otherwise patch looks good to me.
With(or without) above mentioned suggestion, Feel free to use:
Reviewed-by: Shashank Sharma
- Shashank
___
dri-devel
Regards
Shashank
On 8/27/2019 10:03 AM, Ramalingam C wrote:
On 2019-08-27 at 09:54:18 +0530, Sharma, Shashank wrote:
Hello Ram,
On 8/22/2019 8:48 PM, Ramalingam C wrote:
I915 converts it's port value into ddi index defiend by ME FW
and pass it as a member of hdcp_port_data structure.
On 8/22/2019 8:49 PM, Ramalingam C wrote:
I915 needs to send the index of the transcoder as per ME FW.
To support this, define enum mei_fw_ddi and add as a member into
the struct hdcp_port_data.
The commit message says you are defining enum mei_fw_ddi, but you are
actually defining enum mei_f
On 8/22/2019 8:49 PM, Ramalingam C wrote:
I915 needs to send the index of the transcoder as per ME FW.
To support this, define enum mei_fw_ddi and add as a member into
the struct hdcp_port_data.
Signed-off-by: Ramalingam C
Acked-by: Jani Nikula
---
include/drm/i915_mei_hdcp_interface.h | 13
Regards
Shashank
On 8/22/2019 8:49 PM, Ramalingam C wrote:
For gen12+ platform we need to pass the transcoder info
as part of the port info into ME FW.
This change fills the payload for ME FW from hdcp_port_data.
Signed-off-by: Ramalingam C
Acked-by: Jani Nikula
---
drivers/misc/mei/hdcp/
Regards
Shashank
On 8/22/2019 8:49 PM, Ramalingam C wrote:
On gen12+ platforms, HDCP HW is associated to the transcoder.
Hence on every modeset update associated transcoder into the
intel_hdcp of the port.
v2:
s/trans/cpu_transcoder [Jani]
Signed-off-by: Ramalingam C
Acked-by: Jani Nikula
On 8/27/2019 10:47 AM, Ramalingam C wrote:
On 2019-08-27 at 10:42:33 +0530, Sharma, Shashank wrote:
Regards
Shashank
On 8/22/2019 8:49 PM, Ramalingam C wrote:
For gen12+ platform we need to pass the transcoder info
as part of the port info into ME FW.
This change fills the payload for ME
Regards
Shashank
On 8/27/2019 10:57 AM, Ramalingam C wrote:
On 2019-08-27 at 10:49:25 +0530, Sharma, Shashank wrote:
Regards
Shashank
On 8/22/2019 8:49 PM, Ramalingam C wrote:
On gen12+ platforms, HDCP HW is associated to the transcoder.
Hence on every modeset update associated transcoder
Regards
Shashank
On 8/22/2019 8:49 PM, Ramalingam C wrote:
From Gen12 onwards, HDCP HW block is implemented within transcoders.
Till Gen11 HDCP HW block was part of DDI.
Hence required changes in HW programming is handled here.
As ME FW needs the transcoder detail on which HDCP is enabled
on
Looks good to me,
From display side, Please feel free to use Reviewed-by: Shashank Sharma
> -Original Message-
> From: C, Ramalingam
> Sent: Wednesday, August 28, 2019 2:28 PM
> To: Winkler, Tomas
> Cc: intel-gfx ; dri-devel de...@lists.freedesktop.org>; Sharma, S
Looks good to me,
From display side, Please feel free to use Reviewed-by: Shashank Sharma
Regards
Shashank
> -Original Message-
> From: Winkler, Tomas
> Sent: Wednesday, August 28, 2019 1:49 PM
> To: C, Ramalingam
> Cc: intel-gfx ; dri-devel de...@lists.freedeskt
-devel
; Sharma, Shashank
Subject: Re: Amdgpu module is references even after unbinding the vtcon
Hi Danijel,
can you also double check that GDM/X is still capable of acquiring a DMA-buf
file descriptor for the buffer (e.g. that we have a DMA-buf handle for it while
they are started).
And
[AMD Official Use Only - General]
+ Uday, for awareness.
Regards
Shashank
-Original Message-
From: Pekka Paalanen
Sent: 14 February 2023 10:28
To: Melissa Wen
Cc: Ville Syrjälä ;
dri-devel@lists.freedesktop.org; airl...@gmail.com;
laurent.pinchart+rene...@ideasonboard.com; Sharma
; Daniel Vetter
; Sharma, Shashank ;
amd-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org
Subject: [PATCH 11/20] drm/amd/amdgpu/amdgpu_doorbell_mgr: Correct
misdocumented param 'doorbell_index'
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/
vet...@ffwll.ch] On Behalf Of Daniel Vetter
Sent: Monday, October 17, 2016 11:33 AM
To: Jim Bride
Cc: Sharma, Shashank ; dri-devel at
lists.freedesktop.org; seanpaul at chromium.org; Jose.Abreu at synopsys.com;
Daniel Vetter ; intel-gfx at lists.freedesktop.org;
Vetter, Daniel
Subject: Re: [Intel-
Please ignore this series, I mixed up one patch from LSPCON in here.
Will send the right series in few minutes.
Regards
Shashank
-Original Message-
From: Sharma, Shashank
Sent: Monday, October 17, 2016 4:52 PM
To: dri-devel at lists.freedesktop.org; jim.bride at linux.intel.com
Cc
Regards
Shashank
On 10/17/2016 5:01 PM, Jose Abreu wrote:
> Hi Shashank,
>
>
> On 17-10-2016 12:32, Shashank Sharma wrote:
>> This patch series adds 4 patches.
>> - The first two patches add aspect ratio support in DRM layes
>> - Next two patches add new aspect ratios defined in CEA-861-F
>>s
Regards
Shashank
On 10/17/2016 5:55 PM, Daniel Vetter wrote:
> On Mon, Oct 17, 2016 at 05:34:36PM +0530, Shashank Sharma wrote:
>> This patch series adds 4 patches.
>> - The first two patches add aspect ratio support in DRM layes
>> - Next two patches add new aspect ratios defined in CEA-861-F
>
Regards
Shashank
On 10/17/2016 6:01 PM, Ville Syrjälä wrote:
> On Mon, Oct 17, 2016 at 05:34:38PM +0530, Shashank Sharma wrote:
>> Current DRM layer functions don't parse aspect ratio information
>> while converting a user mode->kernel mode or vice versa. This
>> causes modeset to pick mode wi
Regards
Shashank
On 10/17/2016 7:36 PM, Ville Syrjälä wrote:
> On Mon, Oct 17, 2016 at 07:10:42PM +0530, Sharma, Shashank wrote:
>> Regards
>>
>> Shashank
>>
>>
>> On 10/17/2016 6:01 PM, Ville Syrjälä wrote:
>>> On Mon, Oct 17, 2016 at 05:34
Regards
Shashank
On 10/17/2016 8:30 PM, Ville Syrjälä wrote:
> On Mon, Oct 17, 2016 at 08:21:21PM +0530, Sharma, Shashank wrote:
>> Regards
>>
>> Shashank
>>
>>
>> On 10/17/2016 7:36 PM, Ville Syrjälä wrote:
>>> On Mon, Oct 17, 2016 at 07:10:
Ok, Sure.
Thanks for this information, Jani.
Regards
Shashank
-Original Message-
From: Nikula, Jani
Sent: Tuesday, October 18, 2016 12:28 PM
To: Sharma, Shashank ; dri-devel at
lists.freedesktop.org; airlied at redhat.com
Cc: Vetter, Daniel ; Deak, Imre ; ville.syrjala at
Reviewed-by: Shashank Sharma
Regards
Shashank
-Original Message-
From: Nikula, Jani
Sent: Tuesday, October 18, 2016 4:52 PM
To: intel-gfx at lists.freedesktop.org
Cc: Nikula, Jani ; Vivi, Rodrigo ; Sharma, Shashank ; dri-devel at
lists.freedesktop.org
Subject: [PATCH 1/2] drm: make
Adding Jose and Daniel in cc.
Regards
Shashank
-Original Message-
From: Sharma, Shashank
Sent: Thursday, October 20, 2016 3:58 PM
To: dri-devel at lists.freedesktop.org; intel-gfx at lists.freedesktop.org
Cc: airlied at redhat.com; =daniel.vetter at intel.com; Jose.Abreu at
Hello Jose
On 10/20/2016 7:19 PM, Jose Abreu wrote:
> Hi Shashank,
>
>
> On 20-10-2016 11:25, Sharma, Shashank wrote:
>> Adding Jose and Daniel in cc.
>>
>> Regards
>> Shashank
>> -----Original Message-
>> From: Sharma, Shashank
>> Sent:
Regards
Shashank
On 10/20/2016 8:00 PM, Alex Deucher wrote:
> On Thu, Oct 20, 2016 at 6:28 AM, Shashank Sharma
> wrote:
>> CEA-861-F specs defines new 4k video modes to be used with
>> HDMI 2.0 EDIDs. These modes start at VIC=93 and go all the
>> way till VIC=107.
>>
>> Our existing CEA modedb
Hello Jose,
Sorry for delay in response, I was on vacation.
Please find my comments inline.
Regards
Shashank
On 4/12/2017 3:28 PM, Jose Abreu wrote:
Hi Shashank,
On 07-04-2017 17:39, Shashank Sharma wrote:
HDMI displays can support various output types, based on
the color space and subsampli
Regards
Shashank
On 4/12/2017 3:19 PM, Jose Abreu wrote:
Hi Shashank,
On 07-04-2017 17:39, Shashank Sharma wrote:
HDMI source must set output colorspace information in AVI
infoframes, so that the sink can decode upcoming frames
accordingly.
As this patch series is adding support for HDMI o
Regards
Shashank
On 4/10/2017 3:17 PM, Andrzej Hajda wrote:
On 07.04.2017 18:39, Shashank Sharma wrote:
HDMI 1.4b support the CEA video modes as per range of CEA-861-D (VIC 1-64).
For any other mode, the VIC filed in AVI infoframes should be 0.
HDMI 2.0 sinks, support video modes range as per
Regards
Shashank
On 4/8/2017 11:13 PM, Emil Velikov wrote:
Hi Shashank,
On 7 April 2017 at 17:39, Shashank Sharma wrote:
+ u64 hdmi_420_cap_map = connector->display_info.hdmi.ycbcr420_vcb_map;
for (i = 0; i < len; i++) {
struct drm_display_mode *mode;
Regards
Shashank
On 4/21/2017 3:21 PM, Jyri Sarha wrote:
The series adds plane specific atomic properties to control YCbCr to
RGB conversions. My intention was to try to implement the plane
specific (before DEGAMMA) part of the suggestion in this dri-devel
post:
I would probably extend this se
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