On Mon, Feb 21, 2022 at 6:41 AM Akhil P Oommen wrote:
>
> This series supercedes [1]. Major change in this series is that it is now
> optional to include a gpu name in the gpu-list. This helps to avoid the
> confusion when we have different SKUs with different gpu names. And also
> I am pretty hap
On Tue, Feb 22, 2022 at 7:11 PM Dmitry Baryshkov
wrote:
>
> On 19/02/2022 21:33, Rob Clark wrote:
> > From: Rob Clark
> >
> > Avoid going down devfreq paths on devices where devfreq is not
> > initialized.
> >
> > Reported-by: Linux Kernel Function
On Wed, Feb 23, 2022 at 2:00 AM Dmitry Baryshkov
wrote:
>
> On 19/02/2022 22:39, Rob Clark wrote:
> > From: Rob Clark
> >
> > Someone on IRC once asked an innocent enough sounding question: Why
> > with xf86-video-modesetting is es2gears limited at 120fps.
>
From: Rob Clark
Someone on IRC once asked an innocent enough sounding question: Why
with xf86-video-modesetting is es2gears limited at 120fps.
So I broke out the perfetto tracing mesa MR and took a look. It turns
out the problem was drm_atomic_helper_dirtyfb(), which would end up
waiting for
From: Rob Clark
Add a way for userspace to specify the sequence number fence used to
track completion of the submit. As the seqno fence is simply an
incrementing counter which is local to the submitqueue, it is easy for
userspace to know the next value.
This is useful for native userspace
From: Rob Clark
Extend the helper macro so we don't have to throw it away if driver adds
support for optional fops, like show_fdinfo().
Signed-off-by: Rob Clark
---
include/drm/drm_gem.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/drm/drm_gem.h b/includ
From: Rob Clark
Noticed this was unused and never set.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem.h | 1 -
drivers/gpu/drm/msm/msm_gpu.h | 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h
index
From: Rob Clark
Similar to AMD commit
874442541133 ("drm/amdgpu: Add show_fdinfo() interface"), using the
infrastructure added in previous patches, we add basic client info
and GPU engine utilisation for msm.
Example output:
# cat /proc/`pgrep glmark2`/fdinfo/6
On Fri, Feb 25, 2022 at 12:36 PM Ville Syrjälä
wrote:
>
> On Fri, Feb 25, 2022 at 12:26:12PM -0800, Rob Clark wrote:
> > From: Rob Clark
> >
> > Extend the helper macro so we don't have to throw it away if driver adds
> > support for optional fops, like show_f
On Fri, Feb 25, 2022 at 12:25 PM Rob Clark wrote:
>
> From: Rob Clark
>
> Similar to AMD commit
> 874442541133 ("drm/amdgpu: Add show_fdinfo() interface"), using the
> infrastructure added in previous patches, we add basic client info
> and GPU engine utilisat
On Wed, Feb 2, 2022 at 7:41 AM Jani Nikula wrote:
>
> On Wed, 02 Feb 2022, Laurent Pinchart
> wrote:
> > Hi Jani,
> >
> > On Wed, Feb 02, 2022 at 03:15:03PM +0200, Jani Nikula wrote:
> >> On Wed, 02 Feb 2022, Laurent Pinchart wrote:
> >> > On Wed, Feb 02, 2022 at 02:24:28PM +0530, Kandpal Suraj
On Mon, Feb 28, 2022 at 6:33 AM Tvrtko Ursulin
wrote:
>
>
> On 25/02/2022 22:14, Rob Clark wrote:
> > On Fri, Feb 25, 2022 at 12:25 PM Rob Clark wrote:
> >>
> >> From: Rob Clark
> >>
> >> Similar to AMD commit
> >> 8744425
On Mon, Feb 28, 2022 at 10:49 PM David Laight wrote:
>
> From: Abhinav Kumar
> > Sent: 28 February 2022 21:38
> ...
> > We also did some profiling around how much increasing the block size
> > helps and here is the data:
> >
> > Block sizecost
> >
> > 4KB 229s
> > 8KB86s
ev Nandan (3):
dt-bindings: msm/dsi: Add 10nm dsi phy tuning properties
drm/msm/dsi: Add dsi phy tuning configuration support
drm/msm/dsi: Add 10nm dsi phy tuning configuration support
Rob Clark (5):
drm/msm/rd: Add chip-id
drm/msm/dpu: Add SC8180x to hw catalog
dr
Should be fixed by:
https://patchwork.freedesktop.org/patch/475238/?series=100448&rev=1
t-b's welcome
On Wed, Mar 2, 2022 at 12:35 PM Naresh Kamboju
wrote:
>
> [Please ignore this email if it is already reported]
>
> Linux next-20220302 running on Qcom db410c the following kernel crash
> report
From: Rob Clark
Some clever folks figured out a way to use performance counters as a
side-channel[1]. But, other than the special case of using the perf
counters for system profiling, we can reset the counters across context
switches to protect against this.
This series introduces a SYSPROF
From: Rob Clark
It was always expected to have a use for this some day, so we left a
placeholder. Now we do. (And I expect another use in the not too
distant future when we start allowing userspace to allocate GPU iova.)
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a2xx_gpu.c
From: Rob Clark
Add a SYSPROF param for system profiling tools like Mesa's pps-producer
(perfetto) to control behavior related to system-wide performance
counter collection. In particular, for profiling, one wants to ensure
that GPU context switches do not effect perfcounter state, and
From: Rob Clark
Any app controlled perfcntr collection (GL_AMD_performance_monitor, etc)
does not require counters to maintain state across context switches. So
clear them if systemwide profiling is not active.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 29
On Thu, Mar 3, 2022 at 12:42 PM Abhinav Kumar wrote:
>
> Hi Rob
>
> On 3/3/2022 11:46 AM, Rob Clark wrote:
> > From: Rob Clark
> >
> > Update headers from mesa commit:
> >
> >commit 7e63fa2bb13cf14b765ad06d046789ee1879b5ef
> >Author:
On Thu, Mar 3, 2022 at 12:47 PM Stephen Boyd wrote:
>
> Quoting Rob Clark (2022-03-03 11:46:47)
> > diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
> > index fde9a29f884e..0ba1dbd4e50f 100644
> > --- a/drivers/gpu/drm/msm/msm_gpu.h
>
On Thu, Mar 3, 2022 at 1:17 PM Rob Clark wrote:
>
> On Thu, Mar 3, 2022 at 12:47 PM Stephen Boyd wrote:
> >
> > Quoting Rob Clark (2022-03-03 11:46:47)
> > > diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
> > > index fde9a29f8
From: Rob Clark
Some clever folks figured out a way to use performance counters as a
side-channel[1]. But, other than the special case of using the perf
counters for system profiling, we can reset the counters across context
switches to protect against this.
This series introduces a SYSPROF
From: Rob Clark
It was always expected to have a use for this some day, so we left a
placeholder. Now we do. (And I expect another use in the not too
distant future when we start allowing userspace to allocate GPU iova.)
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a2xx_gpu.c
From: Rob Clark
Add a SYSPROF param for system profiling tools like Mesa's pps-producer
(perfetto) to control behavior related to system-wide performance
counter collection. In particular, for profiling, one wants to ensure
that GPU context switches do not effect perfcounter state, and
From: Rob Clark
Any app controlled perfcntr collection (GL_AMD_performance_monitor, etc)
does not require counters to maintain state across context switches. So
clear them if systemwide profiling is not active.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 29
From: Rob Clark
refcount_t complains about 0->1 transitions, which isn't *quite* what we
wanted. So use dirtyfb==1 to mean that the fb is not connected to any
output that requires dirtyfb flushing, so that we can keep the underflow
and overflow checking.
Fixes: 9e4dde28e9cd ("d
From: Rob Clark
Fixes: f6d62d091cfd ("drm/msm/a6xx: add support for Adreno 660 GPU")
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
b/drivers/gpu/drm/msm/adreno/a6xx_g
On Fri, Mar 4, 2022 at 1:47 PM Dmitry Baryshkov
wrote:
>
> On Fri, 4 Mar 2022 at 23:23, Rob Clark wrote:
> >
> > From: Rob Clark
> >
> > Fixes: f6d62d091cfd ("drm/msm/a6xx: add support for Adreno 660 GPU")
> > Signed-off-by: Rob Clark
>
&
On Thu, Mar 3, 2022 at 7:21 PM Dmitry Baryshkov
wrote:
>
> MSM DRM driver already allows one to compile out the DP or DSI support.
> Add support for disabling other features like MDP4/MDP5/DPU drivers or
> direct HDMI output support.
>
> Suggested-by: Stephen Boyd
> Signed-off-by: Dmitry Baryshko
From: Rob Clark
Fixes: f6d62d091cfd ("drm/msm/a6xx: add support for Adreno 660 GPU")
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/
From: Rob Clark
This series adds deadline awareness to fences, so realtime deadlines
such as vblank can be communicated to the fence signaller for power/
frequency management decisions.
This is partially inspired by a trick i915 does, but implemented
via dma-fence for a couple of reasons:
1
From: Rob Clark
Add a way to hint to the fence signaler of an upcoming deadline, such as
vblank, which the fence waiter would prefer not to miss. This is to aid
the fence signaler in making power management decisions, like boosting
frequency as the deadline approaches and awareness of missing
From: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/drm_vblank.c | 32
include/drm/drm_vblank.h | 1 +
2 files changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/drm_vblank.c b/drivers/gpu/drm/drm_vblank.c
index b701cda86d0c..ec2732664b95
From: Rob Clark
For an atomic commit updating a single CRTC (ie. a pageflip) calculate
the next vblank time, and inform the fence(s) of that deadline.
v2: Comment typo fix (danvet)
Signed-off-by: Rob Clark
Reviewed-by: Daniel Vetter
Signed-off-by: Rob Clark
---
drivers/gpu/drm
From: Rob Clark
As the finished fence is the one that is exposed to userspace, and
therefore the one that other operations, like atomic update, would
block on, we need to propagate the deadline from from the finished
fence to the actual hw fence.
v2: Split into drm_sched_fence_set_parent
From: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_fence.c | 76 +++
drivers/gpu/drm/msm/msm_fence.h | 20 +++
drivers/gpu/drm/msm/msm_gpu.h | 1 +
drivers/gpu/drm/msm/msm_gpu_devfreq.c | 20 +++
4 files changed, 117
From: Rob Clark
Signed-off-by: Rob Clark
---
drivers/dma-buf/dma-fence-array.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/dma-buf/dma-fence-array.c
b/drivers/dma-buf/dma-fence-array.c
index d3fbd950be94..8d194b09ee3d 100644
--- a/drivers/dma-buf/dma-fence-array.c
From: Rob Clark
Signed-off-by: Rob Clark
---
drivers/dma-buf/dma-fence-chain.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/dma-buf/dma-fence-chain.c
b/drivers/dma-buf/dma-fence-chain.c
index 1b4cb3e5cec9..736a9ad3ea6d 100644
--- a/drivers/dma-buf/dma-fence
From: Rob Clark
The initial purpose is for igt tests, but this would also be useful for
compositors that wait until close to vblank deadline to make decisions
about which frame to show.
Signed-off-by: Rob Clark
---
drivers/dma-buf/sync_file.c| 19 +++
include/uapi/linux
From: Rob Clark
This consists of simply storing the most recent deadline, and adding an
ioctl to retrieve the deadline. This can be used in conjunction with
the SET_DEADLINE ioctl on a fence fd for testing. Ie. create various
sw_sync fences, merge them into a fence-array, set deadline on the
On Fri, Sep 3, 2021 at 12:39 PM John Stultz wrote:
>
> On Thu, Jul 29, 2021 at 1:49 PM Rob Clark wrote:
> > On Thu, Jul 29, 2021 at 1:28 PM Caleb Connolly
> > wrote:
> > > On 29/07/2021 21:24, Rob Clark wrote:
> > > > On Thu, Jul 29, 2021 a
From: Rob Clark
These are mainly used internally in mesa, although I believe the display
should be able to scan out the TILED3 format. Currently we define this
modifier internally in mesa for use with modifier based allocation. But
we can get rid of that hack if we define the modfiers properly
On Mon, Sep 6, 2021 at 1:02 AM Amit Pundir wrote:
>
> On Sat, 4 Sept 2021 at 01:55, Rob Clark wrote:
> >
> > On Fri, Sep 3, 2021 at 12:39 PM John Stultz wrote:
> > >
> > > On Thu, Jul 29, 2021 at 1:49 PM Rob Clark wrote:
> > > > On Thu, Jul 2
On Mon, Sep 6, 2021 at 12:58 PM Amit Pundir wrote:
>
> On Mon, 6 Sept 2021 at 21:54, Rob Clark wrote:
> >
> > On Mon, Sep 6, 2021 at 1:02 AM Amit Pundir wrote:
> > >
> > > On Sat, 4 Sept 2021 at 01:55, Rob Clark wrote:
> > > >
> > > >
On Mon, Sep 6, 2021 at 1:50 PM Rob Clark wrote:
>
> On Mon, Sep 6, 2021 at 12:58 PM Amit Pundir wrote:
> >
> > On Mon, 6 Sept 2021 at 21:54, Rob Clark wrote:
> > >
> > > On Mon, Sep 6, 2021 at 1:02 AM Amit Pundir wrote:
> > > >
> &
On Mon, Sep 6, 2021 at 12:58 PM Amit Pundir wrote:
>
> On Mon, 6 Sept 2021 at 21:54, Rob Clark wrote:
> >
> > On Mon, Sep 6, 2021 at 1:02 AM Amit Pundir wrote:
> > >
> > > On Sat, 4 Sept 2021 at 01:55, Rob Clark wrote:
> > > >
> > > >
On Tue, Sep 7, 2021 at 1:25 AM Amit Pundir wrote:
>
> On Tue, 7 Sept 2021 at 07:11, Rob Clark wrote:
> >
> > One thing I thought of, which would be worth ruling out, is whether
> > this issue only occurs with freq changes immediately after resuming
> > the GPU, vs f
On Wed, Sep 8, 2021 at 10:48 AM Daniel Vetter wrote:
>
> On Fri, Sep 03, 2021 at 11:47:56AM -0700, Rob Clark wrote:
> > From: Rob Clark
> >
> > Signed-off-by: Rob Clark
>
> Why do you need a kthread_work here? Is this just to make sure you're
> running at
On Wed, Sep 8, 2021 at 10:54 AM Daniel Vetter wrote:
>
> On Fri, Sep 03, 2021 at 11:47:58AM -0700, Rob Clark wrote:
> > From: Rob Clark
> >
> > Signed-off-by: Rob Clark
> > ---
> > drivers/dma-buf/dma-fence-chain.c | 13 +
> > 1 file chan
On Wed, Sep 8, 2021 at 10:50 AM Daniel Vetter wrote:
>
> On Fri, Sep 03, 2021 at 11:47:59AM -0700, Rob Clark wrote:
> > From: Rob Clark
> >
> > The initial purpose is for igt tests, but this would also be useful for
> > compositors that wait until close to vbl
On Wed, Sep 8, 2021 at 11:49 AM Daniel Vetter wrote:
>
> On Wed, Sep 08, 2021 at 11:23:42AM -0700, Rob Clark wrote:
> > On Wed, Sep 8, 2021 at 10:50 AM Daniel Vetter wrote:
> > >
> > > On Fri, Sep 03, 2021 at 11:47:59AM -0700, Rob Clark wrote:
> > > > Fr
On Thu, Sep 9, 2021 at 9:16 AM Simon Ser wrote:
>
> Out of curiosity, would it be reasonable to allow user-space (more
> precisely, the compositor) to set the deadline via an IOCTL without
> actually performing an atomic commit with the FB?
>
> Some compositors might want to wait themselves for FB
On Thu, Sep 9, 2021 at 9:42 AM Simon Ser wrote:
>
> On Thursday, September 9th, 2021 at 18:31, Rob Clark
> wrote:
>
> > Yes, I think it would.. and "dma-buf/sync_file: Add SET_DEADLINE
> > ioctl" adds such an ioctl.. just for the benefit of igt tests at this
>>> On Mon 09 Aug 10:26 PDT 2021, Akhil P Oommen wrote:
> >>>
> >>>> On 8/9/2021 9:48 PM, Caleb Connolly wrote:
> >>>>>
> >>>>>
> >>>>> On 09/08/2021 17:12, Rob Clark wrote:
> >>>>>> On Mon, Aug 9,
On Tue, Sep 7, 2021 at 7:20 PM Bjorn Andersson
wrote:
>
> On Mon 09 Aug 10:26 PDT 2021, Akhil P Oommen wrote:
>
> > On 8/9/2021 9:48 PM, Caleb Connolly wrote:
> > >
> > >
> > > On 09/08/2021 17:12, Rob Clark wrote:
> > > > On Mon
On Thu, Sep 9, 2021 at 1:54 PM Rob Clark wrote:
>
> On Thu, Sep 9, 2021 at 12:50 PM Akhil P Oommen wrote:
> >
> > On 9/9/2021 9:42 PM, Amit Pundir wrote:
> > > On Thu, 9 Sept 2021 at 17:47, Amit Pundir wrote:
> > >>
> > >> On Wed,
ed with coccinelle:
>
> @@
> expression E;
> @@
> - flush_workqueue(E);
> destroy_workqueue(E);
>
> Signed-off-by: Christophe JAILLET
For drm/msm:
Reviewed-by: Rob Clark
> ---
> drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 1 -
> drivers/gpu/drm/msm/dsi/dsi
On Wed, Oct 13, 2021 at 7:16 AM Maxime Ripard wrote:
>
> Hi Caleb,
>
> On Thu, Sep 30, 2021 at 09:20:52PM +0100, Caleb Connolly wrote:
> > Hi,
> >
> > On 30/09/2021 20:49, Amit Pundir wrote:
> > > On Thu, 30 Sept 2021 at 04:50, Rob Clark wrote:
> >
From: Rob Clark
Until we better understand the stability issues caused by frequent
frequency changes, lets limit them to a618.
Signed-off-by: Rob Clark
---
Caleb/John, I think this should help as a workaround for the power
instability issues on a630.. could you give it a try?
drivers/gpu/drm
On Mon, Oct 18, 2021 at 5:34 AM Maxime Ripard wrote:
>
> Hi Rob,
>
> On Wed, Oct 13, 2021 at 05:16:58PM -0700, Rob Clark wrote:
> > On Wed, Oct 13, 2021 at 7:16 AM Maxime Ripard wrote:
> > >
> > > Hi Caleb,
> > >
> > > On Thu, Sep 30, 2021
0700)
----
Rob Clark (1):
drm/msm/devfreq: Restrict idle clamping to a618 for now
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 7 +++
drivers/gpu/drm/msm/msm_gpu.h | 4
drivers/gpu/drm/msm/msm_gpu_devfreq.c | 3 ++-
3 files changed, 13 insertions(+), 1 deletion(-)
On Mon, Oct 18, 2021 at 10:33 AM Caleb Connolly
wrote:
>
> Hi all,
>
> On 18/10/2021 17:42, John Stultz wrote:
> > On Mon, Oct 18, 2021 at 8:31 AM Rob Clark wrote:
> >>
> >> From: Rob Clark
> >>
> >> Until we better understand the stability
On Thu, Oct 21, 2021 at 12:41 AM Maxime Ripard wrote:
>
> From: Rob Clark
>
> Switch to the documented order dsi-host vs bridge probe.
>
> Tested-by: Amit Pundir
> Tested-by: Caleb Connolly
> Tested-by: John Stultz
> Signed-off-by: Rob Clark
> Signed-off-by
From: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index e91568d4f09a..0ae397044310 100644
--- a/drivers/gpu/drm/msm
From: Rob Clark
We know the upper bound on # of mixers (ie. two), so lets just allocate
this on the stack.
Fixes:
BUG: sleeping function called from invalid context at
include/linux/sched/mm.h:201
in_atomic(): 1, irqs_disabled(): 128, non_block: 0, pid: 0, name: swapper/0
INFO
On Fri, Oct 22, 2021 at 12:15 PM Jessica Zhang wrote:
>
> On 10/22/2021 10:20 AM, Rob Clark wrote:
> > From: Rob Clark
> >
> > We know the upper bound on # of mixers (ie. two), so lets just allocate
> > this on the stack.
> >
> > Fixes:
> >
&g
From: Rob Clark
Signed-off-by: Rob Clark
Reviewed-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index e91568d4f09a..0ae397044310 100644
From: Rob Clark
We know the upper bound on # of mixers (ie. two), so lets just allocate
this on the stack.
Fixes:
BUG: sleeping function called from invalid context at
include/linux/sched/mm.h:201
in_atomic(): 1, irqs_disabled(): 128, non_block: 0, pid: 0, name: swapper/0
INFO
rtc_get_vblank_counter to use vsync count.
Nathan Chancellor (1):
drm/msm/dpu: Remove commit and its uses in dpu_crtc_set_crc_source()
Rikard Falkeborn (1):
drm: msm: hdmi: Constify static structs
Rob Clark (6):
drm/msm/dsi: Support NO_CONNECTOR bridges
drm/msm/dpu: Remov
On Thu, Aug 12, 2021 at 1:08 PM Doug Anderson wrote:
>
> Laurent,
>
> On Thu, Aug 12, 2021 at 12:26 PM Laurent Pinchart
> wrote:
> >
> > Hi Rob,
> >
> > Thank you for the patch.
> >
> > On Wed, Aug 11, 2021 at 04:52:50PM -0700, Rob Clark wrote:
From: Rob Clark
Respin of https://www.spinics.net/lists/linux-arm-msm/msg92182.html with
the remaining 3 patches that are not yet merged.
At the end of this series, but drm/msm and ti-sn65dsi86 work in both
combinations, so the two bridge patches can be merged indepdendently of
the msm/dsi
From: Rob Clark
For now, since we have a mix of bridges which support this flag, which
which do *not* support this flag, or work both ways, try it once with
NO_CONNECTOR and then fall back to the old way if that doesn't work.
Eventually we can drop the fallback path.
v2: Add mi
From: Rob Clark
For the brave new world of bridges not creating their own connectors, we
need to implement the max clock limitation via bridge->mode_valid()
instead of connector->mode_valid().
v2: Drop unneeded connector->mode_valid()
Signed-off-by: Rob Clark
Reviewed-by: Douglas
From: Rob Clark
Slightly awkward to fish out the display_info when we aren't creating
own connector. But I don't see an obvious better way.
v2: Remove error return with NO_CONNECTOR flag
Signed-off-by: Rob Clark
---
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 39
On Wed, Sep 8, 2021 at 10:45 AM Daniel Vetter wrote:
>
> On Fri, Sep 03, 2021 at 11:47:55AM -0700, Rob Clark wrote:
> > From: Rob Clark
> >
> > As the finished fence is the one that is exposed to userspace, and
> > therefore the one that other operations, like ato
On Tue, Sep 21, 2021 at 8:57 AM Rob Clark wrote:
>
> On Wed, Sep 8, 2021 at 10:45 AM Daniel Vetter wrote:
> >
> > On Fri, Sep 03, 2021 at 11:47:55AM -0700, Rob Clark wrote:
> > > From: Rob Clark
> > >
> > > As the finished fence is the one that is
On Wed, Sep 8, 2021 at 2:10 PM Daniel Vetter wrote:
>
> On Wed, Sep 8, 2021 at 9:36 PM Rob Clark wrote:
> > On Wed, Sep 8, 2021 at 11:49 AM Daniel Vetter wrote:
> > > On Wed, Sep 08, 2021 at 11:23:42AM -0700, Rob Clark wrote:
> > > > On Wed, Sep 8, 2021
On Tue, Sep 21, 2021 at 1:09 PM Andrey Grodzovsky
wrote:
>
> On 2021-09-03 2:47 p.m., Rob Clark wrote:
>
> > From: Rob Clark
> >
> > As the finished fence is the one that is exposed to userspace, and
> > therefore the one that other operations, like atomic updat
On Tue, Sep 21, 2021 at 3:20 PM Doug Anderson wrote:
>
> Hi,
>
> On Mon, Sep 20, 2021 at 3:53 PM Rob Clark wrote:
> >
> > From: Rob Clark
> >
> > Slightly awkward to fish out the display_info when we aren't creating
> > own connector. But I don&
On Tue, Sep 21, 2021 at 7:18 PM Andrey Grodzovsky
wrote:
>
>
> On 2021-09-21 4:47 p.m., Rob Clark wrote:
> > On Tue, Sep 21, 2021 at 1:09 PM Andrey Grodzovsky
> > wrote:
> >> On 2021-09-03 2:47 p.m., Rob Clark wrote:
> >>
> >>> From: Rob Clark
On Wed, Sep 22, 2021 at 7:31 AM Andrey Grodzovsky
wrote:
>
>
> On 2021-09-21 11:32 p.m., Rob Clark wrote:
> > On Tue, Sep 21, 2021 at 7:18 PM Andrey Grodzovsky
> > wrote:
> >>
> >> On 2021-09-21 4:47 p.m., Rob Clark wrote:
> >>> On Tue, Sep
From: Rob Clark
This series extends io-pgtable-arm with a method to retrieve the page
table entries traversed in the process of address translation, and then
beefs up drm/msm gpu devcore dump to include this (and additional info)
in the devcore dump.
The motivation is tracking down an obscure
From: Rob Clark
Add an io-pgtable method to retrieve the raw PTEs that would be
traversed for a given iova access.
Signed-off-by: Rob Clark
---
drivers/iommu/io-pgtable-arm.c | 40 +++---
include/linux/io-pgtable.h | 9
2 files changed, 41 insertions
From: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 25 +
drivers/gpu/drm/msm/msm_gpu.h | 2 +-
3 files changed, 19 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu
From: Rob Clark
In the case of iova fault triggered devcore dumps, include additional
debug information based on what we think is the current page tables,
including the TTBR0 value (which should match what we have in
adreno_smmu_fault_info unless things have gone horribly wrong), and
the
On Wed, Sep 22, 2021 at 5:44 PM Laurent Pinchart
wrote:
>
> Hi Rob,
>
> Thank you for the patch.
>
> On Mon, Sep 20, 2021 at 03:58:00PM -0700, Rob Clark wrote:
> > From: Rob Clark
> >
> > Slightly awkward to fish out the display_info when we aren't creati
On Fri, Sep 24, 2021 at 12:18 AM Christian König
wrote:
>
> Add functions to dump dma_fence and dma_resv objects into a seq_file and
> use them for printing the debugfs informations.
>
> Signed-off-by: Christian König
for the series,
Reviewed-by: Rob Clark
> ---
> driv
From: Rob Clark
If the device file was opened prior to fw being available (such as from
initrd before rootfs is mounted, when the initrd does not contain GPU
fw), that would cause a later crash when the dev file is closed due to
unitialized submitqueues list:
CPU: 4 PID: 263 Comm: plymouthd
On Mon, Sep 27, 2021 at 1:42 AM Pekka Paalanen wrote:
>
> On Fri, 3 Sep 2021 11:47:59 -0700
> Rob Clark wrote:
>
> > From: Rob Clark
> >
> > The initial purpose is for igt tests, but this would also be useful for
> > compositors that wait until close
On Sun, Sep 26, 2021 at 12:36 PM Dmitry Baryshkov
wrote:
>
> On Sun, 26 Sept 2021 at 22:01, Rob Clark wrote:
> >
> > From: Rob Clark
> >
> > If the device file was opened prior to fw being available (such as from
> > initrd before rootfs is mounted, when th
From: Rob Clark
I've seen a few crashes like:
Internal error: synchronous external abort: 9610 [#1] PREEMPT SMP
Modules linked in: snd_seq_dummy snd_seq snd_seq_device bridge stp llc tun
nf_nat_tftp nf_conntrack_tftp nf_nat_ftp nf_conntrack_ftp esp6 ah6 ip6t_REJECT
ip6t_ipv6h
From: Rob Clark
I've seen some crashes in our crash reporting that *look* like multiple
threads stomping on each other while communicating with GMU. So wrap
all those paths in a lock.
Signed-off-by: Rob Clark
---
Are we allowed to use c99/gnu99 yet?
drivers/gpu/drm/msm/Mak
From: Rob Clark
Before open-coding this a 2nd time, add a helper.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_atomic.c | 21 ++---
drivers/gpu/drm/msm/msm_drv.c| 29 +
drivers/gpu/drm/msm/msm_drv.h| 22
From: Rob Clark
Add a short delay before clamping to idle frequency on active->idle
transition. It takes ~0.5ms to increase the freq again on the next
idle->active transition, so this helps avoid extra freq transitions
on workloads that bounce between CPU and GPU.
Signed-off-by: Rob
On Tue, Sep 28, 2021 at 7:52 AM Akhil P Oommen wrote:
>
> On 9/27/2021 8:59 PM, Rob Clark wrote:
> > From: Rob Clark
> >
> > I've seen a few crashes like:
> >
> > Internal error: synchronous external abort: 9610 [#1] PREEMPT SMP
> >
From: Rob Clark
These aren't used. And if we add use for them later, we should probably
do something a bit more structured than string parsing.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 6 --
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.
> > important
> > > > and I wasn't confortable doing them.
> > >
> > >
> > > Hey Maxime,
> > > Sorry for taking so long to get to this, but now that plumbers is
> > > over I've had a chance to check it out on kirin
> > >
> &
From: Rob Clark
In theory a context can be destroyed and a new one allocated at the same
address, making the pointer comparision to detect when we don't need to
update the current pagetables invalid. Instead assign a sequence number
to each context on creation, and use this for the
On Thu, Sep 30, 2021 at 11:34 AM Daniel Vetter wrote:
>
> On Thu, Sep 30, 2021 at 8:20 PM Rob Clark wrote:
> >
> > From: Rob Clark
> >
> > In theory a context can be destroyed and a new one allocated at the same
> > address, making the pointer compari
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