Re: [PATCH 0/2] Add WL-355608-A8 panel

2024-05-28 Thread Philippe Simons
Tested on my RG35XX-H, no issues Tested-by: Philippe Simons

Re: [PATCH 0/2] Add WL-355608-A8 panel

2024-05-28 Thread Philippe Simons
Tested on my RG35XX-H, no issues Tested-by: Philippe Simons

Re: [PATCH v5 00/26] drm: sun4i: add Display Engine 3.3 (DE33) support

2024-09-30 Thread Philippe Simons
tested on 6.12-rc1 with RG35XX-H Tested-by: Philippe Simons On 29/09/2024 11:04, Ryan Walklin wrote: Hi, V5 of this patch series adding support for the Allwinner DE33 display engine variant. V5 is rebased on torvalds/master as of today with the 6.12 drm-next patches included, with no code

Re: [PATCH 4/6] drm: panel: nv3052c: Add a panel for RG40XX series

2024-11-24 Thread Philippe Simons
Tested on RG40XX-V Tested-by: Philippe Simons On 24/11/2024 09:02, Hironori KIKUCHI wrote: This is a display panel used in the Anbernic RG40XX series (H and V), a handheld gaming device from Anbernic. It is 4.00 inches in size (diagonally) with a resolution of 640x480. Signed-off-by

Re: [PATCH 6/6] drm: panel: nv3052c: Add a panel for RG CubeXX

2024-11-24 Thread Philippe Simons
Tested on RG CubeXX Tested-by: Philippe Simons On 24/11/2024 09:02, Hironori KIKUCHI wrote: This is a display panel used in the Anbernic RG CubeXX, a handheld gaming device from Anbernic. It is 3.95 inches in size (diagonally) with a resolution of 720x720. Signed-off-by: Hironori KIKUCHI

Re: [PATCH v2 0/3] drm/panfrost: enable G31 on H616

2025-04-27 Thread Philippe Simons
Hi, is there any issue with this serie Thanks, Philippe On 4/3/25 07:52, Philippe Simons wrote: Allwinner H616 has a dedicated power domain for its Mali G31. Currently after probe, the GPU is put in runtime suspend which disable the power domain. On first usage of GPU, the power domain

Re: [PATCH 0/5] arm64: sunxi: h616: Enable Mali GPU

2025-03-02 Thread Philippe Simons
Tested this on a RG35XX-H (H700), launching glmark2-es2-drm completely hangs the board. No kernel oops or error messages. Philippe On 21/02/2025 01:57, Andre Przywara wrote: The Allwinner H616/H618/H313/H700 SoCs contain a Mali G32 MP2 GPU. This IP is from the Bifrost family and is already su

[PATCH 1/2] drm/panfrost: Add PM runtime flags

2025-03-12 Thread Philippe Simons
panfrost_device_runtime_suspend/resume. Signed-off-by: Philippe Simons --- drivers/gpu/drm/panfrost/panfrost_device.c | 37 ++ drivers/gpu/drm/panfrost/panfrost_device.h | 4 +++ 2 files changed, 41 insertions(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost

[PATCH 2/2] drm/panfrost: add h616 compatible string

2025-03-12 Thread Philippe Simons
Tie the Allwinner compatible string to the two features bits that will toggle the clocks and the reset line whenever the power domain is changing state. Signed-off-by: Philippe Simons --- drivers/gpu/drm/panfrost/panfrost_drv.c | 8 1 file changed, 8 insertions(+) diff --git a/drivers

[PATCH 0/2] drm/panfrost:

2025-03-12 Thread Philippe Simons
reset line after the power domain enabling and asserting the reset line and disabling the clocks prior to the power domain disabling. This allows to use the Mali GPU on all Allwinner H616 boards and devices. Philippe Simons (2): drm/panfrost: Add PM runtime flags drm/panfrost: add h616

Re: [PATCH 1/2] drm/panfrost: Add PM runtime flags

2025-03-31 Thread Philippe Simons
On 3/31/25 12:32, Steven Price wrote: On 27/03/2025 12:36, Andre Przywara wrote: On Thu, 13 Mar 2025 00:23:18 +0100 Philippe Simons wrote: Hi Rob, Boris, Steven, When the GPU is the only device attached to a single power domain, core genpd disable and enable it when gpu enter and leave

[PATCH v2 1/3] drm/panfrost: Add PM runtime flag

2025-04-02 Thread Philippe Simons
/resume. Reviewed-by: Steven Price Signed-off-by: Philippe Simons --- drivers/gpu/drm/panfrost/panfrost_device.c | 33 ++ drivers/gpu/drm/panfrost/panfrost_device.h | 3 ++ 2 files changed, 36 insertions(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers

[PATCH v2 3/3] drm/panfrost: reorder pd/clk/rst sequence

2025-04-02 Thread Philippe Simons
According to Mali manuals, the powerup sequence should be enable pd, asserting the reset then enabling the clock and the reverse for powerdown. Signed-off-by: Philippe Simons --- drivers/gpu/drm/panfrost/panfrost_device.c | 38 +++--- 1 file changed, 19 insertions(+), 19

[PATCH v2 2/3] drm/panfrost: add h616 compatible string

2025-04-02 Thread Philippe Simons
Tie the Allwinner compatible string to the GPU_PM_RT feature bits that will toggle the clocks and the reset line whenever the power domain is changing state. Signed-off-by: Philippe Simons --- drivers/gpu/drm/panfrost/panfrost_drv.c | 8 1 file changed, 8 insertions(+) diff --git a

[PATCH v2 0/3] drm/panfrost: enable G31 on H616

2025-04-02 Thread Philippe Simons
/down sequences according to Mali manuals. Link to v1: https://lore.kernel.org/linux-sunxi/20250312232319.25712-1-simons.phili...@gmail.com/ Philippe Simons (3): drm/panfrost: Add PM runtime flag drm/panfrost: add h616 compatible string drm/panfrost: reorder pd/clk/rst sequence drivers/gpu