On Sun, Jul 25, 2021 at 9:31 PM Sam Ravnborg wrote:
>
> On Tue, Jun 29, 2021 at 07:47:21AM +0800, Nicolas Boichat wrote:
> > Many of the DSI flags have names opposite to their actual effects,
> > e.g. MIPI_DSI_MODE_EOT_PACKET means that EoT packets will actually
> >
Many of the DSI flags have names opposite to their actual effects,
e.g. MIPI_DSI_MODE_EOT_PACKET means that EoT packets will actually
be disabled. Fix this by including _NO_ in the flag names, e.g.
MIPI_DSI_MODE_NO_EOT_PACKET.
Signed-off-by: Nicolas Boichat
Reviewed-by: Linus Walleij
Reviewed
On Tue, Jul 27, 2021 at 4:35 PM Sam Ravnborg wrote:
>
> Hi Nicolas,
> On Tue, Jul 27, 2021 at 09:45:21AM +0800, Nicolas Boichat wrote:
> > Many of the DSI flags have names opposite to their actual effects,
> > e.g. MIPI_DSI_MODE_EOT_PACKET means that EoT packets will actually
On Tue, Apr 20, 2021 at 9:01 PM Rob Herring wrote:
>
> On Mon, Jan 25, 2021 at 7:18 PM Nicolas Boichat wrote:
> >
> > Define a compatible string for the Mali Bifrost GPU found in
> > Mediatek's MT8183 SoCs.
> >
> > Signed-off-by: Nicolas Boichat
>
gulators and 3 power domains.
Changes in v2:
- Use sram instead of mali_sram as SRAM supply name.
- Rename mali@ to gpu@.
Nicolas Boichat (4):
dt-bindings: gpu: mali-bifrost: Add Mediatek MT8183
arm64: dts: mt8183: Add node for the Mali GPU
drm/panfrost: devfreq: Disable devfreq whe
Define a compatible string for the Mali Bifrost GPU found in
Mediatek's MT8183 SoCs.
Signed-off-by: Nicolas Boichat
---
Changes in v12:
- binding: Fix min/maxItems logic (Rob Herring)
Changes in v11:
- binding: power-domain-names not power-domainS-names
Changes in v10:
- Fix the bindi
r now on those GPUs.
Signed-off-by: Nicolas Boichat
Reviewed-by: Tomeu Vizoso
Reviewed-by: Steven Price
---
(no changes since v9)
Changes in v9:
- Explain why devfreq needs to be disabled for GPUs with >1
regulators.
Changes in v8:
- Use DRM_DEV_INFO instead of ERROR
Changes in v7
Add support for MT8183's G72 Bifrost.
Signed-off-by: Nicolas Boichat
Reviewed-by: Tomeu Vizoso
Reviewed-by: Steven Price
---
(no changes since v7)
Changes in v7:
- Fix GPU ID in commit message
Changes in v6:
- Context conflicts, reflow the code.
- Use ARRAY_SIZE for power domain
Argh sorry I messed up the rebase and this doesn't even build...
I'll send v13.
On Wed, Apr 21, 2021 at 8:19 AM Nicolas Boichat wrote:
>
> GPUs with more than a single regulator (e.g. G72 on MT8183) will
> require platform-specific handling for devfreq, for 2 reasons:
ain names.
Changes in v3:
- Match mt8183-mali instead of bifrost, as we require special
handling for the 2 regulators and 3 power domains.
Changes in v2:
- Use sram instead of mali_sram as SRAM supply name.
- Rename mali@ to gpu@.
Nicolas Boichat (4):
dt-bindings: gpu: mali-bifrost: Add Media
Define a compatible string for the Mali Bifrost GPU found in
Mediatek's MT8183 SoCs.
Signed-off-by: Nicolas Boichat
---
(no changes since v12)
Changes in v12:
- binding: Fix min/maxItems logic (Rob Herring)
Changes in v11:
- binding: power-domain-names not power-domainS-names
Chang
r now on those GPUs.
Signed-off-by: Nicolas Boichat
Reviewed-by: Tomeu Vizoso
Reviewed-by: Steven Price
---
Changes in v13:
- devfreq: Fix conflict resolution mistake when rebasing, didn't
even compile. Oops.
Changes in v9:
- Explain why devfreq needs to be disabled for GP
Add support for MT8183's G72 Bifrost.
Signed-off-by: Nicolas Boichat
Reviewed-by: Tomeu Vizoso
Reviewed-by: Steven Price
---
(no changes since v7)
Changes in v7:
- Fix GPU ID in commit message
Changes in v6:
- Context conflicts, reflow the code.
- Use ARRAY_SIZE for power domain
On Tue, Jan 12, 2021 at 4:59 PM Xin Ji wrote:
>
> Hi Rob Herring, thanks for the comments.
>
> On Mon, Jan 11, 2021 at 04:14:35PM -0600, Rob Herring wrote:
> > On Thu, Dec 31, 2020 at 10:21:12AM +0800, Xin Ji wrote:
> > > Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add
> > > s
ing for the 2 regulators and 3 power domains.
Changes in v2:
- Use sram instead of mali_sram as SRAM supply name.
- Rename mali@ to gpu@.
Nicolas Boichat (4):
dt-bindings: gpu: mali-bifrost: Add Mediatek MT8183
arm64: dts: mt8183: Add node for the Mali GPU
drm/panfrost: devfreq: D
Define a compatible string for the Mali Bifrost GPU found in
Mediatek's MT8183 SoCs.
Signed-off-by: Nicolas Boichat
---
Changes in v11:
- binding: power-domain-names not power-domainS-names
Changes in v10:
- Fix the binding to make sure sram-supply property can be provided.
Changes
r now on those GPUs.
Signed-off-by: Nicolas Boichat
Reviewed-by: Tomeu Vizoso
Reviewed-by: Steven Price
---
Changes in v11: None
Changes in v10: None
Changes in v9:
- Explain why devfreq needs to be disabled for GPUs with >1
regulators.
Changes in v8:
- Use DRM_DEV_INFO instead
Add support for MT8183's G72 Bifrost.
Signed-off-by: Nicolas Boichat
Reviewed-by: Tomeu Vizoso
Reviewed-by: Steven Price
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7:
- Fix GPU ID in commit message
Changes in v6:
- Context conf
On Mon, Feb 1, 2021 at 11:48 AM Jitao Shi wrote:
>
> Some panels or bridges require customized hs_da_trail time.
> So add a property in devicetree for this panels and bridges.
Since this changes the device tree, you also need to upload a binding
document change.
>
> Signed-off-by: Jitao Shi
> -
On Thu, Feb 4, 2021 at 8:07 PM Robert Foss wrote:
>
> Hi Xin,
>
> Thanks for the patch.
>
> On Thu, 28 Jan 2021 at 12:17, Xin Ji wrote:
> >
> > Enable DSI EOTP feature for fixing some panel screen constance
> > shift issue.
> > Removing MIPI flag MIPI_DSI_MODE_EOT_PACKET to enable DSI EOTP.
>
> I
On Thu, Feb 4, 2021 at 8:59 PM Andrzej Hajda wrote:
>
>
> W dniu 04.02.2021 o 13:34, Nicolas Boichat pisze:
> > On Thu, Feb 4, 2021 at 8:07 PM Robert Foss wrote:
> >> Hi Xin,
> >>
> >> Thanks for the patch.
> >>
> >> On Thu, 28 Jan 202
On Sat, Feb 6, 2021 at 1:55 AM Rob Herring wrote:
>
> On Tue, 26 Jan 2021 09:17:56 +0800, Nicolas Boichat wrote:
> > Define a compatible string for the Mali Bifrost GPU found in
> > Mediatek's MT8183 SoCs.
> >
> > Signed-off-by: Nicolas Boichat
> > -
Many of the DSI flags have names opposite to their actual effects,
e.g. MIPI_DSI_MODE_EOT_PACKET means that EoT packets will actually
be disabled. Fix this by including _NO_ in the flag names, e.g.
MIPI_DSI_MODE_NO_EOT_PACKET.
Signed-off-by: Nicolas Boichat
---
I considered adding _DISABLE_
+Pi-Hsun Shih
On Mon, Feb 8, 2021 at 9:42 AM Jitao Shi wrote:
>
> Add per-platform max clock rate check in mtk_dpi_bridge_mode_valid.
>
> Signed-off-by: Jitao Shi
I believe this patch (and the following) were actually authored by
Pi-Hsun: https://crrev.com/c/2628812 . Would be best to keep the
On Mon, Feb 22, 2021 at 3:08 AM Laurent Pinchart
wrote:
>
> Hi Nicolas,
>
> Thank you for the patch.
>
> On Thu, Feb 11, 2021 at 11:33:55AM +0800, Nicolas Boichat wrote:
> > Many of the DSI flags have names opposite to their actual effects,
> > e.g. MIPI_DSI_MODE_EOT
On Mon, Feb 22, 2021 at 3:21 PM Andrzej Hajda wrote:
>
> Hi Nicolas,
>
> W dniu 22.02.2021 o 06:31, Nicolas Boichat pisze:
> > On Mon, Feb 22, 2021 at 3:08 AM Laurent Pinchart
> > wrote:
> >> Hi Nicolas,
> >>
> >> Thank you for the patch.
On Mon, Mar 1, 2021 at 4:59 PM Linus Walleij wrote:
>
> On Thu, Feb 11, 2021 at 4:34 AM Nicolas Boichat wrote:
>
> > Many of the DSI flags have names opposite to their actual effects,
> > e.g. MIPI_DSI_MODE_EOT_PACKET means that EoT packets will actually
> > be disa
ould mean "use EOT packet" when in fact it means the
> reverse.
>
> Fix it up by implementing the flag right in the MCDE
> DSI driver and remove the flag from panels that actually
> want the EOT packet.
>
> Suggested-by: Nicolas Boichat
> Signed-off-by: Linus Walle
On Fri, May 14, 2021 at 11:27 PM Steven Price wrote:
> [snip]
> >>> Seems this version is ready to be applied if we get a review on the DT ?
> >>>
> >>> Mathias ? could you have a look ?
> >>>
> >>
> >> Given Rob has Acked the DT bindings, I think it's OK to apply patches
> >> 1, 3 and 4 via drm-m
On Mon, Jun 28, 2021 at 7:10 PM Linus Walleij wrote:
>
> On Wed, Mar 3, 2021 at 11:31 AM Nicolas Boichat wrote:
> > On Mon, Mar 1, 2021 at 4:59 PM Linus Walleij
> > wrote:
>
> > > > dsi->mode_flags =
> > > >
Many of the DSI flags have names opposite to their actual effects,
e.g. MIPI_DSI_MODE_EOT_PACKET means that EoT packets will actually
be disabled. Fix this by including _NO_ in the flag names, e.g.
MIPI_DSI_MODE_NO_EOT_PACKET.
Signed-off-by: Nicolas Boichat
---
I considered adding _DISABLE_
djusting to kernel, thus may cause change the driver code in each
> > > project, so config them in DT is a best option.
> >
> > Where's the ack from a Google engineer?
> They didn't give the review ack, but we discussed it offline. Nicolas
> Boichat known this.
On Sat, Dec 12, 2020 at 12:12 PM Yongqiang Niu
wrote:
>
> there are 2 more clock need enable for display.
> parser these clock when mutex device probe,
> enable and disable when mutex on/off
>
> Signed-off-by: Yongqiang Niu
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 49
> +
On Sat, Dec 12, 2020 at 12:13 PM Yongqiang Niu
wrote:
>
> Use function call for setting mmsys ovl mout register
>
> Signed-off-by: Yongqiang Niu
> ---
> drivers/soc/mediatek/mmsys/mtk-mmsys.c | 18 ++
> include/linux/soc/mediatek/mtk-mmsys.h | 3 +++
> 2 files changed, 21 insert
On Mon, Dec 28, 2020 at 4:38 PM Yongqiang Niu
wrote:
>
> the mmsys will more and more complicated after support
> more and more SoCs, add an independent folder will be
> more clear
>
> Signed-off-by: Yongqiang Niu
> ---
> drivers/soc/mediatek/Makefile | 2 +-
> drivers/soc/mediatek/mm
ent mesa driver.
Nicolas Boichat (4):
dt-bindings: gpu: mali-bifrost: Add Mediatek MT8183
arm64: dts: mt8183: Add node for the Mali GPU
drm/panfrost: devfreq: Disable devfreq when num_supplies > 1
drm/panfrost: Add mt8183-mali compatible string
.../bindings/gpu/arm,mali-bifrost
Define a compatible string for the Mali Bifrost GPU found in
Mediatek's MT8183 SoCs.
Signed-off-by: Nicolas Boichat
Reviewed-by: Alyssa Rosenzweig
---
Changes in v6:
- Rebased, actually tested with recent mesa driver.
- No change
Changes in v5:
- Rename "2d" power d
GPUs with more than a single regulator (e.g. G-57 on MT8183) will
require platform-specific handling, disable devfreq for now.
Signed-off-by: Nicolas Boichat
---
Changes in v6:
- New change
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 9 +
1 file changed, 9 insertions(+)
diff --git
Add support for MT8183's G-57 Bifrost.
Signed-off-by: Nicolas Boichat
---
Changes in v6:
- Context conflicts, reflow the code.
- Use ARRAY_SIZE for power domains too.
Changes in v5:
- Change power domain name from 2d to core2.
Changes in v4:
- Add power domain names.
Changes
On Tue, Jan 5, 2021 at 8:34 AM Alyssa Rosenzweig
wrote:
>
> > GPUs with more than a single regulator (e.g. G-57 on MT8183) will
>
> G72
Duh, sorry, yes. I will fix that in v7.
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.free
Changes in v6:
- Rebased, actually tested with recent mesa driver.
Nicolas Boichat (4):
dt-bindings: gpu: mali-bifrost: Add Mediatek MT8183
arm64: dts: mt8183: Add node for the Mali GPU
drm/panfrost: devfreq: Disable devfreq when num_supplies > 1
drm/panfrost: Add mt8183-mali compatible str
Define a compatible string for the Mali Bifrost GPU found in
Mediatek's MT8183 SoCs.
Signed-off-by: Nicolas Boichat
Reviewed-by: Alyssa Rosenzweig
---
Changes in v7:
- Fix GPU ID in commit message
Changes in v6:
- Rebased, actually tested with recent mesa driver.
- No change
Changes
GPUs with more than a single regulator (e.g. G72 on MT8183) will
require platform-specific handling, disable devfreq for now.
Signed-off-by: Nicolas Boichat
---
Changes in v7:
- Fix GPU ID in commit message
Changes in v6:
- New change
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 9
Add support for MT8183's G72 Bifrost.
Signed-off-by: Nicolas Boichat
---
Changes in v7:
- Fix GPU ID in commit message
Changes in v6:
- Context conflicts, reflow the code.
- Use ARRAY_SIZE for power domains too.
Changes in v5:
- Change power domain name from 2d to core2.
Changes
On Thu, Jan 7, 2021 at 4:31 PM Tomeu Vizoso wrote:
>
> On 1/7/21 9:26 AM, Nicolas Boichat wrote:
> > GPUs with more than a single regulator (e.g. G72 on MT8183) will
> > require platform-specific handling, disable devfreq for now.
> >
> > Signed-off-by: Nicolas Boich
Changes in v7:
- Fix GPU ID in commit message
- Fix GPU ID in commit message
Changes in v6:
- Rebased, actually tested with recent mesa driver.
Nicolas Boichat (4):
dt-bindings: gpu: mali-bifrost: Add Mediatek MT8183
arm64: dts: mt8183: Add node for the Mali GPU
drm/panfrost: devfreq:
Define a compatible string for the Mali Bifrost GPU found in
Mediatek's MT8183 SoCs.
Signed-off-by: Nicolas Boichat
Reviewed-by: Alyssa Rosenzweig
---
(no changes since v6)
Changes in v6:
- Rebased, actually tested with recent mesa driver.
- No change
Changes in v5:
- Rename "
GPUs with more than a single regulator (e.g. G72 on MT8183) will
require platform-specific handling, disable devfreq for now.
Signed-off-by: Nicolas Boichat
Reviewed-by: Tomeu Vizoso
---
Changes in v8:
- Use DRM_DEV_INFO instead of ERROR
Changes in v7:
- Fix GPU ID in commit message
Add support for MT8183's G72 Bifrost.
Signed-off-by: Nicolas Boichat
Reviewed-by: Tomeu Vizoso
---
(no changes since v7)
Changes in v7:
- Fix GPU ID in commit message
Changes in v6:
- Context conflicts, reflow the code.
- Use ARRAY_SIZE for power domains too.
Changes in v5:
- C
On Thu, Jan 7, 2021 at 11:59 PM Steven Price wrote:
>
> On 05/01/2021 00:11, Nicolas Boichat wrote:
> > GPUs with more than a single regulator (e.g. G-57 on MT8183) will
> > require platform-specific handling, disable devfreq for now.
>
> Can you explain what actually goe
sabled for GPUs with >1
regulators.
Changes in v8:
- Use DRM_DEV_INFO instead of ERROR
Changes in v7:
- Fix GPU ID in commit message
- Fix GPU ID in commit message
Changes in v6:
- Rebased, actually tested with recent mesa driver.
Nicolas Boichat (4):
dt-bindings: gpu: mali-bif
Define a compatible string for the Mali Bifrost GPU found in
Mediatek's MT8183 SoCs.
Signed-off-by: Nicolas Boichat
Reviewed-by: Alyssa Rosenzweig
---
(no changes since v6)
Changes in v6:
- Rebased, actually tested with recent mesa driver.
- No change
Changes in v5:
- Rename "
r now on those GPUs.
Signed-off-by: Nicolas Boichat
Reviewed-by: Tomeu Vizoso
---
Changes in v9:
- Explain why devfreq needs to be disabled for GPUs with >1
regulators.
Changes in v8:
- Use DRM_DEV_INFO instead of ERROR
Changes in v7:
- Fix GPU ID in commit message
Changes in v6
Add support for MT8183's G72 Bifrost.
Signed-off-by: Nicolas Boichat
Reviewed-by: Tomeu Vizoso
---
(no changes since v7)
Changes in v7:
- Fix GPU ID in commit message
Changes in v6:
- Context conflicts, reflow the code.
- Use ARRAY_SIZE for power domains too.
Changes in v5:
- C
On Tue, Jan 12, 2021 at 11:07 PM Rob Herring wrote:
>
> On Fri, Jan 08, 2021 at 09:10:08AM +0800, Nicolas Boichat wrote:
> > Define a compatible string for the Mali Bifrost GPU found in
> > Mediatek's MT8183 SoCs.
> >
> > Signed-off-by: Nicolas Boichat
tested with recent mesa driver.
Nicolas Boichat (4):
dt-bindings: gpu: mali-bifrost: Add Mediatek MT8183
arm64: dts: mt8183: Add node for the Mali GPU
drm/panfrost: devfreq: Disable devfreq when num_supplies > 1
drm/panfrost: Add mt8183-mali compatible string
.../bindings/gpu/
Define a compatible string for the Mali Bifrost GPU found in
Mediatek's MT8183 SoCs.
Signed-off-by: Nicolas Boichat
---
Changes in v10:
- Fix the binding to make sure sram-supply property can be provided.
Changes in v6:
- Rebased, actually tested with recent mesa driver.
- No c
r now on those GPUs.
Signed-off-by: Nicolas Boichat
Reviewed-by: Tomeu Vizoso
---
(no changes since v9)
Changes in v9:
- Explain why devfreq needs to be disabled for GPUs with >1
regulators.
Changes in v8:
- Use DRM_DEV_INFO instead of ERROR
Changes in v7:
- Fix GPU ID in commit
Add support for MT8183's G72 Bifrost.
Signed-off-by: Nicolas Boichat
Reviewed-by: Tomeu Vizoso
---
(no changes since v7)
Changes in v7:
- Fix GPU ID in commit message
Changes in v6:
- Context conflicts, reflow the code.
- Use ARRAY_SIZE for power domains too.
Changes in v5:
- C
On Tue, Apr 16, 2019 at 2:05 PM Jitao Shi wrote:
>
> Config the different CMDQ reg address in driver data.
>
> Signed-off-by: Jitao Shi
> ---
> drivers/gpu/drm/mediatek/mtk_dsi.c | 39 +++---
> 1 file changed, 30 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/
On Mon, Dec 24, 2018 at 6:52 PM Yongqiang Niu
wrote:
>
> This patch redefine mtk_ddp_sout_sel
Can you describe a bit more why you are making this change?
> Signed-off-by: Yongqiang Niu
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 32
> 1 file changed, 20 in
On Mon, Dec 24, 2018 at 6:53 PM Yongqiang Niu
wrote:
>
> This patch add gmc_bits for ovl private data
>
> Signed-off-by: Yongqiang Niu
> ---
> drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 23 +--
> 1 file changed, 21 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm
On Mon, Dec 24, 2018 at 6:53 PM Yongqiang Niu
wrote:
>
> This patch add function mtk_ddp_comp_get_type
>
> Signed-off-by: Yongqiang Niu
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 10 ++
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 +
> 2 files changed, 11 insertions(+)
>
On Mon, Dec 24, 2018 at 6:52 PM Yongqiang Niu
wrote:
>
> This patch add ovl0/ovl0_2l usecase
>
> Signed-off-by: Yongqiang Niu
> ---
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 38
> ++---
> 1 file changed, 35 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu
On Sun, Feb 17, 2019 at 10:48 PM Jitao Shi wrote:
>
> On Thu, 2019-02-14 at 13:54 +0800, Nicolas Boichat wrote:
> > On Thu, Feb 14, 2019 at 12:43 PM Jitao Shi wrote:
> > >
> > > MT8183 dsi has two changes with mt8173.
> > > 1. Add the register double buf
On Wed, Mar 13, 2019 at 4:53 PM Yongqiang Niu
wrote:
>
> This series are based on 4.20-rc1 and provide 18 patches to
> support mediatek SOC MT8183
v1 (https://patchwork.freedesktop.org/series/54451/#rev1) had a large
number of comments, and I don't think you addressed any of them here?
Can you pl
On Sat, Jun 1, 2019 at 5:26 PM Jitao Shi wrote:
>
> Change the method of frame rate calc which can get more accurate
> frame rate.
>
> data rate = pixel_clock * bit_per_pixel / lanes
> Adjust hfp_wc to adapt the additional phy_data
>
> if MIPI_DSI_MODE_VIDEO_BURST
> hfp_wc = hfp * bpp - da
On Mon, Jun 24, 2019 at 2:04 PM Jitao Shi wrote:
>
> Add driver for BOE tv101wum-nl6 panel is a 10.1" 1200x1920 panel.
>
> Signed-off-by: Jitao Shi
> ---
> drivers/gpu/drm/panel/Kconfig | 10 +
> drivers/gpu/drm/panel/Makefile| 1 +
> .../gpu/drm/panel/panel-bo
On Mon, Jun 24, 2019 at 4:25 PM Nicolas Boichat wrote:
>
> On Mon, Jun 24, 2019 at 2:04 PM Jitao Shi wrote:
> >
> > Add driver for BOE tv101wum-nl6 panel is a 10.1" 1200x1920 panel.
> >
> > Signed-off-by: Jitao Shi
> > ---
> > drivers/gpu/drm/pan
On Mon, Jun 24, 2019 at 4:00 PM Jitao Shi wrote:
>
> Auo,kd101n80-45na's connector is same as boe,tv101wum-nl6.
> The most codes can be reuse.
> So auo,kd101n80-45na and boe,tv101wum-nl6 use one driver file.
> Add the different parts in driver data.
>
> Signed-off-by: Jitao Shi
> ---
> .../gpu/d
On Fri, Mar 15, 2019 at 10:06 AM Yongqiang Niu
wrote:
>
> On Tue, 2018-12-25 at 11:57 +0800, Nicolas Boichat wrote:
> > On Mon, Dec 24, 2018 at 6:52 PM Yongqiang Niu
> > wrote:
> > >
> > > This patch redefine mtk_ddp_sout_sel
> >
> > Can you de
On Fri, Mar 15, 2019 at 10:34 AM Yongqiang Niu
wrote:
>
> On Tue, 2018-12-25 at 12:15 +0800, Nicolas Boichat wrote:
> > On Mon, Dec 24, 2018 at 6:53 PM Yongqiang Niu
> > wrote:
> > >
> > > This patch add gmc_bits for ovl private data
>
On Mon, Dec 16, 2019 at 4:46 PM Hsin-Yi Wang wrote:
>
> On Sat, Dec 14, 2019 at 6:38 AM Laurent Pinchart
> wrote:
> >
> > Hi Hsin-Yi and Nicolas,
> >
> > Thank you for the patch.
> >
> > On Wed, Dec 11, 2019 at 02:19:09PM +0800, Hs
Hi Laurent,
On Tue, Dec 17, 2019 at 12:39 AM Laurent Pinchart <
laurent.pinch...@ideasonboard.com> wrote:
>
> Hello Nicolas and Hsin-Yi,
>
> On Mon, Dec 16, 2019 at 06:19:24PM +0800, Nicolas Boichat wrote:
> > On Mon, Dec 16, 2019 at 4:46 PM Hsin-Yi Wang wrote:
> >
on, Dec 16, 2019 at 06:19:24PM +0800, Nicolas Boichat wrote:
> > > On Mon, Dec 16, 2019 at 4:46 PM Hsin-Yi Wang wrote:
> > > > On Sat, Dec 14, 2019 at 6:38 AM Laurent Pinchart wrote:
> > > > > On Wed, Dec 11, 2019 at 02:19:09PM +0800, Hsin-Yi Wang wrote:
> >
Hi,
On Tue, Dec 17, 2019 at 8:52 AM Laurent Pinchart
wrote:
>
> Hi Nicolas,
>
> On Tue, Dec 17, 2019 at 08:40:51AM +0800, Nicolas Boichat wrote:
> > (Brilliant, I managed to accidentally send the email below, and send
> > it as HTML, sorry about that... ASCII art in
On Fri, Dec 20, 2019 at 4:17 PM Enric Balletbo i Serra
wrote:
>
> From: Jitao Shi
>
> This patch adds drm_bridge driver for parade DSI to eDP bridge chip.
>
> Signed-off-by: Jitao Shi
> Reviewed-by: Daniel Kurtz
> Reviewed-by: Enric Balletbo i Serra
> [uli: followed API changes, removed FW upd
On Mon, Dec 23, 2019 at 3:10 PM Enric Balletbo i Serra
wrote:
>
> Hi Nicolas,
>
> Many thanks for you review. Just preparing a new version with your comments
> addressed.
>
> On 20/12/19 9:44, Nicolas Boichat wrote:
> > On Fri, Dec 20, 2019 at 4:17 PM Enric
For testing only, the driver doesn't really work yet, AFAICT.
Signed-off-by: Nicolas Boichat
---
drivers/gpu/drm/panfrost/panfrost_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c
b/drivers/gpu/drm/panfrost/panfrost_drv.c
index 48e3c41652
Add a basic GPU node for mt8183.
Signed-off-by: Nicolas Boichat
---
Upstreaming what matches existing bindings from our Chromium OS tree:
https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-4.19/arch/arm64/boot/dts/mediatek/mt8183.dtsi#1348
The evb part of this change
Define a compatible string for the Mali Bifrost GPU found in
Mediatek's MT8183 SoCs.
Signed-off-by: Nicolas Boichat
---
.../bindings/gpu/arm,mali-bifrost.yaml | 18 ++
1 file changed, 18 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpu/arm
The Bifrost GPU on MT8183 uses 2 regulators (core and SRAM) for
devfreq, and provides OPP table with 2 sets of voltages.
TODO: This is incomplete as we'll need add support for setting
a pair of voltages as well.
Signed-off-by: Nicolas Boichat
---
drivers/gpu/drm/panfrost/panfrost_devf
Some GPUs, namely, the bifrost/g72 part on MT8183, have a second
regulator for their SRAM, let's add support for that.
Signed-off-by: Nicolas Boichat
---
drivers/gpu/drm/panfrost/panfrost_device.c | 21 +
drivers/gpu/drm/panfrost/panfrost_device.h | 1 +
2 files change
When there is a single power domain per device, the core will
ensure the power domains are all switched on.
However, when there are multiple ones, as in MT8183 Bifrost GPU,
we need to handle them in driver code.
Signed-off-by: Nicolas Boichat
---
The downstream driver we use on chromeos-4.19
It is useful to know which component cannot be powered on.
Signed-off-by: Nicolas Boichat
---
Was useful when trying to probe bifrost GPU, to understand what
issue we are facing.
---
drivers/gpu/drm/panfrost/panfrost_gpu.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions
ng (still incomplete and broken).
Nicolas Boichat (7):
dt-bindings: gpu: mali-bifrost: Add Mediatek MT8183
arm64: dts: mt8183: Add node for the Mali GPU
drm/panfrost: Improve error reporting in panfrost_gpu_power_on
drm/panfrost: Add support for a second regulator for the GPU
drm/panfr
On Thu, Jan 9, 2020 at 4:09 AM Rob Herring wrote:
> [snip]
> > void panfrost_devfreq_resume(struct panfrost_device *pfdev)
> > diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h
> > b/drivers/gpu/drm/panfrost/panfrost_device.h
> > index 92d471676fc7823..581da3fe5df8b17 100644
> > --- a/driv
On Wed, Jan 8, 2020 at 9:23 PM Mark Brown wrote:
>
> On Wed, Jan 08, 2020 at 01:23:34PM +0800, Nicolas Boichat wrote:
>
> > Some GPUs, namely, the bifrost/g72 part on MT8183, have a second
> > regulator for their SRAM, let's add support for that.
>
&g
On Wed, Jan 8, 2020 at 1:23 PM Nicolas Boichat wrote:
>
> Hi!
>
> Sorry for the long delay since https://patchwork.kernel.org/patch/11132381/,
> finally got around to give this a real try.
>
> The main purpose of this series is to upstream the dts change and the binding
>
Hi Ulf,
On Mon, Jan 27, 2020 at 3:55 PM Ulf Hansson wrote:
>
> On Fri, 10 Jan 2020 at 02:53, Nicolas Boichat wrote:
> >
> > +Ulf to keep me honest on the power domains
> >
> > On Thu, Jan 9, 2020 at 10:08 PM Steven Price wrote:
> > >
> >
On Fri, Feb 7, 2020 at 10:04 AM Nicolas Boichat wrote:
>
> Hi Ulf,
>
> On Mon, Jan 27, 2020 at 3:55 PM Ulf Hansson wrote:
> >
> > On Fri, 10 Jan 2020 at 02:53, Nicolas Boichat wrote:
> > >
> > > +Ulf to keep me honest on the power domains
> > >
On Mon, Jan 20, 2020 at 10:53 PM Steven Price wrote:
>
> On 14/01/2020 07:16, Nicolas Boichat wrote:
> [snip]
> >
> > + err = panfrost_pm_domain_init(pfdev);
> > + if (err) {
> > + dev_err(pfdev->dev, "pm_domain init faile
For testing only, the driver doesn't really work yet, AFAICT.
Signed-off-by: Nicolas Boichat
---
v4:
- Add power domain names.
v3:
- Match mt8183-mali instead of bifrost, as we require special
handling for the 2 regulators and 3 power domains.
drivers/gpu/drm/panfrost/panfrost_
-off-by: Nicolas Boichat
---
The downstream driver we use on chromeos-4.19 currently uses 2
additional devices in device tree to accomodate for this [1], but
I believe this solution is cleaner.
[1]
https://chromium.googlesource.com/chromiumos/third_party/kernel/+/refs/heads/chromeos-4.19/drivers
decide.
Thanks!
Nicolas Boichat (7):
dt-bindings: gpu: mali-bifrost: Add Mediatek MT8183
arm64: dts: mt8183: Add node for the Mali GPU
drm/panfrost: Improve error reporting in panfrost_gpu_power_on
drm/panfrost: Add support for multiple regulators
drm/panfrost: Add support for multiple power dom
Add a basic GPU node for mt8183.
Signed-off-by: Nicolas Boichat
Reviewed-by: Alyssa Rosenzweig
---
Upstreaming what matches existing bindings from our Chromium OS tree:
https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-4.19/arch/arm64/boot/dts/mediatek/mt8183.dtsi#1348
It is useful to know which component cannot be powered on.
Signed-off-by: Nicolas Boichat
Reviewed-by: Steven Price
Reviewed-by: Alyssa Rosenzweig
---
Was useful when trying to probe Bifrost GPU, to understand what
issue we are facing.
v4:
- No change
v3:
- Rebased on https
The Bifrost GPU on MT8183 uses 2 regulators (core and SRAM) for
devfreq, and provides OPP table with 2 sets of voltages.
TODO: This is incomplete as we'll need add support for setting
a pair of voltages as well.
Signed-off-by: Nicolas Boichat
---
drivers/gpu/drm/panfrost/panfrost_devf
Some GPUs, namely, the bifrost/g72 part on MT8183, have a second
regulator for their SRAM, let's add support for that.
We extend the framework in a generic manner so that we could
support more than 2 regulators, if required.
Signed-off-by: Nicolas Boichat
---
v4:
- nits: Run through l
Define a compatible string for the Mali Bifrost GPU found in
Mediatek's MT8183 SoCs.
Signed-off-by: Nicolas Boichat
Reviewed-by: Alyssa Rosenzweig
---
v4:
- Add power-domain-names description
(kept Alyssa's reviewed-by as the change is minor)
v3:
- No change
.../bindings/gp
1 - 100 of 172 matches
Mail list logo
