[PATCH 13/46] drm/i915: Add logical engine mapping

2021-08-03 Thread Matthew Brost
Add logical engine mapping. This is required for split-frame, as workloads need to be placed on engines in a logically contiguous manner. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 60 --- drivers/gpu/drm/i915/gt/intel_engine_types.h | 1

[PATCH 09/46] drm/i915: Add GT PM unpark worker

2021-08-03 Thread Matthew Brost
rates / drains the list + queues the workqueues. First user of this is deregistration of GuC contexts. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/intel_gt.c| 3 ++ drivers/gpu/drm/i915/gt/intel_gt_pm.c | 8 + .../gpu/drm/i915/gt/intel_gt_pm_unpark_work.c

[PATCH 07/46] drm/i915/guc: Non-static lrc descriptor registration buffer

2021-08-03 Thread Matthew Brost
prevent unready requests/contexts from consuming all registration space. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/intel_context_types.h | 3 + drivers/gpu/drm/i915/gt/uc/intel_guc.h| 9 +- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 202 -- 3 files

[PATCH 12/46] drm/i915/guc: Selftest for GuC flow control

2021-08-03 Thread Matthew Brost
contexts. Tests 1, 2, and 3 also ensure when the flow control is triggered by unready requests those unready requests do not DoS ready requests. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/uc/intel_guc.h| 6 + drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 43 +- drivers/gpu

[PATCH 15/46] drm/i915/guc: Introduce context parent-child relationship

2021-08-03 Thread Matthew Brost
n but aligns to how GuC mutli-lrc interface is defined - a single H2G is used register / deregister all of the contexts simultaneously. Subsequent patches in the series will implement the pinning / unpinning operations for parent / child contexts. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i9

[PATCH 10/46] drm/i915/guc: Take engine PM when a context is pinned with GuC submission

2021-08-03 Thread Matthew Brost
Taking a PM reference to prevent intel_gt_wait_for_idle from short circuiting while a scheduling of user context could be enabled. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/Makefile | 1 + .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 36 +-- 2

[PATCH 08/46] drm/i915/guc: Take GT PM ref when deregistering context

2021-08-03 Thread Matthew Brost
Taking a PM reference to prevent intel_gt_wait_for_idle from short circuiting while a deregister context H2G is in flight. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/intel_engine_pm.h | 5 + drivers/gpu/drm/i915/gt/intel_gt_pm.h | 13 +++ drivers/gpu/drm/i915/gt/uc

[PATCH 19/46] drm/i915/guc: Assign contexts in parent-child relationship consecutive guc_ids

2021-08-03 Thread Matthew Brost
is a precursor to the full GuC multi-lrc implementation but aligns to how GuC mutli-lrc interface is defined - guc_ids must be consecutive when using the GuC multi-lrc interface. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/intel_context.h | 6 + drivers/gpu/drm/i915/gt

[PATCH 14/46] drm/i915: Expose logical engine instance to user

2021-08-03 Thread Matthew Brost
expose the logical mapping with the existing query engine info IOCTL. Cc: Tvrtko Ursulin Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/i915_query.c | 2 ++ include/uapi/drm/i915_drm.h | 8 +++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915

[PATCH 32/46] drm/i915: Move input/exec fence handling to i915_gem_execbuffer2

2021-08-03 Thread Matthew Brost
Move the job of creating an input/exec fences (from a file descriptor) out of i915_gem_do_execbuffer. Signed-off-by: Tvrtko Ursulin Signed-off-by: Matthew Brost --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 75 +++ 1 file changed, 43 insertions(+), 32 deletions(-) diff

[PATCH 24/46] drm/i915/guc: Implement multi-lrc reset

2021-08-03 Thread Matthew Brost
Update context and full GPU reset to work with multi-lrc. The idea is parent context tracks all the active requests inflight for itself and its' children. The parent context owns the reset replaying / canceling requests as needed. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i9

[PATCH 16/46] drm/i915/guc: Implement GuC parent-child context pin / unpin functions

2021-08-03 Thread Matthew Brost
functions that will be connected later in the series. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/intel_context.c | 187 -- drivers/gpu/drm/i915/gt/intel_context.h | 43 +--- drivers/gpu/drm/i915/gt/intel_context_types.h | 4 +- .../drm/i915/gt

[PATCH 02/46] drm/i915/guc: Connect the number of guc_ids to debugfs

2021-08-03 Thread Matthew Brost
For testing purposes it may make sense to reduce the number of guc_ids available to be allocated. Add debugfs support for setting the number of guc_ids. Signed-off-by: Matthew Brost --- .../gpu/drm/i915/gt/uc/intel_guc_debugfs.c| 31 +++ .../gpu/drm/i915/gt/uc

[PATCH 11/46] drm/i915/guc: Don't call switch_to_kernel_context with GuC submission

2021-08-03 Thread Matthew Brost
Calling switch_to_kernel_context isn't needed if the engine PM reference is taken while all contexts are pinned. By not calling switch_to_kernel_context we save on issuing a request to the engine. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/intel_engine_pm.c | 4 1

[PATCH 17/46] drm/i915/guc: Add multi-lrc context registration

2021-08-03 Thread Matthew Brost
Add multi-lrc context registration H2G. In addition a workqueue and process descriptor are setup during multi-lrc context registration as these data structures are needed for multi-lrc submission. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/intel_context_types.h | 6 + drivers

[PATCH 18/46] drm/i915/guc: Ensure GuC schedule operations do not operate on child contexts

2021-08-03 Thread Matthew Brost
In GuC parent-child contexts the parent context controls the scheduling, ensure only the parent does the scheduling operations. Signed-off-by: Matthew Brost --- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 52 +++ 1 file changed, 41 insertions(+), 11 deletions(-) diff --git

[PATCH 20/46] drm/i915/guc: Add hang check to GuC submit engine

2021-08-03 Thread Matthew Brost
The heartbeat uses a single instance of a GuC submit engine (GSE) to do the hang check. As such if a different GSE's state machine hangs, the heartbeat cannot detect this hang. Add timer to each GSE which in turn can disable all submissions if it is hung. Cc: John Harrison Signed-off-by: Ma

[PATCH 25/46] drm/i915/guc: Update debugfs for GuC multi-lrc

2021-08-03 Thread Matthew Brost
Display the workqueue status in debugfs for GuC contexts that are in parent-child relationship. Signed-off-by: Matthew Brost --- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 56 +-- 1 file changed, 39 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc

[PATCH 22/46] drm/i915/guc: Implement multi-lrc submission

2021-08-03 Thread Matthew Brost
coalesce requests into a single submission. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 6 +- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 224 +- drivers/gpu/drm/i915/i915_request.h | 8 + 3 files changed, 223 insertions(+), 15

[PATCH 34/46] drm/i915: Return output fence from i915_gem_do_execbuffer

2021-08-03 Thread Matthew Brost
Move the job of creating a new sync fence and installing it onto a file descriptor to i915_gem_execbuffer2. Suggested-by: Tvrtko Ursulin Signed-off-by: Matthew Brost --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 39 +-- 1 file changed, 19 insertions(+), 20 deletions

[PATCH 23/46] drm/i915/guc: Insert submit fences between requests in parent-child relationship

2021-08-03 Thread Matthew Brost
to a single timeline. Signed-off-by: Matthew Brost Cc: John Harrison --- drivers/gpu/drm/i915/gt/intel_context.c | 2 + drivers/gpu/drm/i915/gt/intel_context.h | 5 + drivers/gpu/drm/i915/gt/intel_context_types.h | 3 + .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 3

[PATCH 36/46] drm/i915: Allow callers of i915_gem_do_execbuffer to override the batch index

2021-08-03 Thread Matthew Brost
Allow specifying the batch directly over what is inferred from passed in execbuf flags. Signed-off-by: Tvrtko Ursulin Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915

[PATCH 29/46] drm/i915/guc: Extend GuC flow control selftest for multi-lrc

2021-08-03 Thread Matthew Brost
Prove multi-lrc and single-lrc are independent. Prove multi-lrc guc_ids flow control works. Prove multi-lrc hanging the tastlet can recover from a GPU reset. Cc: John Harrison Signed-off-by: Matthew Brost --- .../i915/gt/uc/selftest_guc_flow_control.c| 299 ++ .../drm/i915

[PATCH 39/46] drm/i915: Force parallel contexts to use copy engine for reloc

2021-08-03 Thread Matthew Brost
Submitting to a subset of hardware contexts is not allowed, so use the copy engine for GPU relocations when using a parallel context. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers

[PATCH 05/46] drm/i915/guc: Introduce guc_submit_engine object

2021-08-03 Thread Matthew Brost
. Lots of find-replace. Currently only 1 guc_submit_engine instantiated, future patches will instantiate more. Signed-off-by: Matthew Brost Cc: John Harrison --- drivers/gpu/drm/i915/gt/uc/intel_guc.h| 33 +- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 557 +++--- .../i915

Re: [Intel-gfx] [PATCH 08/21] drm/i915/gem: Disallow bonding of virtual engines

2021-04-28 Thread Matthew Brost
On Wed, Apr 28, 2021 at 12:18:29PM -0500, Jason Ekstrand wrote: > On Wed, Apr 28, 2021 at 5:13 AM Daniel Vetter wrote: > > > > On Tue, Apr 27, 2021 at 08:51:08AM -0500, Jason Ekstrand wrote: > > > On Fri, Apr 23, 2021 at 5:31 PM Jason Ekstrand > > > wrote: > > > > > > > > This adds a bunch of co

Re: [Intel-gfx] [PATCH 08/21] drm/i915/gem: Disallow bonding of virtual engines

2021-04-28 Thread Matthew Brost
On Wed, Apr 28, 2021 at 12:46:07PM -0500, Jason Ekstrand wrote: > On Wed, Apr 28, 2021 at 12:26 PM Matthew Brost > wrote: > > > > On Wed, Apr 28, 2021 at 12:18:29PM -0500, Jason Ekstrand wrote: > > > On Wed, Apr 28, 2021 at 5:13 AM Daniel Vetter wrote: > > >

Re: [Intel-gfx] [PATCH 08/21] drm/i915/gem: Disallow bonding of virtual engines

2021-04-29 Thread Matthew Brost
On Thu, Apr 29, 2021 at 02:14:19PM +0200, Daniel Vetter wrote: > On Wed, Apr 28, 2021 at 01:17:27PM -0500, Jason Ekstrand wrote: > > On Wed, Apr 28, 2021 at 1:02 PM Matthew Brost > > wrote: > > > > > > On Wed, Apr 28, 2021 at 12:46:07PM -0500, Jason Ekstrand wr

Re: [Intel-gfx] [PATCH 08/21] drm/i915/gem: Disallow bonding of virtual engines

2021-05-01 Thread Matthew Brost
On Fri, Apr 30, 2021 at 12:11:07PM +0200, Daniel Vetter wrote: > On Thu, Apr 29, 2021 at 09:03:48PM -0700, Matthew Brost wrote: > > On Thu, Apr 29, 2021 at 02:14:19PM +0200, Daniel Vetter wrote: > > > On Wed, Apr 28, 2021 at 01:17:27PM -0500, Jason Ekstrand wrote: > > >

[PATCH 01/46] drm/i915/guc: Allow flexible number of context ids

2021-08-03 Thread Matthew Brost
Number of available GuC contexts ids might be limited. Stop referring in code to macro and use variable instead. Signed-off-by: Michal Wajdeczko Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/uc/intel_guc.h | 2 ++ .../gpu/drm/i915/gt/uc/intel_guc_submission.c| 16

[PATCH 21/46] drm/i915/guc: Add guc_child_context_destroy

2021-08-03 Thread Matthew Brost
Since child contexts do not own the guc_ids or GuC context registration, child contexts can simply be freed on destroy. Add guc_child_context_destroy context operation to do this. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 7 +++ 1 file changed, 7

[PATCH 30/46] drm/i915/guc: Implement no mid batch preemption for multi-lrc

2021-08-03 Thread Matthew Brost
a context is configured by set parallel extension. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/intel_context.c | 2 +- drivers/gpu/drm/i915/gt/intel_context_types.h | 3 + drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 2 +- .../gpu/drm/i915/gt/uc/intel_guc_submissio

[PATCH 26/46] drm/i915: Connect UAPI to GuC multi-lrc interface

2021-08-03 Thread Matthew Brost
Introduce 'set parallel submit' extension to connect UAPI to GuC multi-lrc interface. Kernel doc in new uAPI should explain it all. Cc: Tvrtko Ursulin Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 157 +- .../gpu/dr

[PATCH 28/46] drm/i915/guc: Add basic GuC multi-lrc selftest

2021-08-03 Thread Matthew Brost
Add very basic (single submission) multi-lrc selftest. Signed-off-by: Matthew Brost --- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 1 + .../drm/i915/gt/uc/selftest_guc_multi_lrc.c | 168 ++ .../drm/i915/selftests/i915_live_selftests.h | 1 + 3 files changed, 170

[PATCH 37/46] drm/i915: Teach execbuf there can be more than one batch in the objects list

2021-08-03 Thread Matthew Brost
will enable multiple do_execbuf calls with a single exec object array in a later patch. Suggested-by: Tvrtko Ursulin Signed-off-by: Matthew Brost --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 31 +-- 1 file changed, 22 insertions(+), 9 deletions(-) diff --git a/drivers/gpu

[PATCH 27/46] drm/i915/doc: Update parallel submit doc to point to i915_drm.h

2021-08-03 Thread Matthew Brost
Update parallel submit doc to point to i915_drm.h Signed-off-by: Matthew Brost --- Documentation/gpu/rfc/i915_parallel_execbuf.h | 122 -- Documentation/gpu/rfc/i915_scheduler.rst | 4 +- 2 files changed, 2 insertions(+), 124 deletions(-) delete mode 100644 Documentation

[PATCH 45/46] drm/i915/execlists: Weak parallel submission support for execlists

2021-08-03 Thread Matthew Brost
meantime. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 9 +- drivers/gpu/drm/i915/gt/intel_context.c | 1 - .../drm/i915/gt/intel_execlists_submission.c | 201 +- 3 files changed, 205 insertions(+), 6 deletions(-) diff --git a/drivers/gpu

[PATCH 43/46] drm/i915/guc: Handle errors in multi-lrc requests

2021-08-03 Thread Matthew Brost
. If all the requests are not present this handshake doesn't work. To work around this, if multi-lrc request has an error we skip the handshake but still emit the breadcrumbs seqno. Signed-off-by: Matthew Brost --- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 61 ++- 1

[PATCH 44/46] drm/i915: Enable multi-bb execbuf

2021-08-03 Thread Matthew Brost
Enable multi-bb execbuf by enabling the set_parallel extension. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c index

[PATCH 31/46] drm/i915: Move secure execbuf check to execbuf2

2021-08-03 Thread Matthew Brost
Goal is to remove all input sanity checks from the core submission. Signed-off-by: Tvrtko Ursulin Signed-off-by: Matthew Brost --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 35 +++ 1 file changed, 21 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/gem

[PATCH 35/46] drm/i915: Store batch index in struct i915_execbuffer

2021-08-03 Thread Matthew Brost
This will help with upcoming extensions where more than 1 batch can be submitted in a single execbuf IOCTL. Signed-off-by: Tvrtko Ursulin Signed-off-by: Matthew Brost --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 19 +-- 1 file changed, 9 insertions(+), 10 deletions

[PATCH 33/46] drm/i915: Move output fence handling to i915_gem_execbuffer2

2021-08-03 Thread Matthew Brost
Move the job of creating a new file descriptor and passing it back to userspace to i915_gem_execbuffer2. Signed-off-by: Tvrtko Ursulin Signed-off-by: Matthew Brost --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 45 ++- 1 file changed, 25 insertions(+), 20 deletions

[PATCH 40/46] drm/i915: Multi-batch execbuffer2

2021-08-03 Thread Matthew Brost
d put into the dma reseveration excl fence slot. Suggested-by: Tvrtko Ursulin Signed-off-by: Matthew Brost --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 262 +++--- drivers/gpu/drm/i915/gt/intel_context.c | 5 + drivers/gpu/drm/i915/gt/intel_context_types.h | 9 + driver

[PATCH 38/46] drm/i915: Only track object dependencies on first request

2021-08-03 Thread Matthew Brost
Only track object dependencies on the first request generated from the execbuf, this help with the upcoming multi-bb execbuf extension. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a

[PATCH 41/46] drm/i915: Eliminate unnecessary VMA calls for multi-BB submission

2021-08-03 Thread Matthew Brost
Certain VMA functions in the execbuf IOCTL only need to be called on first or last BB of a multi-BB submission. eb_relocate() on the first and eb_release_vmas() on the last. Doing so will save CPU / GPU cycles. Signed-off-by: Matthew Brost --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 127

[PATCH 42/46] drm/i915: Hold all parallel requests until last request, properly handle error

2021-08-03 Thread Matthew Brost
Hold all parallel requests, via a submit fence, until the last request is generated. If an error occurs in the middle of generating the requests, skip the requests signal the backend of the error via a request flag. Signed-off-by: Matthew Brost --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c

[PATCH 46/46] drm/i915/guc: Add delay before disabling scheduling on contexts

2021-08-03 Thread Matthew Brost
likely cause many selftests to fail. Follow up patches will fix all the selftests and enable the delay period. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +- .../i915/gem/selftests/i915_gem_coherency.c | 2 +- .../drm/i915/gem/selftests

Re: [Intel-gfx] [PATCH 1/4] drm/i915: Do not define vma on stack

2021-08-04 Thread Matthew Brost
On Mon, Aug 02, 2021 at 10:11:18PM -0700, Matthew Brost wrote: > From: Venkata Sandeep Dhanalakota > > Defining vma on stack can cause stack overflow, if > vma gets populated with new fields. > > Cc: Daniele Ceraolo Spurio > Cc: Tvrtko Ursulin > Signed-off-by: Ven

Re: [Intel-gfx] [PATCH] drm/i915: Be more gentle when exiting non-persistent contexts

2021-08-05 Thread Matthew Brost
On Thu, Aug 05, 2021 at 01:05:09PM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > When a non-persistent context exits we currently mark it as banned in > order to trigger fast termination of any outstanding GPU jobs it may have > left running. > > In doing so we apply a very strict 1ms

Re: [Intel-gfx] [PATCH] drm/i915: Fix syncmap memory leak

2021-08-06 Thread Matthew Brost
On Fri, Aug 06, 2021 at 11:23:06AM -0700, John Harrison wrote: > On 7/30/2021 12:53, Matthew Brost wrote: > > A small race exists between intel_gt_retire_requests_timeout and > > intel_timeline_exit which could result in the syncmap not getting > > free'd. Rather than

Re: [Intel-gfx] [PATCH 0/4] Enable GuC submission by default on DG1

2021-08-07 Thread Matthew Brost
On Fri, Aug 06, 2021 at 01:34:33PM +0200, Thomas Hellström (Intel) wrote: > Hi, > > On 8/3/21 7:26 PM, Matthew Brost wrote: > > On Tue, Aug 03, 2021 at 02:15:13PM +0200, Daniel Vetter wrote: > > > On Tue, Aug 3, 2021 at 6:53 AM Matthew Brost > > > wrote: > &g

[PATCH 1/3] drm/i915/guc: Fix several issues related to resets / request cancelation

2021-08-08 Thread Matthew Brost
ort request cancellation") Fixes: eb5e7da736f3 ("drm/i915/guc: Reset implementation for new GuC interface") Signed-off-by: Matthew Brost Cc: --- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 43 --- 1 file changed, 27 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/d

[PATCH 0/3] Clean up some CI failures for GuC submission

2021-08-08 Thread Matthew Brost
[2]. Lastly, add a selftest to give us confidence in some of the reset code that is rather hard / intermittent to exercise via IGTs. Signed-off-by: Matthew Brost [1] https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10456/fi-rkl-guc/igt@i915_selftest@l...@workarounds.html [2] https://intel-gfx

[PATCH 2/3] drm/i915/selftests: Fix memory corruption in live_lrc_isolation

2021-08-08 Thread Matthew Brost
text redzone into the space that is trashed. To workaround this avoid poisoning the watchdog. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/selftest_lrc.c | 29 +- 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.

[PATCH 3/3] drm/i915/selftests: Add initial GuC selftest for scrubbing lost G2H

2021-08-08 Thread Matthew Brost
rrors dropping various G2H and then issues a full GT reset proving that the scrubbing of these G2H doesn't blow up. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/intel_context_types.h | 4 + .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 18 +++ drivers/gpu/drm/i915/gt/uc/self

Re: [Intel-gfx] [PATCH 23/46] drm/i915/guc: Insert submit fences between requests in parent-child relationship

2021-08-09 Thread Matthew Brost
On Mon, Aug 09, 2021 at 06:32:42PM +0200, Daniel Vetter wrote: > On Tue, Aug 03, 2021 at 03:29:20PM -0700, Matthew Brost wrote: > > The GuC must receive requests in the order submitted for contexts in a > > parent-child relationship to function correctly. To ensure this, insert >

Re: [PATCH 10/46] drm/i915/guc: Take engine PM when a context is pinned with GuC submission

2021-08-09 Thread Matthew Brost
On Mon, Aug 09, 2021 at 04:23:42PM +0200, Daniel Vetter wrote: > On Tue, Aug 03, 2021 at 03:29:07PM -0700, Matthew Brost wrote: > > Taking a PM reference to prevent intel_gt_wait_for_idle from short > > circuiting while a scheduling of user context could be enabled. > > >

Re: [Intel-gfx] [PATCH 11/46] drm/i915/guc: Don't call switch_to_kernel_context with GuC submission

2021-08-09 Thread Matthew Brost
On Mon, Aug 09, 2021 at 04:27:01PM +0200, Daniel Vetter wrote: > On Tue, Aug 03, 2021 at 03:29:08PM -0700, Matthew Brost wrote: > > Calling switch_to_kernel_context isn't needed if the engine PM reference > > is taken while all contexts are pinned. By not calling > > s

Re: [PATCH 13/46] drm/i915: Add logical engine mapping

2021-08-09 Thread Matthew Brost
On Mon, Aug 09, 2021 at 04:28:04PM +0200, Daniel Vetter wrote: > On Tue, Aug 03, 2021 at 03:29:10PM -0700, Matthew Brost wrote: > > Add logical engine mapping. This is required for split-frame, as > > workloads need to be placed on engines in a logically contiguous manner. > &g

Re: [PATCH 14/46] drm/i915: Expose logical engine instance to user

2021-08-09 Thread Matthew Brost
On Mon, Aug 09, 2021 at 04:30:06PM +0200, Daniel Vetter wrote: > On Tue, Aug 03, 2021 at 03:29:11PM -0700, Matthew Brost wrote: > > Expose logical engine instance to user via query engine info IOCTL. This > > is required for split-frame workloads as these needs to be placed on &

Re: [Intel-gfx] [PATCH 15/46] drm/i915/guc: Introduce context parent-child relationship

2021-08-09 Thread Matthew Brost
On Mon, Aug 09, 2021 at 04:37:55PM +0200, Daniel Vetter wrote: > On Tue, Aug 03, 2021 at 03:29:12PM -0700, Matthew Brost wrote: > > Introduce context parent-child relationship. Once this relationship is > > created all pinning / unpinning operations are directed to the parent &

Re: [Intel-gfx] [PATCH 15/46] drm/i915/guc: Introduce context parent-child relationship

2021-08-09 Thread Matthew Brost
On Mon, Aug 09, 2021 at 04:40:11PM +0200, Daniel Vetter wrote: > On Mon, Aug 09, 2021 at 04:37:55PM +0200, Daniel Vetter wrote: > > On Tue, Aug 03, 2021 at 03:29:12PM -0700, Matthew Brost wrote: > > > Introduce context parent-child relationship. Once this relationship is > &g

Re: [Intel-gfx] [PATCH 16/46] drm/i915/guc: Implement GuC parent-child context pin / unpin functions

2021-08-09 Thread Matthew Brost
On Mon, Aug 09, 2021 at 05:17:34PM +0200, Daniel Vetter wrote: > On Tue, Aug 03, 2021 at 03:29:13PM -0700, Matthew Brost wrote: > > Implement GuC parent-child context pin / unpin functions in which in any > > contexts in the relationship are pinned all the contexts are pinned. The

Re: [PATCH 19/46] drm/i915/guc: Assign contexts in parent-child relationship consecutive guc_ids

2021-08-09 Thread Matthew Brost
On Mon, Aug 09, 2021 at 05:31:38PM +0200, Daniel Vetter wrote: > On Tue, Aug 03, 2021 at 03:29:16PM -0700, Matthew Brost wrote: > > Assign contexts in parent-child relationship consecutive guc_ids. This > > is accomplished by partitioning guc_id space between ones that need to >

Re: [PATCH 20/46] drm/i915/guc: Add hang check to GuC submit engine

2021-08-09 Thread Matthew Brost
On Mon, Aug 09, 2021 at 05:35:25PM +0200, Daniel Vetter wrote: > On Tue, Aug 03, 2021 at 03:29:17PM -0700, Matthew Brost wrote: > > The heartbeat uses a single instance of a GuC submit engine (GSE) to do > > the hang check. As such if a different GSE's state machine hangs, the

Re: [Intel-gfx] [PATCH 21/46] drm/i915/guc: Add guc_child_context_destroy

2021-08-09 Thread Matthew Brost
On Mon, Aug 09, 2021 at 05:36:12PM +0200, Daniel Vetter wrote: > On Tue, Aug 03, 2021 at 03:29:18PM -0700, Matthew Brost wrote: > > Since child contexts do not own the guc_ids or GuC context registration, > > child contexts can simply be freed on destroy. Add > > guc_child_co

Re: [PATCH 25/46] drm/i915/guc: Update debugfs for GuC multi-lrc

2021-08-09 Thread Matthew Brost
On Mon, Aug 09, 2021 at 06:36:44PM +0200, Daniel Vetter wrote: > On Tue, Aug 03, 2021 at 03:29:22PM -0700, Matthew Brost wrote: > > Display the workqueue status in debugfs for GuC contexts that are in > > parent-child relationship. > > > > Signed-off-by: Matthew Bros

Re: [Intel-gfx] [PATCH 46/46] drm/i915/guc: Add delay before disabling scheduling on contexts

2021-08-09 Thread Matthew Brost
On Mon, Aug 09, 2021 at 07:17:27PM +0200, Daniel Vetter wrote: > On Tue, Aug 03, 2021 at 03:29:43PM -0700, Matthew Brost wrote: > > Some workloads use lots of contexts that continually pin / unpin > > contexts. With GuC submission an unpin translates to a schedule disable >

Re: [PATCH 1/3] drm/i915/guc: Fix several issues related to resets / request cancelation

2021-08-09 Thread Matthew Brost
On Mon, Aug 09, 2021 at 03:35:26PM +0200, Daniel Vetter wrote: > On Sun, Aug 08, 2021 at 11:07:55AM -0700, Matthew Brost wrote: > > Resets are notoriously hard to get fully working and notoriously racey, > > especially with selftests / IGTs that do all sorts of wild things that &g

Re: [Intel-gfx] [PATCH 2/3] drm/i915/selftests: Fix memory corruption in live_lrc_isolation

2021-08-09 Thread Matthew Brost
On Mon, Aug 09, 2021 at 03:38:38PM +0200, Daniel Vetter wrote: > On Sun, Aug 08, 2021 at 11:07:56AM -0700, Matthew Brost wrote: > > GuC submission has exposed an existing memory corruption in > > live_lrc_isolation. We believe that some writes to the watchdog offsets > > in t

Re: [Intel-gfx] [PATCH 3/3] drm/i915/selftests: Add initial GuC selftest for scrubbing lost G2H

2021-08-09 Thread Matthew Brost
On Mon, Aug 09, 2021 at 04:03:28PM +0200, Daniel Vetter wrote: > On Sun, Aug 08, 2021 at 11:07:57AM -0700, Matthew Brost wrote: > > While debugging an issue with full GT resets I went down a rabbit hole > > thinking the scrubbing of lost G2H wasn't working correctly. T

Re: [PATCH 25/46] drm/i915/guc: Update debugfs for GuC multi-lrc

2021-08-10 Thread Matthew Brost
On Tue, Aug 10, 2021 at 11:27:31AM +0200, Daniel Vetter wrote: > On Tue, Aug 10, 2021 at 11:23:39AM +0200, Daniel Vetter wrote: > > On Mon, Aug 09, 2021 at 07:13:11PM +, Matthew Brost wrote: > > > On Mon, Aug 09, 2021 at 06:36:44PM +0200, Daniel Vetter wrote: > > > &

Re: [PATCH 10/46] drm/i915/guc: Take engine PM when a context is pinned with GuC submission

2021-08-10 Thread Matthew Brost
On Tue, Aug 10, 2021 at 08:43:50AM +0200, Daniel Vetter wrote: > On Mon, Aug 09, 2021 at 06:11:37PM +0000, Matthew Brost wrote: > > On Mon, Aug 09, 2021 at 04:23:42PM +0200, Daniel Vetter wrote: > > > On Tue, Aug 03, 2021 at 03:29:07PM -0700, Matthew Brost wrote: > > >

[PATCH 4/9] drm/i915/guc: Don't drop ce->guc_active.lock when unwinding context

2021-08-10 Thread Matthew Brost
new GuC interface") Signed-off-by: Matthew Brost Cc: --- drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 4 1 file changed, 4 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c index bc51caba50d0..3cd2da6f5c

[PATCH 2/9] drm/i915/guc: outstanding G2H accounting

2021-08-10 Thread Matthew Brost
a G2H response thus the counter should be incremented. Fixes: f4eb1f3fe946 ("drm/i915/guc: Ensure G2H response has space in buffer") Signed-off-by: Matthew Brost Cc: --- drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) di

[PATCH 0/9] Clean up some CI failures for GuC submission

2021-08-10 Thread Matthew Brost
: Matthew Brost Matthew Brost (9): drm/i915/guc: Fix blocked context accounting drm/i915/guc: outstanding G2H accounting drm/i915/guc: Unwind context requests in reverse order drm/i915/guc: Don't drop ce->guc_active.lock when unwinding context drm/i915/guc: Flush the work queue

[PATCH 1/9] drm/i915/guc: Fix blocked context accounting

2021-08-10 Thread Matthew Brost
217d ("drm/i915/guc: Support request cancellation") Signed-off-by: Matthew Brost Cc: --- drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/

[PATCH 3/9] drm/i915/guc: Unwind context requests in reverse order

2021-08-10 Thread Matthew Brost
5/guc: Reset implementation for new GuC interface") Signed-off-by: Matthew Brost Cc: --- drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/

[PATCH 9/9] drm/i915/selftests: Add initial GuC selftest for scrubbing lost G2H

2021-08-10 Thread Matthew Brost
rrors dropping various G2H and then issues a full GT reset proving that the scrubbing of these G2H doesn't blow up. v2: (Daniel Vetter) - Use ifdef instead of macros for selftests Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/intel_context_types.h | 18 +++ .../gpu/drm/

[PATCH 8/9] drm/i915/selftests: Fix memory corruption in live_lrc_isolation

2021-08-10 Thread Matthew Brost
text redzone into the space that is trashed. To workaround this avoid poisoning the watchdog. v2: (Daniel Vetter) - Add VLK ref in code to workaround Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/selftest_lrc.c | 29 +- 1 file changed, 28 insertions(+), 1 dele

[PATCH 6/9] drm/i915/guc: Do not clear enable during reset in an enable is inflight

2021-08-10 Thread Matthew Brost
Do not clear enable during a context reset if a schedule enable is in flight. This can occur if the context reset during a request cancellation, clears the offending request, and then enables scheduling. Fixes: 62eaf0ae217d ("drm/i915/guc: Support request cancellation") Signed-off-b

[PATCH 5/9] drm/i915/guc: Flush the work queue for GuC generated G2H

2021-08-10 Thread Matthew Brost
Flush the work queue for GuC generated G2H messages durinr a GT reset. This is accomplished by spinning on the the list of outstanding G2H to go empty. Fixes: eb5e7da736f3 ("drm/i915/guc: Reset implementation for new GuC interface") Signed-off-by: Matthew Brost Cc: --- drivers/gpu/d

[PATCH 7/9] drm/i915/guc: Don't enable scheduling on a banned context

2021-08-10 Thread Matthew Brost
When unblocking a context, do not enable scheduling if the context is banned. Fixes: 62eaf0ae217d ("drm/i915/guc: Support request cancellation") Signed-off-by: Matthew Brost Cc: --- drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 1 + 1 file changed, 1 insertion(+) diff --git

Re: [PATCH 1/9] drm/i915/guc: Fix blocked context accounting

2021-08-11 Thread Matthew Brost
On Wed, Aug 11, 2021 at 12:30:52PM +0200, Daniel Vetter wrote: > On Wed, Aug 11, 2021 at 01:16:14AM +0000, Matthew Brost wrote: > > Prior to this patch the blocked context counter was cleared on > > init_sched_state (used during registering a context & resets) which is > &

Re: [PATCH 25/46] drm/i915/guc: Update debugfs for GuC multi-lrc

2021-08-11 Thread Matthew Brost
On Wed, Aug 11, 2021 at 12:04:04PM +0200, Daniel Vetter wrote: > On Tue, Aug 10, 2021 at 05:29:46PM +0000, Matthew Brost wrote: > > On Tue, Aug 10, 2021 at 11:27:31AM +0200, Daniel Vetter wrote: > > > On Tue, Aug 10, 2021 at 11:23:39AM +0200, Daniel Vetter wrote: > > > &

Re: [Intel-gfx] [PATCH 46/46] drm/i915/guc: Add delay before disabling scheduling on contexts

2021-08-11 Thread Matthew Brost
On Wed, Aug 11, 2021 at 11:55:48AM +0200, Daniel Vetter wrote: > On Mon, Aug 09, 2021 at 07:32:26PM +0000, Matthew Brost wrote: > > On Mon, Aug 09, 2021 at 07:17:27PM +0200, Daniel Vetter wrote: > > > On Tue, Aug 03, 2021 at 03:29:43PM -0700, Matthew Brost wrote: > > > &

Re: [Intel-gfx] [PATCH 11/46] drm/i915/guc: Don't call switch_to_kernel_context with GuC submission

2021-08-11 Thread Matthew Brost
On Tue, Aug 10, 2021 at 08:47:10AM +0200, Daniel Vetter wrote: > On Mon, Aug 09, 2021 at 06:20:51PM +0000, Matthew Brost wrote: > > On Mon, Aug 09, 2021 at 04:27:01PM +0200, Daniel Vetter wrote: > > > On Tue, Aug 03, 2021 at 03:29:08PM -0700, Matthew Brost wrot

Re: [PATCH 14/46] drm/i915: Expose logical engine instance to user

2021-08-11 Thread Matthew Brost
On Tue, Aug 10, 2021 at 08:53:16AM +0200, Daniel Vetter wrote: > On Mon, Aug 09, 2021 at 06:37:01PM +0000, Matthew Brost wrote: > > On Mon, Aug 09, 2021 at 04:30:06PM +0200, Daniel Vetter wrote: > > > On Tue, Aug 03, 2021 at 03:29:11PM -0700, Matthew Brost wrote: > > &

Re: [Intel-gfx] [PATCH 16/46] drm/i915/guc: Implement GuC parent-child context pin / unpin functions

2021-08-11 Thread Matthew Brost
On Tue, Aug 10, 2021 at 11:07:55AM +0200, Daniel Vetter wrote: > On Tue, Aug 10, 2021 at 10:53:37AM +0200, Daniel Vetter wrote: > > On Mon, Aug 09, 2021 at 06:58:23PM +, Matthew Brost wrote: > > > On Mon, Aug 09, 2021 at 05:17:34PM +0200, Daniel Vetter wrote: > > > &

Re: [Intel-gfx] [PATCH 16/46] drm/i915/guc: Implement GuC parent-child context pin / unpin functions

2021-08-11 Thread Matthew Brost
On Tue, Aug 10, 2021 at 10:53:37AM +0200, Daniel Vetter wrote: > On Mon, Aug 09, 2021 at 06:58:23PM +0000, Matthew Brost wrote: > > On Mon, Aug 09, 2021 at 05:17:34PM +0200, Daniel Vetter wrote: > > > On Tue, Aug 03, 2021 at 03:29:13PM -0700, Matthew Brost wrote: > > > &

Re: [PATCH 5/9] drm/i915/guc: Flush the work queue for GuC generated G2H

2021-08-12 Thread Matthew Brost
On Thu, Aug 12, 2021 at 04:11:28PM +0200, Daniel Vetter wrote: > On Wed, Aug 11, 2021 at 01:16:18AM +0000, Matthew Brost wrote: > > Flush the work queue for GuC generated G2H messages durinr a GT reset. > > This is accomplished by spinning on the the list of outstanding G2H

Re: [PATCH 5/9] drm/i915/guc: Flush the work queue for GuC generated G2H

2021-08-12 Thread Matthew Brost
On Thu, Aug 12, 2021 at 09:47:23PM +0200, Daniel Vetter wrote: > On Thu, Aug 12, 2021 at 03:23:30PM +0000, Matthew Brost wrote: > > On Thu, Aug 12, 2021 at 04:11:28PM +0200, Daniel Vetter wrote: > > > On Wed, Aug 11, 2021 at 01:16:18AM +0000, Matthew Brost wrote: > > >

Re: [PATCH 5/9] drm/i915/guc: Flush the work queue for GuC generated G2H

2021-08-13 Thread Matthew Brost
On Fri, Aug 13, 2021 at 05:11:59PM +0200, Daniel Vetter wrote: > On Thu, Aug 12, 2021 at 10:38:18PM +0000, Matthew Brost wrote: > > On Thu, Aug 12, 2021 at 09:47:23PM +0200, Daniel Vetter wrote: > > > On Thu, Aug 12, 2021 at 03:23:30PM +0000, Matthew Brost wrote: > > > &

[PATCH 01/22] drm/i915/guc: Fix blocked context accounting

2021-08-16 Thread Matthew Brost
217d ("drm/i915/guc: Support request cancellation") Signed-off-by: Matthew Brost Reviewed-by: Daniel Vetter Cc: --- drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/d

[PATCH 00/22] Clean up GuC CI failures, simplify locking, and kernel DOC

2021-08-16 Thread Matthew Brost
, add some kernel DOC explaining how the GuC submission backend works. v2: Fix logic error in 'Workaround reset G2H is received after schedule done G2H', don't propagate errors to dependent fences in execlists submissiom, resolve checkpatch issues, resend to correct lists Signed-o

[PATCH 02/22] drm/i915/guc: Fix outstanding G2H accounting

2021-08-16 Thread Matthew Brost
a G2H response thus the counter should be incremented. Fixes: f4eb1f3fe946 ("drm/i915/guc: Ensure G2H response has space in buffer") Signed-off-by: Matthew Brost Cc: --- drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) di

[PATCH 03/22] drm/i915/guc: Unwind context requests in reverse order

2021-08-16 Thread Matthew Brost
5/guc: Reset implementation for new GuC interface") Signed-off-by: Matthew Brost Cc: --- drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/

[PATCH 11/22] drm/i915/guc: Take context ref when cancelling request

2021-08-16 Thread Matthew Brost
A context can get destroyed after cancelling a request so take a reference to context when cancelling a request. Fixes: 62eaf0ae217d ("drm/i915/guc: Support request cancellation") Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 5 - 1 file

[PATCH 06/22] drm/i915/execlists: Do not propagate errors to dependent fences

2021-08-16 Thread Matthew Brost
Progagating errors to dependent fences is wrong, don't do it. Selftest in following patch exposes this bug. Fixes: 8e9f84cf5cac ("drm/i915/gt: Propagate change in error status to children on unhold") Signed-off-by: Matthew Brost Cc: --- drivers/gpu/drm/i915/gt/intel_execlists_s

[PATCH 09/22] drm/i915/selftests: Fix memory corruption in live_lrc_isolation

2021-08-16 Thread Matthew Brost
text redzone into the space that is trashed. To workaround this avoid poisoning the watchdog. v2: (Daniel Vetter) - Add VLK ref in code to workaround Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/selftest_lrc.c | 29 +- 1 file changed, 28 insertions(+), 1 dele

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