[PATCH v9 03/24] drm/dsc: Define VESA Display Stream Compression Capabilities

2018-11-13 Thread Manasi Navare
1.2 parameters (Manasi) * Use DSC_NUM_BUF_RANGES (Manasi) * Call it drm_dsc_config (Manasi) Cc: dri-devel@lists.freedesktop.org Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Harry Wentland Signed-off-by: Manasi Navare Signed-off-by: Gaurav K Singh Co-developed-by: Gaurav K Singh

[PATCH v9 07/24] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state

2018-11-13 Thread Manasi Navare
: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_drv.h | 9 + 2 files changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 5d686b585a95..8fbf45cd3eb8 100644 --- a

[PATCH v9 11/24] drm/i915/dsc: Compute Rate Control parameters for DSC

2018-11-13 Thread Manasi Navare
eview comments from Ville: * Remove unnecessary comments * Remove unnecessary paranthesis * Add comments for few RC params calculations v2 (From Manasi): * Rebase Gaurav's patch from intel-gfx to gfx-internal * Use struct drm_dsc_cfg instead of struct intel_dp as a parameter Cc: Manasi Navare

[PATCH v9 13/24] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI

2018-11-13 Thread Manasi Navare
error (Ville) * Rename as VDSC_PIPE_A (Imre) * Fix a whitespace (Anusha) * Fix Comments (Imre) Cc: Ville Syrjala Cc: Rodrigo Vivi Cc: Imre Deak Signed-off-by: Manasi Navare Reviewed-by: Ville Syrjala --- drivers/gpu/drm/i915/intel_display.h| 1 + drivers/gpu/drm/i915/intel_runtime_pm.c | 4

[PATCH v9 12/24] drm/i915/dp: Enable/Disable DSC in DP Sink

2018-11-13 Thread Manasi Navare
intel_dp as an argument (Manasi) * Use the compression_enable flag as part of crtc_state (Manasi) Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Gaurav K Singh Signed-off-by: Gaurav K Singh Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915

[PATCH v9 16/24] drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes

2018-11-13 Thread Manasi Navare
drm-tip Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/intel_vdsc.c | 21 + 1 file changed, 21 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_vdsc.c b/drivers/gpu/drm/i915

[PATCH v9 10/24] drm/i915/dsc: Define & Compute VESA DSC params

2018-11-13 Thread Manasi Navare
rectly from case statements * Using single asssignment for assigning rc_range_params * Using < Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Gaurav K Singh Signed-off-by: Gaurav K Singh Signed-off-by: Manasi Navare Co-developed-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gp

[PATCH v9 06/24] drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants

2018-11-13 Thread Manasi Navare
Cc: Ville Syrjälä Signed-off-by: Gaurav K Singh Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- include/drm/drm_dsc.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/drm/drm_dsc.h b/include/drm/drm_dsc.h index 52e57ceaff80..d03f1b83421a 100644 --- a/include/drm

[PATCH v9 22/24] drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION

2018-11-13 Thread Manasi Navare
) v4: Use fec crtc state, before setting FEC_READY bit. (Anusha) v5: Move to intel_ddi.c - Make the function static (Anusha) v6: Dont pass state as a separate argument (Ville) Cc: dri-devel@lists.freedesktop.org Cc: Gaurav K Singh Cc: Jani Nikula Cc: Ville Syrjala Cc: Manasi Navare Signed-off-by

[PATCH v9 18/24] drm/i915/dp: Disable DSC in source by disabling DSS CTL bits

2018-11-13 Thread Manasi Navare
params * Add a condition to disable only if dsc state compression is enabled * Use correct DSS CTL regs Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Signed-off-by: Gaurav K Singh Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/i915_drv.h | 1

[PATCH v9 15/24] drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs

2018-11-13 Thread Manasi Navare
Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_hdmi.c | 21 +++-- 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915

[PATCH v9 21/24] i915/dp/fec: Add fec_enable to the crtc state.

2018-11-13 Thread Manasi Navare
intel_dp_compute_config(). v9 (From Manasi): * Combine the !edp and !fec_support check * Derive dev_priv from intel_dp directly Suggested-by: Ville Syrjala Cc: dri-devel@lists.freedesktop.org Cc: Ville Syrjala Cc: Jani Nikula Cc: Manasi Navare Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/i915

[PATCH v9 24/24] drm/i915/fec: Disable FEC state.

2018-11-13 Thread Manasi Navare
unnecessary checks (Ville) v6: Resolve warnings. Add crtc_state as an argument to intel_disable_ddi_buf(). (Manasi) Cc: dri-devel@lists.freedesktop.org Cc: Gaurav K Singh Cc: Jani Nikula Cc: Ville Syrjala Cc: Manasi Navare Signed-off-by: Anusha Srivatsa Reviewed-by: Manasi Navare --- drivers

[PATCH v9 23/24] i915/dp/fec: Configure the Forward Error Correction bits.

2018-11-13 Thread Manasi Navare
. v5: - Move the code to the proper spot, according to spec.(Ville) - Use fec state as a check too. v6: Pass intel_encoder, instead of intel_dp. (Ville) v7: Remove unwanted comments (Manasi) Cc: dri-devel@lists.freedesktop.org Cc: Gaurav K Singh Cc: Jani Nikula Cc: Ville Syrjala Cc: Manasi

[PATCH v9 19/24] drm/i915/dsc: Enable and disable appropriate power wells for VDSC

2018-11-13 Thread Manasi Navare
: Imre Deak Cc: Rodrigo Vivi Signed-off-by: Manasi Navare Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_ddi.c | 6 ++ drivers/gpu/drm/i915/intel_drv.h | 2 ++ drivers/gpu/drm/i915/intel_vdsc.c | 25 + 3 files changed, 33 insertions(+) diff --git a

[PATCH v9 20/24] drm/i915/dsc: Add Per connector debugfs node for DSC support/enable

2018-11-13 Thread Manasi Navare
on drm-tip (Manasi) Cc: Rodrigo Vivi Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Lyude Paul Signed-off-by: Manasi Navare Reviewed-by: Lyude Paul --- drivers/gpu/drm/i915/i915_debugfs.c | 77 + drivers/gpu/drm/i915/intel_dp.c | 3 +- drivers/gpu/drm/i915/intel

[PATCH v9 14/24] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling

2018-11-13 Thread Manasi Navare
Configure Pic_width/2 for each VDSC engine when two VDSC engines per pipe are used (Manasi) * Add DSC slice_row_per_frame in PPS16 (Manasi) v2: * Enable PG2 power well for VDSC on eDP Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Anusha

Re: [PATCH v9 20/24] drm/i915/dsc: Add Per connector debugfs node for DSC support/enable

2018-11-15 Thread Manasi Navare
On Tue, Nov 13, 2018 at 05:52:28PM -0800, Manasi Navare wrote: > DSC can be supported per DP connector. This patch adds a per connector > debugfs node to expose DSC support capability by the kernel. > The same node can be used from userspace to force DSC enable. > > force_dsc_en

Re: [PATCH v9 01/24] drm/dsc: Modify DRM helper to return complete DSC color depth capabilities

2018-11-19 Thread Manasi Navare
On Mon, Nov 19, 2018 at 09:43:38PM +0200, Ville Syrjälä wrote: > On Tue, Nov 13, 2018 at 05:52:09PM -0800, Manasi Navare wrote: > > DSC DPCD color depth register advertises its color depth capabilities > > by setting each of the bits that corresponding to a specific color > &

Re: [PATCH v9 08/24] drm/i915/dp: Compute DSC pipe config in atomic check

2018-11-19 Thread Manasi Navare
Thanks for the comments, please some my answers below: On Mon, Nov 19, 2018 at 10:11:04PM +0200, Ville Syrjälä wrote: > On Tue, Nov 13, 2018 at 05:52:16PM -0800, Manasi Navare wrote: > > DSC params like the enable, compressed bpp, slice count and > > dsc_split are added to the i

Re: [PATCH v9 01/24] drm/dsc: Modify DRM helper to return complete DSC color depth capabilities

2018-11-19 Thread Manasi Navare
On Mon, Nov 19, 2018 at 10:33:37PM +0200, Ville Syrjälä wrote: > On Mon, Nov 19, 2018 at 12:10:47PM -0800, Manasi Navare wrote: > > On Mon, Nov 19, 2018 at 09:43:38PM +0200, Ville Syrjälä wrote: > > > On Tue, Nov 13, 2018 at 05:52:09PM -0800, Manasi Navare wrote: > >

Re: [PATCH v9 20/24] drm/i915/dsc: Add Per connector debugfs node for DSC support/enable

2018-11-19 Thread Manasi Navare
On Mon, Nov 19, 2018 at 10:27:44PM +0200, Ville Syrjälä wrote: > On Thu, Nov 15, 2018 at 05:39:42PM -0800, Manasi Navare wrote: > > On Tue, Nov 13, 2018 at 05:52:28PM -0800, Manasi Navare wrote: > > > DSC can be supported per DP connector. This patch adds a per connector >

Re: [PATCH v9 22/24] drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION

2018-11-19 Thread Manasi Navare
On Mon, Nov 19, 2018 at 10:19:42PM +0200, Ville Syrjälä wrote: > On Tue, Nov 13, 2018 at 05:52:30PM -0800, Manasi Navare wrote: > > From: Anusha Srivatsa > > > > If the panel supports FEC, the driver has to > > set the FEC_READY bit in the dpcd register: > > FEC

Re: [PATCH v9 22/24] drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION

2018-11-20 Thread Manasi Navare
On Mon, Nov 19, 2018 at 10:19:42PM +0200, Ville Syrjälä wrote: > On Tue, Nov 13, 2018 at 05:52:30PM -0800, Manasi Navare wrote: > > From: Anusha Srivatsa > > > > If the panel supports FEC, the driver has to > > set the FEC_READY bit in the dpcd register: > > FEC

[PATCH v10 03/23] drm/dsc: Define VESA Display Stream Compression Capabilities

2018-11-20 Thread Manasi Navare
1.2 parameters (Manasi) * Use DSC_NUM_BUF_RANGES (Manasi) * Call it drm_dsc_config (Manasi) Cc: dri-devel@lists.freedesktop.org Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Harry Wentland Signed-off-by: Manasi Navare Signed-off-by: Gaurav K Singh Co-developed-by: Gaurav K Singh

[PATCH v10 12/23] drm/i915/dp: Enable/Disable DSC in DP Sink

2018-11-20 Thread Manasi Navare
intel_dp as an argument (Manasi) * Use the compression_enable flag as part of crtc_state (Manasi) Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Gaurav K Singh Signed-off-by: Gaurav K Singh Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915

[PATCH v10 01/23] drm/dsc: Modify DRM helper to return complete DSC color depth capabilities

2018-11-20 Thread Manasi Navare
-off-by: Manasi Navare Cc: Ville Syrjala --- drivers/gpu/drm/drm_dp_helper.c | 14 -- include/drm/drm_dp_helper.h | 3 ++- 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index 6d483487f2b4

[PATCH v10 04/23] drm/dsc: Define Rate Control values that do not change over configurations

2018-11-20 Thread Manasi Navare
Cc: Manasi Navare Cc: Jani Nikula Cc: Ville Syrjala Cc: Gaurav K Singh Cc: Harry Wentland Signed-off-by: Anusha Srivatsa Reviewed-by: Manasi Navare --- include/drm/drm_dsc.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/include/drm/drm_dsc.h b/include/drm/drm_dsc.h index 32

[PATCH v10 06/23] drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants

2018-11-20 Thread Manasi Navare
Cc: Ville Syrjälä Signed-off-by: Gaurav K Singh Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- include/drm/drm_dsc.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/drm/drm_dsc.h b/include/drm/drm_dsc.h index 52e57ceaff80..d03f1b83421a 100644 --- a/include/drm

[PATCH v10 00/23] Respin of remaining DSC + FEC patches

2018-11-20 Thread Manasi Navare
bits. drm/i915/fec: Disable FEC state. Gaurav K Singh (3): drm/i915/dsc: Define & Compute VESA DSC params drm/i915/dsc: Compute Rate Control parameters for DSC drm/i915/dp: Enable/Disable DSC in DP Sink Manasi Navare (15): drm/dsc: Modify DRM helper to return complete DSC color d

[PATCH v10 05/23] drm/dsc: Add helpers for DSC picture parameter set infoframes

2018-11-20 Thread Manasi Navare
) Cc: dri-devel@lists.freedesktop.org Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Harry Wentland Signed-off-by: Manasi Navare Acked-by: Harry Wentland --- Documentation/gpu/drm-kms-helpers.rst | 12 ++ drivers/gpu/drm/Makefile | 2 +- drivers/gpu/drm/drm_dsc.c

[PATCH v10 11/23] drm/i915/dsc: Compute Rate Control parameters for DSC

2018-11-20 Thread Manasi Navare
eview comments from Ville: * Remove unnecessary comments * Remove unnecessary paranthesis * Add comments for few RC params calculations v2 (From Manasi): * Rebase Gaurav's patch from intel-gfx to gfx-internal * Use struct drm_dsc_cfg instead of struct intel_dp as a parameter Cc: Manasi Navare

[PATCH v10 07/23] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state

2018-11-20 Thread Manasi Navare
: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_drv.h | 9 + 2 files changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 5d686b585a95..8fbf45cd3eb8 100644 --- a

[PATCH v10 15/23] drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs

2018-11-20 Thread Manasi Navare
Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_hdmi.c | 21 +++-- 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915

[PATCH v10 08/23] drm/i915/dp: Compute DSC pipe config in atomic check

2018-11-20 Thread Manasi Navare
ala Cc: Anusha Srivatsa Cc: Gaurav K Singh Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa Acked-by: Jani Nikula --- drivers/gpu/drm/i915/intel_display.c | 2 +- drivers/gpu/drm/i915/intel_display.h | 2 +- drivers/gpu/drm/i915/intel_dp.c | 191 ---

[PATCH v10 02/23] drm/dsc: Define Display Stream Compression PPS infoframe

2018-11-20 Thread Manasi Navare
Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Harry Wentland Signed-off-by: Manasi Navare Reviewed-by: Harry Wentland --- include/drm/drm_dsc.h | 342 ++ 1 file changed, 342 insertions(+) create mode 100644 include/drm/drm_dsc.h diff --git a/include/drm

[PATCH v10 17/23] drm/i915/dp: Configure Display stream splitter registers during DSC enable

2018-11-20 Thread Manasi Navare
cpu_transcoder instead of encoder->type (Ville) v2: * Rebase (Manasi) Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/intel_vdsc.c | 21 + 1 file changed, 21 insertions(+) diff --gi

[PATCH v10 13/23] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI

2018-11-20 Thread Manasi Navare
error (Ville) * Rename as VDSC_PIPE_A (Imre) * Fix a whitespace (Anusha) * Fix Comments (Imre) Cc: Ville Syrjala Cc: Rodrigo Vivi Cc: Imre Deak Signed-off-by: Manasi Navare Reviewed-by: Ville Syrjala --- drivers/gpu/drm/i915/intel_display.h| 1 + drivers/gpu/drm/i915/intel_runtime_pm.c | 4

[PATCH v10 19/23] drm/i915/dsc: Enable and disable appropriate power wells for VDSC

2018-11-20 Thread Manasi Navare
: Imre Deak Cc: Rodrigo Vivi Signed-off-by: Manasi Navare Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_ddi.c | 6 ++ drivers/gpu/drm/i915/intel_drv.h | 2 ++ drivers/gpu/drm/i915/intel_vdsc.c | 25 + 3 files changed, 33 insertions(+) diff --git a

[PATCH v10 09/23] drm/i915/dp: Do not enable PSR2 if DSC is enabled

2018-11-20 Thread Manasi Navare
for DSC and PSR2 enabled together (DK) Cc: Rodrigo Vivi Cc: Jani Nikula Cc: Ville Syrjälä Signed-off-by: Manasi Navare Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_psr.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers

[PATCH v10 18/23] drm/i915/dp: Disable DSC in source by disabling DSS CTL bits

2018-11-20 Thread Manasi Navare
params * Add a condition to disable only if dsc state compression is enabled * Use correct DSS CTL regs Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Signed-off-by: Gaurav K Singh Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/i915_drv.h | 1

[PATCH v10 16/23] drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes

2018-11-20 Thread Manasi Navare
drm-tip Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/intel_vdsc.c | 21 + 1 file changed, 21 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_vdsc.c b/drivers/gpu/drm/i915

[PATCH v10 20/23] i915/dp/fec: Add fec_enable to the crtc state.

2018-11-20 Thread Manasi Navare
intel_dp_compute_config(). v9 (From Manasi): * Combine the !edp and !fec_support check * Derive dev_priv from intel_dp directly v10 (From Manasi): * Rebase Suggested-by: Ville Syrjala Cc: dri-devel@lists.freedesktop.org Cc: Ville Syrjala Cc: Jani Nikula Cc: Manasi Navare Signed-off-by: Anusha Srivatsa

[PATCH v10 22/23] i915/dp/fec: Configure the Forward Error Correction bits.

2018-11-20 Thread Manasi Navare
. v5: - Move the code to the proper spot, according to spec.(Ville) - Use fec state as a check too. v6: Pass intel_encoder, instead of intel_dp. (Ville) v7: Remove unwanted comments (Manasi) Cc: dri-devel@lists.freedesktop.org Cc: Gaurav K Singh Cc: Jani Nikula Cc: Ville Syrjala Cc: Manasi

[PATCH v10 14/23] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling

2018-11-20 Thread Manasi Navare
la Cc: Ville Syrjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/i915_drv.h | 2 + drivers/gpu/drm/i915/intel_ddi.c | 2 + drivers/gpu/drm/i915/intel_vdsc.c | 410 ++ 3 files changed, 414 insertions(+)

[PATCH v10 21/23] drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION

2018-11-20 Thread Manasi Navare
Cc: Ville Syrjala Cc: Manasi Navare Signed-off-by: Anusha Srivatsa Reviewed-by: Manasi Navare --- drivers/gpu/drm/i915/intel_ddi.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index aeb454c3573c

[PATCH v10 23/23] drm/i915/fec: Disable FEC state.

2018-11-20 Thread Manasi Navare
unnecessary checks (Ville) v6: Resolve warnings. Add crtc_state as an argument to intel_disable_ddi_buf(). (Manasi) Cc: dri-devel@lists.freedesktop.org Cc: Gaurav K Singh Cc: Jani Nikula Cc: Ville Syrjala Cc: Manasi Navare Signed-off-by: Anusha Srivatsa Reviewed-by: Manasi Navare --- drivers

[PATCH v10 10/23] drm/i915/dsc: Define & Compute VESA DSC params

2018-11-20 Thread Manasi Navare
rectly from case statements * Using single asssignment for assigning rc_range_params * Using < Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Gaurav K Singh Signed-off-by: Gaurav K Singh Signed-off-by: Manasi Navare Co-developed-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gp

Re: [PATCH v10 08/23] drm/i915/dp: Compute DSC pipe config in atomic check

2018-11-27 Thread Manasi Navare
On Tue, Nov 27, 2018 at 03:57:23PM +0200, Ville Syrjälä wrote: > On Tue, Nov 20, 2018 at 10:37:21AM -0800, Manasi Navare wrote: > > DSC params like the enable, compressed bpp, slice count and > > dsc_split are added to the intel_crtc_state. These parameters > > are set based

Re: [PATCH v10 20/23] i915/dp/fec: Add fec_enable to the crtc state.

2018-11-27 Thread Manasi Navare
On Tue, Nov 20, 2018 at 10:37:33AM -0800, Manasi Navare wrote: > From: Anusha Srivatsa > > For DP 1.4 and above, Display Stream compression can be > enabled only if Forward Error Correctin can be performed. > > Add a crtc state for FEC. Currently, the state > is determine

Re: [PATCH v10 22/23] i915/dp/fec: Configure the Forward Error Correction bits.

2018-11-27 Thread Manasi Navare
On Tue, Nov 20, 2018 at 10:37:35AM -0800, Manasi Navare wrote: > From: Anusha Srivatsa > > If FEC is supported, the corresponding > DP_TP_CTL register bits have to be configured. > > The driver has to program the FEC_ENABLE in DP_TP_CTL[30] register > and wait till FEC_S

[CI v11 04/23] drm/dsc: Define Rate Control values that do not change over configurations

2018-11-27 Thread Manasi Navare
Cc: Manasi Navare Cc: Jani Nikula Cc: Ville Syrjala Cc: Gaurav K Singh Cc: Harry Wentland Signed-off-by: Anusha Srivatsa Reviewed-by: Manasi Navare --- include/drm/drm_dsc.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/include/drm/drm_dsc.h b/include/drm/drm_dsc.h index 32

[CI v11 06/23] drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants

2018-11-27 Thread Manasi Navare
Cc: Ville Syrjälä Signed-off-by: Gaurav K Singh Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- include/drm/drm_dsc.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/drm/drm_dsc.h b/include/drm/drm_dsc.h index 52e57ceaff80..d03f1b83421a 100644 --- a/include/drm

[CI v11 15/23] drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs

2018-11-27 Thread Manasi Navare
Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_hdmi.c | 21 +++-- 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915

[CI v11 02/23] drm/dsc: Define Display Stream Compression PPS infoframe

2018-11-27 Thread Manasi Navare
Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Harry Wentland Signed-off-by: Manasi Navare Reviewed-by: Harry Wentland --- include/drm/drm_dsc.h | 342 ++ 1 file changed, 342 insertions(+) create mode 100644 include/drm/drm_dsc.h diff --git a/include/drm

[CI v11 11/23] drm/i915/dsc: Compute Rate Control parameters for DSC

2018-11-27 Thread Manasi Navare
eview comments from Ville: * Remove unnecessary comments * Remove unnecessary paranthesis * Add comments for few RC params calculations v2 (From Manasi): * Rebase Gaurav's patch from intel-gfx to gfx-internal * Use struct drm_dsc_cfg instead of struct intel_dp as a parameter Cc: Manasi Navare

[CI v11 09/23] drm/i915/dp: Do not enable PSR2 if DSC is enabled

2018-11-27 Thread Manasi Navare
for DSC and PSR2 enabled together (DK) Cc: Rodrigo Vivi Cc: Jani Nikula Cc: Ville Syrjälä Signed-off-by: Manasi Navare Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_psr.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers

[CI v11 18/23] drm/i915/dp: Disable DSC in source by disabling DSS CTL bits

2018-11-27 Thread Manasi Navare
params * Add a condition to disable only if dsc state compression is enabled * Use correct DSS CTL regs Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Signed-off-by: Gaurav K Singh Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/i915_drv.h | 1

[CI v11 05/23] drm/dsc: Add helpers for DSC picture parameter set infoframes

2018-11-27 Thread Manasi Navare
) Cc: dri-devel@lists.freedesktop.org Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Harry Wentland Signed-off-by: Manasi Navare Acked-by: Harry Wentland --- Documentation/gpu/drm-kms-helpers.rst | 12 ++ drivers/gpu/drm/Makefile | 2 +- drivers/gpu/drm/drm_dsc.c

[CI v11 19/23] drm/i915/dsc: Enable and disable appropriate power wells for VDSC

2018-11-27 Thread Manasi Navare
: Imre Deak Cc: Rodrigo Vivi Signed-off-by: Manasi Navare Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_ddi.c | 6 ++ drivers/gpu/drm/i915/intel_drv.h | 2 ++ drivers/gpu/drm/i915/intel_vdsc.c | 25 + 3 files changed, 33 insertions(+) diff --git a

[CI v11 21/23] drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION

2018-11-27 Thread Manasi Navare
Cc: Ville Syrjala Cc: Manasi Navare Signed-off-by: Anusha Srivatsa Reviewed-by: Manasi Navare --- drivers/gpu/drm/i915/intel_ddi.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 6533624226a7

[CI v11 13/23] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI

2018-11-27 Thread Manasi Navare
error (Ville) * Rename as VDSC_PIPE_A (Imre) * Fix a whitespace (Anusha) * Fix Comments (Imre) Cc: Ville Syrjala Cc: Rodrigo Vivi Cc: Imre Deak Signed-off-by: Manasi Navare Reviewed-by: Ville Syrjala --- drivers/gpu/drm/i915/intel_display.h| 1 + drivers/gpu/drm/i915/intel_runtime_pm.c | 4

[CI v11 20/23] i915/dp/fec: Add fec_enable to the crtc state.

2018-11-27 Thread Manasi Navare
intel_dp_compute_config(). v9 (From Manasi): * Combine the !edp and !fec_support check * Derive dev_priv from intel_dp directly v10 (From Manasi): * Rebase Suggested-by: Ville Syrjala Cc: dri-devel@lists.freedesktop.org Cc: Ville Syrjala Cc: Jani Nikula Cc: Manasi Navare Signed-off-by: Anusha Srivatsa

[CI v11 03/23] drm/dsc: Define VESA Display Stream Compression Capabilities

2018-11-27 Thread Manasi Navare
1.2 parameters (Manasi) * Use DSC_NUM_BUF_RANGES (Manasi) * Call it drm_dsc_config (Manasi) Cc: dri-devel@lists.freedesktop.org Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Harry Wentland Signed-off-by: Manasi Navare Signed-off-by: Gaurav K Singh Co-developed-by: Gaurav K Singh

[CI v11 08/23] drm/i915/dp: Compute DSC pipe config in atomic check

2018-11-27 Thread Manasi Navare
ala Cc: Anusha Srivatsa Cc: Gaurav K Singh Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa Reviewed-by: Ville Syrjala Acked-by: Jani Nikula --- drivers/gpu/drm/i915/intel_display.c | 2 +- drivers/gpu/drm/i915/intel_display.h | 2 +- drivers/gpu/drm/i915/intel_dp.c |

[CI v11 23/23] drm/i915/fec: Disable FEC state.

2018-11-27 Thread Manasi Navare
unnecessary checks (Ville) v6: Resolve warnings. Add crtc_state as an argument to intel_disable_ddi_buf(). (Manasi) Cc: dri-devel@lists.freedesktop.org Cc: Gaurav K Singh Cc: Jani Nikula Cc: Ville Syrjala Cc: Manasi Navare Signed-off-by: Anusha Srivatsa Reviewed-by: Manasi Navare --- drivers

[CI v11 17/23] drm/i915/dp: Configure Display stream splitter registers during DSC enable

2018-11-27 Thread Manasi Navare
cpu_transcoder instead of encoder->type (Ville) v2: * Rebase (Manasi) Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/intel_vdsc.c | 21 + 1 file changed, 21 insertions(+) diff --gi

[CI v11 14/23] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling

2018-11-27 Thread Manasi Navare
la Cc: Ville Syrjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/i915_drv.h | 2 + drivers/gpu/drm/i915/intel_ddi.c | 2 + drivers/gpu/drm/i915/intel_vdsc.c | 410 ++ 3 files changed, 414 insertions(+)

[CI v11 01/23] drm/dsc: Modify DRM helper to return complete DSC color depth capabilities

2018-11-27 Thread Manasi Navare
-off-by: Manasi Navare Cc: Ville Syrjala Reviewed-by: Ville Syrjala Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/drm_dp_helper.c | 14 -- include/drm/drm_dp_helper.h | 3 ++- 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_helper.c b

[CI v11 07/23] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state

2018-11-27 Thread Manasi Navare
: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_drv.h | 9 + 2 files changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index f763b30f98d9..183aae996305 100644 --- a

[CI v11 10/23] drm/i915/dsc: Define & Compute VESA DSC params

2018-11-27 Thread Manasi Navare
rectly from case statements * Using single asssignment for assigning rc_range_params * Using < Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Gaurav K Singh Signed-off-by: Gaurav K Singh Signed-off-by: Manasi Navare Co-developed-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gp

[CI v11 12/23] drm/i915/dp: Enable/Disable DSC in DP Sink

2018-11-27 Thread Manasi Navare
intel_dp as an argument (Manasi) * Use the compression_enable flag as part of crtc_state (Manasi) Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Gaurav K Singh Signed-off-by: Gaurav K Singh Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915

[CI v11 16/23] drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes

2018-11-27 Thread Manasi Navare
drm-tip Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/intel_vdsc.c | 21 + 1 file changed, 21 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_vdsc.c b/drivers/gpu/drm/i915

[CI v11 22/23] i915/dp/fec: Configure the Forward Error Correction bits.

2018-11-27 Thread Manasi Navare
Navare Signed-off-by: Anusha Srivatsa Reviewed-by: Manasi Navare --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_ddi.c | 23 +++ 2 files changed, 25 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index

Re: [PATCH 1/2] drm/dp: add extended receiver capability field present bit

2018-08-14 Thread Manasi Navare
0x00e /* XXX 1.2? */ > +# define DP_TRAINING_AUX_RD_MASK0x7F/* DP 1.3 */ > +# define DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT (1 << 7)/* DP 1.3 */ With the fix mentioned by Rodrigo about having a space as below: # define DP_EXTENDED_RECEIVER_CAP_FIE

Re: [PATCH 1/2] drm/dp: add extended receiver capability field present bit

2018-08-14 Thread Manasi Navare
Pushed to drm-misc-next with the whitespace fix. Thanks for the patch. Regards Manasi On Mon, Jul 23, 2018 at 02:27:34PM -0700, matthew.s.atw...@intel.com wrote: > From: Matt Atwood > > This bit was added to DP Training Aux RD interval with DP 1.3. Via > descriptiion of the spec this field indi

Re: [PATCH v2 07/23] drm/dsc: Define Display Stream Compression PPS infoframe

2018-08-23 Thread Manasi Navare
aurav K Singh > >Cc: dri-devel@lists.freedesktop.org > >Cc: Jani Nikula > >Cc: Ville Syrjala > >Cc: Anusha Srivatsa > >Cc: Harry Wentland > >Signed-off-by: Manasi Navare > >--- > > include/drm/drm_dsc.h | 365 > >

Re: [PATCH v2 07/23] drm/dsc: Define Display Stream Compression PPS infoframe

2018-08-23 Thread Manasi Navare
Manasi On Thu, Aug 23, 2018 at 03:40:12PM -0400, Harry Wentland wrote: > On 2018-07-31 05:07 PM, Manasi Navare wrote: > > This patch defines a new header file for all the DSC 1.2 structures > > and creates a structure for PPS infoframe which will be used to send > > picture pa

Re: [PATCH] drm: Document mode_config.max_width/height as the max fb dimensions

2018-06-15 Thread Manasi Navare
sense and as we support higher resolutions, we need to update the fb_width and fb_height maximum values so those modes dont get filtered out. This looks good to me. Reviewed-by: Manasi Navare Manasi > Signed-off-by: Ville Syrjälä > --- > include/drm/drm_mode_config.h | 8 > 1 fil

Re: [PATCH v10 00/23] Respin of remaining DSC + FEC patches

2018-11-29 Thread Manasi Navare
pushed the latest version of this series (https://patchwork.freedesktop.org/series/53184/) and first 5 from https://patchwork.freedesktop.org/series/53113/ to dinq Thanks for the patches and reviews! Manasi On Tue, Nov 20, 2018 at 10:37:13AM -0800, Manasi Navare wrote: > This patch ser

Re: [PATCH v2 09/23] drm/dsc: Define Rate Control values that do not change over configurations

2018-09-10 Thread Manasi Navare
On Tue, Jul 31, 2018 at 02:07:05PM -0700, Manasi Navare wrote: > From: "Srivatsa, Anusha" > > DSC has some Rate Control values that remain constant > across all configurations. These are as per the DSC > standard. > > v3: > * Define them in drm_dsc.h as they

Re: [PATCH 1/9] drm: Add variable refresh rate properties to DRM connector

2018-09-11 Thread Manasi Navare
Thanks for the patch, I have meant to send these patches out sitting in my internal tree but never got to it. Find my comments below: On Tue, Sep 11, 2018 at 12:13:25PM -0400, Nicholas Kazlauskas wrote: > Modern monitor hardware is capable of supporting variable refresh rates > and adaptive sync

Re: [PATCH 1/9] drm: Add variable refresh rate properties to DRM connector

2018-09-11 Thread Manasi Navare
On Tue, Sep 11, 2018 at 07:22:43PM +0300, Ville Syrjälä wrote: > On Tue, Sep 11, 2018 at 12:13:25PM -0400, Nicholas Kazlauskas wrote: > > Modern monitor hardware is capable of supporting variable refresh rates > > and adaptive sync technologies. The properties for querying and > > controlling these

[PATCH v4 04/25] drm/dp: DRM DP helper/macros to get DP sink DSC parameters

2018-09-11 Thread Manasi Navare
rjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/drm_dp_helper.c | 90 + include/drm/drm_dp_helper.h | 30 +++ 2 files changed, 120 insertions(+) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/dr

[PATCH v4 02/25] drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT

2018-09-11 Thread Manasi Navare
) * Define DP_DSC_SLICE_WIDTH_MULTIPLIER = 320 v2: * Add SHIFT define and DECOMPRESSION_EN define missed in prev patch Cc: dri-devel@lists.freedesktop.org Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Gaurav K Singh Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- i

[PATCH v4 13/25] drm/i915/dp: Compute DSC pipe config in atomic check

2018-09-11 Thread Manasi Navare
Add if-else for eDP/DP (Gaurav) Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Gaurav K Singh Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/intel_display.c | 20 ++-- drivers/gpu/drm/i915/intel_display.h | 3 +- drivers/gpu/drm/i915/intel_dp.c |

[PATCH v4 09/25] drm/dsc: Define VESA Display Stream Compression Capabilities

2018-09-11 Thread Manasi Navare
(Manasi) * Define DSC 1.2 parameters (Manasi) * Use DSC_NUM_BUF_RANGES (Manasi) * Call it drm_dsc_config (Manasi) Cc: dri-devel@lists.freedesktop.org Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Harry Wentland Signed-off-by: Manasi Navare Signed-off-by: Gaurav K Singh Co-developed

[PATCH v4 01/25] drm/i915/dsc: Add slice_row_per_frame in DSC PPS programming

2018-09-11 Thread Manasi Navare
From: Anusha Srivatsa Add the newly added slice_row_per_frame parameter in the Picture Parameter Set registers. This defines the number of vertically stacked slices in a frame. Credits to Manasi for noticing bSpec change. Suggested-by: Manasi Navare Cc: Manasi Navare Signed-off-by: Anusha

[PATCH v4 11/25] drm/dsc: Add helpers for DSC picture parameter set infoframes

2018-09-11 Thread Manasi Navare
kernel-docs in Documentation/gpu/drm-kms-helpers.rst (Daniel Vetter) v2: * Add EXPORT_SYMBOL for the drm functions (Manasi) Cc: dri-devel@lists.freedesktop.org Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Harry Wentland Signed-off-by: Manasi Navare Acked-by: Harry Wentland

[PATCH v4 03/25] drm/i915/dp: Cache the DP/eDP DSC DPCD register set on Hotplug/eDP Init

2018-09-11 Thread Manasi Navare
nction (Jani N) Cc: Jani Nikula Cc: Ville Syrjala Cc: Daniel Vetter Cc: Anusha Srivatsa Cc: Gaurav K Singh Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa Reviewed-by: Gaurav K Singh --- drivers/gpu/drm/i915/intel_dp.c | 32 drivers/gpu/dr

[PATCH v4 12/25] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state

2018-09-11 Thread Manasi Navare
we need to add these params and config structure to the intel_crtc_state so that if valid this state information can directly be used while enabling DSC in atomic commit. Cc: Gaurav K Singh Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Anusha

[PATCH v4 10/25] drm/dsc: Define Rate Control values that do not change over configurations

2018-09-11 Thread Manasi Navare
Cc: Manasi Navare Cc: Jani Nikula Cc: Ville Syrjala Cc: Gaurav K Singh Cc: Harry Wentland Signed-off-by: Anusha Srivatsa Reviewed-by: Manasi Navare --- include/drm/drm_dsc.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/include/drm/drm_dsc.h b/include/drm/drm_dsc.h index e9

[PATCH v4 05/25] drm/i915/dp: Add helpers for Compressed BPP and Slice Count for DSC

2018-09-11 Thread Manasi Navare
Sink (Manasi) v2: * Change the small joiner RAM buffer constant as bspec changed (Manasi) * rename it as SMALL_JOINER since we are not enabling big joiner yet (Anusha) Cc: Gaurav K Singh Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Dhinakaran Pandiyan Signed-off-by: Manasi Navare

[PATCH v4 08/25] drm/dsc: Define Display Stream Compression PPS infoframe

2018-09-11 Thread Manasi Navare
. v3: * Add the SPDX shorthand (Chris Wilson) v2: * Do not use bitfields in the struct (Jani Nikula) Cc: Gaurav K Singh Cc: dri-devel@lists.freedesktop.org Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Harry Wentland Signed-off-by: Manasi Navare Reviewed-by: Harry Wentland

[PATCH v4 17/25] drm/i915/dsc: Compute Rate Control parameters for DSC

2018-09-11 Thread Manasi Navare
27;s patch from intel-gfx to gfx-internal * Use struct drm_dsc_cfg instead of struct intel_dp as a parameter Cc: Manasi Navare Cc: Jani Nikula Cc: Ville Syrjala Signed-off-by: Gaurav K Singh Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/intel_vdsc.c | 127

[PATCH v4 16/25] drm/i915/dsc: Define & Compute VESA DSC params

2018-09-11 Thread Manasi Navare
ams * Using < Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Gaurav K Singh Signed-off-by: Gaurav K Singh Signed-off-by: Manasi Navare Co-developed-by: Manasi Navare --- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/intel_dp.c | 7 + drivers/gpu/drm/i915/intel_drv.h | 4 + d

[PATCH v4 22/25] drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes

2018-09-11 Thread Manasi Navare
DSC PPS secondary data packet infoframes are filled with DSC picure parameter set metadata according to the DSC standard. These infoframes are sent to the sink device and used during DSC decoding. Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Reviewed-by

[PATCH v4 21/25] drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs

2018-09-11 Thread Manasi Navare
Infoframes are used to send secondary data packets. This patch adds support for DSC Picture parameter set secondary data packets in the existing write_infoframe helpers. Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa

[PATCH v4 23/25] drm/i915/icl: Add Display Stream Splitter control registers

2018-09-11 Thread Manasi Navare
ro (Manasi) v2: - Add define to conditionally check the buffer target depth (James Ausmus) Suggested-by: Madhav Chauhan Cc: Madhav Chauhan Cc: Manasi Navare Cc: Rodrigo Vivi Signed-off-by: Anusha Srivatsa Signed-off-by: Manasi Navare Reviewed-by: Madhav Chauhan --- drivers/gpu/drm/i915/i915_

[PATCH v4 18/25] drm/i915/dp: Enable/Disable DSC in DP Sink

2018-09-11 Thread Manasi Navare
flag as part of crtc_state (Manasi) Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa Cc: Gaurav K Singh Signed-off-by: Gaurav K Singh Signed-off-by: Manasi Navare Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/intel_ddi.c | 5 + drivers/gpu/drm/i915/intel_dp.c | 15

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