seemingly unrelated
backtraces in sysfs, ext4, etc.
Cc: stable at vger.kernel.org
Signed-off-by: Lyude
---
drivers/gpu/drm/i915/intel_drv.h | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index
onger necessary:
- "drm/i915/skl: Always wait for pipes to update after a flush"
- "drm/i915/skl: Fix extra whitespace in skl_flush_wm_values()"
Lyude (5):
drm/i915/skl: Add support for the SAGV, fix underrun hangs
drm/i915/skl: Update plane watermarks atomically during plan
s to patch this time
Changes since v1:
- Added comments about this probably being one of the requirements to
fixing Skylake's watermark issues
- Minor style nitpicks from Matt Roper
- Disable these functions on Broxton, since it doesn't have an SAGV
Reviewed-by: Matt Roper
Sig
6130227495 ("drm/i915/gen9: Re-allocate DDB only for changed pipes")
Signed-off-by: Matt Roper
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: Han
use when
writing new plane watermarks
Fixes: 2d41c0b59afc ("drm/i915/skl: SKL Watermark Computation")
Signed-off-by: Lyude
Cc: stable at vger.kernel.org
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: Hans de Goede
Cc: Matt Roper
---
drivers/gpu/drm/i915/intel_
If we're enabling a pipe, we'll need to modify the watermarks on all
other active pipes. Since those pipes won't be added to the state on
their own, we need to add them ourselves.
Signed-off-by: Lyude
Cc: stable at vger.kernel.org
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radha
) for stable branches) into it's own function, and
add an appropriate display function hook for it.
Based off of Matt Rope's suggestions
Signed-off-by: Lyude
[omitting CC for stable, since this patch will need to be changed for
such backports first]
Cc: Ville Syrjälä
Cc: Da
rm/i915/skl: Flush the WM configuration")
Fixes: 8211bd5bdf5e ("drm/i915/skl: Program the DDB allocation")
Signed-off-by: Lyude
[omitting CC for stable, since this patch will need to be changed for
such backports first]
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: Han
Latest version of https://patchwork.freedesktop.org/patch/102581/ .
Lyude (5):
drm/i915/skl: Add support for the SAGV, fix underrun hangs
drm/i915/skl: Update plane watermarks atomically during plane updates
drm/i915/skl: Ensure pipes with changed wms get added to the state
drm/i915: Move
since it doesn't have an SAGV
Reviewed-by: Matt Roper
Signed-off-by: Lyude
Cc: Daniel Vetter
Cc: Ville Syrjälä
Cc: stable at vger.kernel.org
---
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_reg.h | 5 ++
drivers/gpu/drm/i915/intel_display.c | 11
6130227495 ("drm/i915/gen9: Re-allocate DDB only for changed pipes")
Signed-off-by: Matt Roper
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: Han
truct to use when
writing new plane watermarks
Changes since v5:
- Remove cursor ddb entry write in skl_write_cursor_wm(), defer until
patch 6
- Write WM_LINETIME in intel_begin_crtc_commit()
Fixes: 2d41c0b59afc ("drm/i915/skl: SKL Watermark Computation")
Signed-off-by: Lyude
Cc: stabl
If we're enabling a pipe, we'll need to modify the watermarks on all
active planes. Since those planes won't be added to the state on
their own, we need to add them ourselves.
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Ville Syrjälä
Cc: Da
) for stable branches) into it's own function, and
add an appropriate display function hook for it.
Based off of Matt Rope's suggestions
Changes since v1:
- Drop pipe_config->base.active check in intel_update_crtcs() since we
check that before calling the function
Signed-off-by:
y_write() for cursor into skl_write_cursor_wm()
Fixes: 0e8fb7ba7ca5 ("drm/i915/skl: Flush the WM configuration")
Fixes: 8211bd5bdf5e ("drm/i915/skl: Program the DDB allocation")
Signed-off-by: Lyude
[omitting CC for stable, since this patch will need to be changed for
such
s to
fixing Skylake's watermark issues
- Minor style nitpicks from Matt Roper
- Disable these functions on Broxton, since it doesn't have an SAGV
Reviewed-by: Matt Roper
Signed-off-by: Lyude
Cc: Daniel Vetter
Cc: Ville Syrjälä
Cc: stable at vger.kernel.org
fixup! drm/i915/
/i915/skl: Update plane watermarks atomically during plane updates
- drm/i915/skl: Update DDB values atomically with wms/plane attrs
Lyude (5):
drm/i915/skl: Add support for the SAGV, fix underrun hangs
drm/i915/skl: Update plane watermarks atomically during plane updates
drm/i915/skl: Ensure
one of the requirements to
fixing Skylake's watermark issues
- Minor style nitpicks from Matt Roper
- Disable these functions on Broxton, since it doesn't have an SAGV
Reviewed-by: Matt Roper
Reviewed-by: Maarten Lankhorst
Signed-off-by: Lyude
Cc: Daniel Vetter
Cc: Ville SyrjÃ
6130227495 ("drm/i915/gen9: Re-allocate DDB only for changed pipes")
Signed-off-by: Matt Roper
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: Han
es where we call this function, and it was supposed
to have been removed earlier anyway)
- In i9xx_update_cursor(), use dev_priv->info.gen >= 9 instead of
IS_GEN9(dev_priv). We do this everywhere else and I'd imagine this
needs to be done for gen10 as well
Fixes: 2d41c0b59afc
) for stable branches) into it's own function, and
add an appropriate display function hook for it.
Based off of Matt Rope's suggestions
Changes since v1:
- Drop pipe_config->base.active check in intel_update_crtcs() since we
check that before calling the function
Signed-off-by:
If we're enabling a pipe, we'll need to modify the watermarks on all
active planes. Since those planes won't be added to the state on
their own, we need to add them ourselves.
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Ville Syrjälä
Cc: Da
5bdf5e ("drm/i915/skl: Program the DDB allocation")
Signed-off-by: Lyude
[omitting CC for stable, since this patch will need to be changed for
such backports first]
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: Hans de Goede
Cc: Matt Roper
---
dr
amdgpu/radeon. These were
definitely useful at one point, but since we now retry any failed aux
transaction unconditionally in DRM's dp helpers they don't serve much purpose
other then to make failing aux transactions take a lot more time then they need
to.
Lyude (7):
drm/dp_helper:
of
having to print "dp_aux_ch timed out" over 32 times we can just print
once.
Signed-off-by: Lyude
---
drivers/gpu/drm/drm_dp_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 8f11b8
Since it's normal for DRM to retry our aux transaction helpers multiple
times in a row, up to 32 times for each attempted transaction, we're
making a lot of noise that is no longer necessary now that DRM will just
print the return code we give it.
Signed-off-by: Lyude
---
drivers/gpu/
* 32 = 224, which means this loop causes us to retry grabbing
the dpcd 224 times. This is definitely far more then we actually need to
do.
Signed-off-by: Lyude
---
drivers/gpu/drm/radeon/atombios_dp.c | 21 ++---
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git a/drive
Since it's normal for DRM to retry our aux transaction helpers multiple
times in a row, up to 32 times for each attempted transaction, we're
making a lot of noise that is no longer necessary now that DRM will just
print the return code we give it.
Signed-off-by: Lyude
---
drivers/g
* 32 = 224, which means this loop causes us to retry grabbing
the dpcd 224 times. This is definitely far more then we actually need to
do.
Signed-off-by: Lyude
---
drivers/gpu/drm/amd/amdgpu/atombios_dp.c | 21 ++---
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git a/d
There's a couple of places where this would be useful for drivers (such
as reporting DP aux transaction timeouts).
Signed-off-by: Lyude
---
include/drm/drmP.h | 30 ++
1 file changed, 30 insertions(+)
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
Timeouts can be errors, but timeouts are also usually normal behavior
and happen a lot. Since the kernel already lets us know when we're
suppressing messages due to rate limiting, rate limit timeout errors so
we don't make too much noise in the kernel log.
Signed-off-by: Lyude
---
d
a7ca5 ("drm/i915/skl: Flush the WM configuration")
Fixes: 8211bd5bdf5e ("drm/i915/skl: Program the DDB allocation")
[omitting CC for stable, since this patch will need to be changed for
such backports first]
Testcase: kms_cursor_legacy
Signed-off-by: Lyude
Reviewed-by: Maarten La
a7ca5 ("drm/i915/skl: Flush the WM configuration")
Fixes: 8211bd5bdf5e ("drm/i915/skl: Program the DDB allocation")
[omitting CC for stable, since this patch will need to be changed for
such backports first]
Testcase: kms_cursor_legacy
Signed-off-by: Lyude
Reviewed-by: Maarten La
Changes since v1:
- Added comments about this probably being one of the requirements to
fixing Skylake's watermark issues
- Minor style nitpicks from Matt Roper
- Disable these functions on Broxton, since it doesn't have an SAGV
Reviewed-by: Matt Roper
Reviewed-by: Maarten Lan
Changes since v1:
- Added comments about this probably being one of the requirements to
fixing Skylake's watermark issues
- Minor style nitpicks from Matt Roper
- Disable these functions on Broxton, since it doesn't have an SAGV
Reviewed-by: Matt Roper
Reviewed-by: Maarten Lan
Rebased version of https://patchwork.freedesktop.org/series/10276/ . No changes
Lyude (5):
drm/i915/skl: Add support for the SAGV, fix underrun hangs
drm/i915/skl: Update plane watermarks atomically during plane updates
drm/i915/skl: Ensure pipes with changed wms get added to the state
6130227495 ("drm/i915/gen9: Re-allocate DDB only for changed pipes")
Signed-off-by: Matt Roper
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: Han
Changes since v1:
- Added comments about this probably being one of the requirements to
fixing Skylake's watermark issues
- Minor style nitpicks from Matt Roper
- Disable these functions on Broxton, since it doesn't have an SAGV
Reviewed-by: Matt Roper
Reviewed-by: Maarten Lan
es where we call this function, and it was supposed
to have been removed earlier anyway)
- In i9xx_update_cursor(), use dev_priv->info.gen >= 9 instead of
IS_GEN9(dev_priv). We do this everywhere else and I'd imagine this
needs to be done for gen10 as well
Fixes: 2d41c0b59afc
If we're enabling a pipe, we'll need to modify the watermarks on all
active planes. Since those planes won't be added to the state on
their own, we need to add them ourselves.
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Ville Syrjälä
Cc: Da
) for stable branches) into it's own function, and
add an appropriate display function hook for it.
Based off of Matt Rope's suggestions
Changes since v1:
- Drop pipe_config->base.active check in intel_update_crtcs() since we
check that before calling the function
Signed-off-by:
a7ca5 ("drm/i915/skl: Flush the WM configuration")
Fixes: 8211bd5bdf5e ("drm/i915/skl: Program the DDB allocation")
[omitting CC for stable, since this patch will need to be changed for
such backports first]
Testcase: kms_cursor_legacy
Signed-off-by: Lyude
Reviewed-by: Maarten La
Rebased version of https://patchwork.freedesktop.org/series/10276/ . No changes
Lyude (5):
drm/i915/skl: Add support for the SAGV, fix underrun hangs
drm/i915/skl: Update plane watermarks atomically during plane updates
drm/i915/skl: Ensure pipes with changed wms get added to the state
Changes since v1:
- Added comments about this probably being one of the requirements to
fixing Skylake's watermark issues
- Minor style nitpicks from Matt Roper
- Disable these functions on Broxton, since it doesn't have an SAGV
Reviewed-by: Matt Roper
Reviewed-by: Maarten Lan
6130227495 ("drm/i915/gen9: Re-allocate DDB only for changed pipes")
Signed-off-by: Matt Roper
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: Han
es where we call this function, and it was supposed
to have been removed earlier anyway)
- In i9xx_update_cursor(), use dev_priv->info.gen >= 9 instead of
IS_GEN9(dev_priv). We do this everywhere else and I'd imagine this
needs to be done for gen10 as well
Fixes: 2d41c0b59afc
If we're enabling a pipe, we'll need to modify the watermarks on all
active planes. Since those planes won't be added to the state on
their own, we need to add them ourselves.
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Ville Syrjälä
Cc: Da
) for stable branches) into it's own function, and
add an appropriate display function hook for it.
Based off of Matt Rope's suggestions
Changes since v1:
- Drop pipe_config->base.active check in intel_update_crtcs() since we
check that before calling the function
Signed-off-by:
a7ca5 ("drm/i915/skl: Flush the WM configuration")
Fixes: 8211bd5bdf5e ("drm/i915/skl: Program the DDB allocation")
[omitting CC for stable, since this patch will need to be changed for
such backports first]
Testcase: kms_cursor_legacy
Signed-off-by: Lyude
Reviewed-by: Maarten La
it's not
controllable on the system. As well, this means the RBs for:
drm/i915/skl: Add support for the SAGV, fix underrun hangs
Had to be cleared, seeing as the patch has changed considerably now.
Lyude (6):
drm/i915/gen6+: Return -EINVAL on invalid pcode commands
drm/i915/skl: Add su
te an invalid mailbox command was sent.
This also might come in handy in the future for debugging.
Signed-off-by: Lyude
Cc: Matt Roper
Cc: Maarten Lankhorst
Cc: Daniel Vetter
Cc: Ville Syrjälä
Cc: stable at vger.kernel.org
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel
Minor style nitpicks from Matt Roper
- Disable these functions on Broxton, since it doesn't have an SAGV
Signed-off-by: Lyude
Cc: Matt Roper
Cc: Maarten Lankhorst
Cc: Daniel Vetter
Cc: Ville Syrjälä
Cc: stable at vger.kernel.org
---
drivers/gpu/drm/i915/i915_drv.h | 7 +++
driv
6130227495 ("drm/i915/gen9: Re-allocate DDB only for changed pipes")
Signed-off-by: Matt Roper
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: Han
es where we call this function, and it was supposed
to have been removed earlier anyway)
- In i9xx_update_cursor(), use dev_priv->info.gen >= 9 instead of
IS_GEN9(dev_priv). We do this everywhere else and I'd imagine this
needs to be done for gen10 as well
Fixes: 2d41c0b59afc
If we're enabling a pipe, we'll need to modify the watermarks on all
active planes. Since those planes won't be added to the state on
their own, we need to add them ourselves.
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Ville Syrjälä
Cc: Da
) for stable branches) into it's own function, and
add an appropriate display function hook for it.
Based off of Matt Rope's suggestions
Changes since v1:
- Drop pipe_config->base.active check in intel_update_crtcs() since we
check that before calling the function
Signed-off-by:
a7ca5 ("drm/i915/skl: Flush the WM configuration")
Fixes: 8211bd5bdf5e ("drm/i915/skl: Program the DDB allocation")
[omitting CC for stable, since this patch will need to be changed for
such backports first]
Testcase: kms_cursor_legacy
Signed-off-by: Lyude
Reviewed-by: Maarten La
://patchwork.freedesktop.org/series/10276/
Lyude (6):
drm/i915/gen6+: Interpret mailbox error flags
drm/i915/skl: Add support for the SAGV, fix underrun hangs
drm/i915/skl: Update plane watermarks atomically during plane updates
drm/i915/skl: Ensure pipes with changed wms get added to the state
drm/i915
d-off-by: Lyude
Cc: Matt Roper
Cc: Maarten Lankhorst
Cc: Daniel Vetter
Cc: Ville Syrjälä
Cc: stable at vger.kernel.org
---
drivers/gpu/drm/i915/i915_reg.h | 9 ++
drivers/gpu/drm/i915/intel_pm.c | 71 -
2 files changed, 79 insertions(+), 1 del
v1:
- Added comments about this probably being one of the requirements to
fixing Skylake's watermark issues
- Minor style nitpicks from Matt Roper
- Disable these functions on Broxton, since it doesn't have an SAGV
Signed-off-by: Lyude
Cc: Matt Roper
Cc: Maarten Lankhorst
Cc: D
6130227495 ("drm/i915/gen9: Re-allocate DDB only for changed pipes")
Signed-off-by: Matt Roper
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: Han
- Fix rebase fail (unused variable obj)
- Make struct skl_wm_values *wm const
- Fix indenting
- Use INTEL_GEN() instead of dev_priv->info.gen
Fixes: 2d41c0b59afc ("drm/i915/skl: SKL Watermark Computation")
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.ker
If we're enabling a pipe, we'll need to modify the watermarks on all
active planes. Since those planes won't be added to the state on
their own, we need to add them ourselves.
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Ville Syrjälä
Cc: Da
) for stable branches) into it's own function, and
add an appropriate display function hook for it.
Based off of Matt Rope's suggestions
Changes since v1:
- Drop pipe_config->base.active check in intel_update_crtcs() since we
check that before calling the function
Signed-off-by:
to be changed for
such backports first]
Testcase: kms_cursor_legacy
Signed-off-by: Lyude
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: Hans de Goede
Cc: Matt Roper
---
drivers/gpu/drm/i915/intel_display.c | 93 +---
drivers/gpu/drm/i915/intel_drv.h |
Hope this didn't take too long! Here's the backported versions of the patches
you had trouble applying to stable. The patch for FBC won't be necessary as
that is already present in 4.7.y.
Cheers,
Lyude
Lyude (4):
drm/i915/vlv: Make intel_crt_reset() per-encoder
drm/
This lets call intel_crt_reset() in contexts where IRQs are disabled and
as such, can't hold the locks required to work with the connectors.
Cc: stable at vger.kernel.org
Cc: Ville Syrjälä
Acked-by: Daniel Vetter
Signed-off-by: Lyude
---
drivers/gpu/drm/i915/intel_crt.c | 10 +---
l Vetter
Signed-off-by: Lyude
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_crt.c| 2 +-
drivers/gpu/drm/i915/intel_drv.h| 2 +-
drivers/gpu/drm/i915/intel_runtime_pm.c | 7 +++
3 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/in
s irq storm getting sent from the ADPA
whenever a VGA connector gets detected in the middle of polling.
Somewhat based off of the "drm/i915: Disable CRT HPD around force
trigger" patch Ville Syrjälä sent a while back
Cc: stable at vger.kernel.org
Cc: Ville Syrjälä
Signed-off-by: Ly
ename poll_enable_work to poll_init_work
- Add some kerneldoc for intel_hpd_poll_init()
- Cross-reference intel_hpd_poll_init() in intel_hpd_init()
- Just copy the loop from intel_hpd_init() in intel_hpd_poll_init()
Changes since v5:
- Minor kerneldoc nitpicks
Cc: stable at vger.kernel.org
Cc:
c_commit()
Fixes: 2d41c0b59afc ("drm/i915/skl: SKL Watermark Computation")
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: Hans de Goede
---
Assuming the other patches apply cleanly stil
Using intel_state->active_crtcs allows us to more easily check whether
or not we've updated all of the CRTCs that needed ddb updates since we
can just do:
mask_of_crtcs_we_updated == intel_state->wm_results.dirty_pipes
Signed-off-by: Lyude
---
drivers/gpu/drm/i915/intel_pm.
add a couple of features for
making debugging watermarks a little easier.
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Matt Roper
Lyude (6):
drm/i915/skl: Move per-pipe ddb allocations into crtc states
drm/i915/skl: Remove linetime from skl_wm_values
drm/i915: Add enable_sagv option
drm/
First part of cleaning up all of the skl watermark code. This moves the
structures for storing the ddb allocations of each pipe into
intel_crtc_state, along with moving the structures for storing the
current ddb allocations active on hardware into intel_crtc.
Signed-off-by: Lyude
Cc: Maarten
Next part of cleaning up the watermark code for skl. This is easy, since
it seems that we never actually needed to keep track of the linetime in
the skl_wm_values struct anyway.
Signed-off-by: Lyude
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Matt Roper
---
drivers/gpu/drm/i915/i915_drv.h
Having skl_wm_level contain all of the watermarks for each plane is
annoying since it prevents us from having any sort of object to
represent a single watermark level, something we take advantage of in
the next commit to cut down on all of the copy paste code in here.
Signed-off-by: Lyude
Cc
d write the new watermarks on
the fly.
Signed-off-by: Lyude
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Matt Roper
---
drivers/gpu/drm/i915/i915_drv.h | 2 -
drivers/gpu/drm/i915/intel_display.c | 14 ++-
drivers/gpu/drm/i915/intel_drv.h | 6 +-
drivers/gpu/drm/i915/intel_
This option allows us to manually control the SAGV at module load time.
This can be useful in situations such as trying to debug watermark
changes, since enabled SAGV + incorrect watermarks = total GPU
annihilation.
Signed-off-by: Lyude
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Matt Roper
Finally, add some debugging output for ddb changes in the atomic debug
output. This makes it a lot easier to spot bugs from incorrect ddb
allocations.
Signed-off-by: Lyude
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Matt Roper
---
drivers/gpu/drm/i915/intel_pm.c | 57
add a couple of features for
making debugging watermarks a little easier.
Lyude (10):
drm/i915/skl: Move per-pipe ddb allocations into crtc states
drm/i915/skl: Remove linetime from skl_wm_values
drm/i915/gen9: Make skl_wm_level per-plane
drm/i915/gen9: Cleanup skl_pipe_wm_active_state
drm/i91
place alloc->start = alloc->end = 0;
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_drv.h | 1 -
drivers/gpu/drm/i915/intel_display.c | 16 ---
drivers/gpu/drm/i915/intel_drv.h | 8 +---
driv
nitpicks
- Fix accidental usage of i vs. PLANE_CURSOR
- Split out skl_pipe_wm_active_state simplification into separate patch
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_drv.h | 6 +-
drivers/gpu/drm/i915/intel_drv.h
Next part of cleaning up the watermark code for skl. This is easy, since
it seems that we never actually needed to keep track of the linetime in
the skl_wm_values struct anyway.
Signed-off-by: Lyude
Reviewed-by: Paulo Zanoni
Reviewed-by: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Paulo Zanoni
This function is a wreck, let's help it get it's life back together and
cleanup all of the copy pasta here.
(adding Maarten's reviewed-by since this is just a split-up version of one
of the previous patches)
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Cc: Ville SyrjÃ
Finally, add some debugging output for ddb changes in the atomic debug
output. This makes it a lot easier to spot bugs from incorrect ddb
allocations.
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 57
Helper we're going to be using for implementing verification of the wm
levels in skl_verify_wm_level().
Signed-off-by: Lyude
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_drv.h | 2 ++
drivers/gpu/drm/i915/intel_pm.c | 14 ++
2
d write the new watermarks on
the fly.
Changes since v1:
- Fixup skl_write_wm_level()
- Fixup skl_wm_level_from_reg_val()
- Don't forget to copy *active to intel_crtc->wm.active.skl
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Paulo Zanoni
---
drivers/
There's not much of a reason this should have the locations to read out
the hardware state hardcoded, so allow the caller to specify the
location and add this function to intel_drv.h. As well, we're going to
need this function to be reusable for the next patch.
Signed-off-by: Lyude
C
Thanks to Paulo Zanoni for indirectly pointing this out.
Looks like we never actually added any code for checking whether or not
we actually wrote watermark levels properly. Let's fix that.
Signed-off-by: Lyude
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Paulo Zanoni
---
drivers/gp
Signed-off-by: Lyude
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_display.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 2c682bc
add a couple of features for
making debugging watermarks a little easier.
Rebased for latest nightly, new r-bs added + some changes
Lyude (10):
drm/i915/skl: Move per-pipe ddb allocations into crtc states
drm/i915/skl: Remove linetime from skl_wm_values
drm/i915/gen9: Make skl_wm_level per-plane
place alloc->start = alloc->end = 0;
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Reviewed-by: Paulo Zanoni
Cc: Ville Syrjälä
Cc: Matt Roper
---
drivers/gpu/drm/i915/i915_drv.h | 1 -
drivers/gpu/drm/i915/intel_display.c | 16 ---
drivers/gpu/drm/i915/intel_drv
nitpicks
- Fix accidental usage of i vs. PLANE_CURSOR
- Split out skl_pipe_wm_active_state simplification into seperate patch
Signed-off-by: Lyude
Reviewed-by: Paulo Zanoni
Reviewed-by: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Matt Roper
---
drivers/gpu/drm/i915/i915_drv.h | 6 +-
drivers
d write the new watermarks on
the fly.
Changes since v1:
- Fixup skl_write_wm_level()
- Fixup skl_wm_level_from_reg_val()
- Don't forget to copy *active to intel_crtc->wm.active.skl
Changes since v2:
- Fix usage of wrong cstate
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Reviewed-by:
Finally, add some debugging output for ddb changes in the atomic debug
output. This makes it a lot easier to spot bugs from incorrect ddb
allocations.
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Reviewed-by: Paulo Zanoni
Cc: Ville Syrjälä
Cc: Matt Roper
---
drivers/gpu/drm/i915
Thanks to Paulo Zanoni for indirectly pointing this out.
Looks like we never actually added any code for checking whether or not
we actually wrote watermark levels properly. Let's fix that.
Changes since v1:
- Use %u instead of %d when printing WM state mismatches
Signed-off-by: Lyude
Rev
Helper we're going to be using for implementing verification of the wm
levels in skl_verify_wm_level().
Signed-off-by: Lyude
Reviewed-by: Paulo Zanoni
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Matt Roper
---
drivers/gpu/drm/i915/intel_drv.h | 2 ++
drivers/gpu/drm/i915/intel_pm.c
Next part of cleaning up the watermark code for skl. This is easy, since
it seems that we never actually needed to keep track of the linetime in
the skl_wm_values struct anyway.
Signed-off-by: Lyude
Reviewed-by: Paulo Zanoni
Reviewed-by: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Matt Roper
This function is a wreck, let's help it get its life back together and
cleanup all of the copy pasta here.
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Reviewed-by: Paulo Zanoni
Cc: Ville Syrjälä
Cc: Matt Roper
---
drivers/gpu/drm/i915/intel_pm.c
accidental behavior change in the code that Paulo pointed out
Signed-off-by: Lyude
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Matt Roper
---
drivers/gpu/drm/i915/intel_drv.h | 2 ++
drivers/gpu/drm/i915/intel_pm.c | 28 ++--
2 files changed, 20 insertions(+), 10
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