e_t to a ssize_t to ensure the result can be signed to
allow a less than zero result.
Addresses-Coverity: ("Unsigned compared against 0")
Fixes: 3d5928a168a9 ("drm/i915/xelpd: Pipe A DMC plugging")
Signed-off-by: Colin Ian King
Reviewed-by: Lucas De Marchi
thanks
Lucas D
gen8_clear_engine_error_register() is actually not used by
GRAPHICS_VER >= 8, since for those we are using another register that is
not engine-dependent. Fix the platform prefix, to make clear we are not
using any GEN6_RING_FAULT_REG_* one GRAPHICS_VER >= 8.
Signed-off-by: Lucas De
The engine hw_id is only used by RING_FAULT_REG(), which is not used
since GRAPHICS_VER == 8. We tend to keep adding new defines just to be
consistent, but let's try to remove them and let them defined to 0 when
not used.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i9
We kept adding new engines and for that increasing hw_id unnecessarily:
it's not used since GRAPHICS_VER == 8. Prepend "gen6" to the field and
try to pack it in the structs to give a hint this field is actually not
used in recent platforms.
Signed-off-by: Lucas De Marchi
---
n zero'ed, let's refactor
the code so we don't keep them around: they aren't used since
GRAPHICS_VER == 8.
I'd say last patch is a stretch due to the use of _PICK() and hardcoding
the map, but to me it seems to avoid making it more complex elsewhere.
Lucas De Marchi (4):
This is only used by GRAPHICS_VER == 6 and GRAPHICS_VER == 7. All other
recent platforms do not depend on this field, so it doesn't make much
sense to keep it generic like that. Instead, just do a mapping from
engine class to HW ID in the single place that is needed.
Signed-off-by: Luc
On Wed, Jul 21, 2021 at 10:25:59AM +0100, Tvrtko Ursulin wrote:
On 21/07/2021 00:20, Lucas De Marchi wrote:
This is only used by GRAPHICS_VER == 6 and GRAPHICS_VER == 7. All other
recent platforms do not depend on this field, so it doesn't make much
sense to keep it generic like that. In
On Wed, Jul 21, 2021 at 03:47:22PM -0700, Matt Roper wrote:
On Tue, Jul 20, 2021 at 04:20:12PM -0700, Lucas De Marchi wrote:
The engine hw_id is only used by RING_FAULT_REG(), which is not used
since GRAPHICS_VER == 8. We tend to keep adding new defines just to be
consistent, but let's t
On Wed, Jul 21, 2021 at 3:51 PM Matt Roper wrote:
>
> On Tue, Jul 20, 2021 at 04:20:13PM -0700, Lucas De Marchi wrote:
> > We kept adding new engines and for that increasing hw_id unnecessarily:
> > it's not used since GRAPHICS_VER == 8. Prepend "gen6" to the fi
h the direct register address instead of calculating
from the legacy HW_ID (Matt Roper)
Signed-off-by: Lucas De Marchi
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c| 6 --
drivers/gpu/drm/i915/gt/intel_engine_types.h | 10 +-
drivers/gpu/drm/i915/i915_
TGL_DFSM_PIPE_D_DISABLE, we don't have to do anything as the bit has
disable semantic and RKL doesn't have pipe D.
Bspec: 50075, 7548
Fixes: 2b5a4562edd0 ("drm/i915/display: Simplify GLK display version tests")
Cc: Matt Roper
Signed-off-by: Lucas De Marchi
---
name
functions and macros where appropriate (usually to GLK when dealing with
display or with ICL otherwise). It starts with display, which is more
straightforward, and then proceed to the rest of i915.
diff stat removing 1600 lines of dead code seems to pay the pain of
doing this.
Lucas De Marchi
ph Hellwig
Signed-off-by: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
Reviewed-by: Matt Roper
Link:
https://patchwork.freedesktop.org/patch/msgid/20210722232922.3796835-1-lucas.demar...@intel.com
---
drivers/gpu/drm/i915/display/intel_display.c | 8 +++-
1 file changed, 7 insertions(+), 1
Remove DMC firmware for CNL.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_dmc.c | 9 -
1 file changed, 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
b/drivers/gpu/drm/i915/display/intel_dmc.c
index 9895fd957df9..3c3c6cb5c0df 100644
--- a
The only real platform with DISPLAY_VER == 10 is GLK, so we don't need
any checks and supporting code for CNL. Remove code and rename
functions/macros accordingly.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 72 +-
drivers/gpu/drm
No need for special CNL handling as there is no real platform with that
configuration.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_crtc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c
b/drivers/gpu/drm
ndled separately (GLK).
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_bios.c| 6 +++---
drivers/gpu/drm/i915/display/intel_display.c | 7 ---
2 files changed, 3 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
b/drivers/gpu/drm/i915/di
Remove special handling of PORT_F in i915_irq.c and only do it for
DISPLAY_VER == 11.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_irq.c | 7 +++
drivers/gpu/drm/i915/i915_reg.h | 2 +-
2 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915
later when we get rid of the
additional CNL tables.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_ddi.c | 254 ++-
1 file changed, 20 insertions(+), 234 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i9
The only real platform with DISPLAY_VER == 10 is GLK. We don't need to
handle CNL explicitly in intel_dp.c.
Remove code and rename functions/macros accordingly to use ICL prefix.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_dp.c | 35 -
1
only caller, in ICL.
Remove code and rename functions/macros accordingly to use ICL prefix
for those that are still needed.
Verified with:
make EXTRA_CFLAGS=-Wunused drivers/gpu/drm/i915/display/intel_dpll_mgr.o
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_dpll_
With the removal of CNL, let's consider ICL as the first platform using
that index.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/intel_engine.h | 2 +-
drivers/gpu/drm/i915/i915_drv.h| 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gp
Only one reference to CNL that is not needed, but code is the same for
DISPLAY_VER >= 11, so leave the code around and just remove the special
case for CNL.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 2 +-
1 file changed, 1 insertion(+), 1 delet
The only real platform with DISPLAY_VER == 10 is GLK. We don't need to
handle CNL explicitly.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_ddi.c | 12 +-
.../drm/i915/display/intel_ddi_buf_trans.c| 616 +-
.../drm/i915/di
With the removal of CNL, let's consider ICL as the first platform using
those constants.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_reg.h | 24 +++
drivers/gpu/drm/i915/intel_dram.c | 32 +++
2 files changed, 28 inser
The only real platform with DISPLAY_VER == 10 is GLK, so we don't need
any checks and supporting code for CNL. For DISPLAY_VER >= 11,
ilk_load_csc_matrix() is not used, so make it handle GLK only.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_color.c | 5 ++---
The only real platform with DISPLAY_VER == 10 is GLK, that doesn't have
combo phys. We don't need to handle CNL explicitly in
intel_combo_phy.c.
Remove code and rename functions/macros accordingly to use ICL prefix.
Signed-off-by: Lucas De Marchi
---
.../gpu/drm/i915/display/intel_c
Only one reference to CNL that is not needed, but code is the same for
GEN9_BC, so leave the code around and just remove the special
case for CNL.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/intel_mocs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers
The numbers of scalers and sprites depend on the display version, so use
it instead of GRAPHICS_VER. We were mixing both, which let me confused
while removing CNL and GRAPHICS_VER == 10.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_device_info.c | 8
1 file changed, 4
ually increase the
number of subslices so the number of slices remain 1.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/intel_sseu.c | 79
drivers/gpu/drm/i915/gt/intel_sseu.h | 2 +-
2 files changed, 1 insertion(+), 80 deletions(-)
diff --git a/drivers/gp
The only real platform with DISPLAY_VER == 10 is GLK. We don't need to
handle CNL explicitly in skl_universal_plane.c.
Remove code and rename functions/macros accordingly to use ICL prefix.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/skl_universal_plane.c
With all the users removed, finish removing the CNL platform definitions.
We will leave the PCI IDs around as those are exposed to userspace.
Even if mesa doesn't support CNL anymore, let's avoid build breakages
due to changing the headers.
Signed-off-by: Lucas De Marchi
---
drive
Only one reference to CNL that is not needed, but code is the same for
DISPLAY_VER >= 11, so leave the code around and just remove the special
case for CNL.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_vdsc.c | 5 -
1 file changed, 4 insertions(+), 1 delet
The only real platform with DISPLAY_VER == 10 is GLK. We don't need to
handle CNL explicitly in intel_display_power.c.
Signed-off-by: Lucas De Marchi
---
.../drm/i915/display/intel_display_power.c| 289 --
.../drm/i915/display/intel_display_power.h| 2 -
driver
With the removal of CNL, let's consider GLK as the first platform using
those constants since GLK has DISPLAY_VER == 10.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/skl_scaler.c | 10 +-
drivers/gpu/drm/i915/i915_reg.h | 4 ++--
2 files chang
Remove references for CNL from pch detection.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_pch.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c
index cc44164e242b..d1d4b97b86f5 100644
Consider the new WOPCM size as starting in ICL rather than CNL since the
latter is being removed from the driver.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_wopcm.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915
Remove support for CNL as it's highly untested, probably broken, and
there is no real platform that requires this code. This is part of CNL
removal from i915.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_reg.h | 2 +-
drivers/gpu/drm/i915/intel_pm.c
Cleanup remaining cases that we find CNL in the codebase.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_bios.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp_aux.c | 1 -
drivers/gpu/drm/i915/display
Remove registers that are not used anymore due to CNL removal and rename
those that are.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_reg.h | 192 ++-
drivers/gpu/drm/i915/intel_device_info.c | 2 +-
2 files changed, 48 insertions(+), 146 deletions
Replace all remaining handling of GRAPHICS_VER {==,>=} 10 with
{==,>=} 11. With the removal of CNL, there is no platform with graphics
version equals 10.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c| 1 -
drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
the port mask, too.
Thanks for the bug report and test.
Lucas De Marchi
On Mon, Jul 26, 2021 at 06:20:03AM -0400, Rodrigo Vivi wrote:
On Sat, Jul 24, 2021 at 10:02:15PM -0700, Lucas De Marchi wrote:
On Sat, Jul 24, 2021 at 06:41:21PM +0100, Christoph Hellwig wrote:
> Still tests fine:
>
> Tested-by: Christoph Hellwig
I just pushed this to drm-intel-nex
On Mon, Jul 26, 2021 at 06:59:35AM -0400, Rodrigo Vivi wrote:
On Fri, Jul 23, 2021 at 05:11:02PM -0700, Lucas De Marchi wrote:
Remove special handling of PORT_F in i915_irq.c and only do it for
DISPLAY_VER == 11.
oh! ignore my previous thought about removing the port F...
of course I only
On Sat, Jul 24, 2021 at 11:12:07AM -0700, Matt Roper wrote:
On Fri, Jul 23, 2021 at 05:10:48PM -0700, Lucas De Marchi wrote:
The only real platform with DISPLAY_VER == 10 is GLK, so we don't need
any checks and supporting code for CNL. Remove code and rename
functions/macros accord
On Mon, Jul 26, 2021 at 06:13:10AM -0400, Rodrigo Vivi wrote:
On Fri, Jul 23, 2021 at 05:11:14PM -0700, Lucas De Marchi wrote:
The numbers of scalers and sprites depend on the display version, so use
it instead of GRAPHICS_VER. We were mixing both, which let me confused
while removing CNL and
With the removal of CNL, let's consider ICL as the first platform using
that index.
Signed-off-by: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gt/intel_engine.h | 2 +-
drivers/gpu/drm/i915/i915_drv.h| 4 ++--
2 files changed, 3 insertions(+), 3 dele
Only one reference to CNL that is not needed, but code is the same for
GEN9_BC, so leave the code around and just remove the special
case for CNL.
Signed-off-by: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gt/intel_mocs.c | 2 +-
1 file changed, 1 insertion(+), 1
This the part of https://patchwork.freedesktop.org/series/93056/
that should go through drm-intel-gt-next branch.
Lucas De Marchi (4):
drm/i915/gt: remove explicit CNL handling from intel_mocs.c
drm/i915/gt: remove explicit CNL handling from intel_sseu.c
drm/i915/gt: rename CNL references
Replace all remaining handling of GRAPHICS_VER {==,>=} 10 with
{==,>=} 11. With the removal of CNL, there is no platform with graphics
version equals 10.
Signed-off-by: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gt/debugfs_gt_pm.c | 10 ++---
drivers/gpu/dr
ually increase the
number of subslices so the number of slices remain 1.
Signed-off-by: Lucas De Marchi
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_sseu.c | 79
drivers/gpu/drm/i915/gt/intel_sseu.h | 2 +-
2 files changed, 1 insertion(+), 80 deletions(-)
I guess I forgot to Cc dri-devel. Doing it now.
Lucas De Marchi
On Fri, Jul 30, 2021 at 12:18:59PM -0700, Matt Roper wrote:
On Fri, Jul 30, 2021 at 12:11:15PM -0700, Lucas De Marchi wrote:
There's a missing sentinel since we are not using ARRAY_SIZE(), but rather
checking that the .start
d, the clr bits could be anything since they don't really
matter. The biggest value added by the wa_masked_* variant is the use of
_MASKED_* where needed.
Lucas De Marchi
}
static void
wa_masked_dis(struct i915_wa_list *wal, i915_reg_t reg, u32 val)
{
- wa_add(wal, reg, 0, _MASKED_BIT_DIS
Ursulin
Reviewed-by: Lucas De Marchi
Lucas De Marchi
---
drivers/gpu/drm/i915/i915_debugfs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 8dd374691102..b9c81376a413 100644
--- a/drivers/gpu
On Thu, Apr 29, 2021 at 10:12:49AM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Same workaround was listed two times - once under the Gen7 block and once
under the Haswell section.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Lucas De Marchi
Lucas De Marchi
---
drivers/gpu/drm/i915
Byte 26 in a edid struct is supposed to be "Blue and white
least-significant 2 bits", not "black and white". Rename the field
accordingly. This field is not used anywhere, so just renaming it here
for correctness.
Signed-off-by: Lucas De Marchi
---
include/drm/drm_edid.h |
On Wed, Aug 11, 2021 at 09:32:49PM +, Simon Ser wrote:
Reviewed-by: Simon Ser
Do you need me to push this?
yes, please. I'm a committer only on drm-intel and I guess this should
go through another tree.
thanks
Lucas De Marchi
provided on the GT workaround list rather than
+ * the engine-specific workaround list.
+ *
extra blank line here. Otherwise:
Reviewed-by: Lucas De Marchi
Daniel, where/how should we land this and next pending WAs? I have 3 more
already reviewed that I need to re-submit to dri-devel.
Should we
From: Swathi Dhanavanthri
This is a permanent workaround for TGL,RKL,DG1 and ADLS.
Signed-off-by: Swathi Dhanavanthri
Reviewed-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 26 +
drivers/gpu/drm/i915/i915_reg.h | 3 +++
2 files changed
Reviewed-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 20
1 file changed, 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 3c609adca2ee..aeb5fb54fb0a 100644
--- a/drivers/gpu
do not have that WA.
Bspec: 31870
v2: Rephrase some comments to make them clearer (Matt)
Cc: Clinton Taylor
Signed-off-by: Caz Yokoyama
Signed-off-by: Lucas De Marchi
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 48 -
1 file changed,
platforms
Cc: Clinton Taylor
Signed-off-by: Caz Yokoyama
Signed-off-by: Lucas De Marchi
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drive
Missing WAs and related refactors.
Caz Yokoyama (2):
drm/i915/gen12: Add recommended hardware tuning value
drm/i915/icl: add Wa_22010271021 for all gen11
José Roberto de Souza (1):
drm/i915: Move Wa_16011163337 to gen12_ctx_workarounds_init()
Swathi Dhanavanthri (1):
drm/i915: Add Wa_140
gt; return 0;
>
> + /* Relocations are disallowed for all platforms after TGL-LP */
> + if (INTEL_GEN(eb->i915) >= 12 && !IS_TIGERLAKE(eb->i915))
> + return -EINVAL;
> +
> + /* All discrete memory platforms are Ge
it work as expected.
Hence adding those EHL entries back.
Changes since V1:
- commit message modified with Commit - Joonas
Cc: Francisco Jerez
Cc: Jon Bloomfield
Cc: Lucas De Marchi
Cc:
Signed-off-by: Matt Roper
Fixes: 046091758b50 ("Revert "drm/i915/ehl: Update MOCS table for
add a new register definition but just stop
inverting the fusing masks before processing them.
Bspec: 33288
This is now:
Bspec: 52615
Cc: Daniele Ceraolo Spurio
Signed-off-by: Tvrtko Ursulin
Signed-off-by: Matt Roper
this change above,
Reviewed-by: Lucas De Marchi
Lucas De Marchi
---
d
t for GRAPHICS_VER(i915) == 12.
Although I wonder ifwe should be using MEDIA_VER(i915) here.
Cc: Tvrtko Ursulin
Cc: Daniele Ceraolo Spurio
Signed-off-by: Venkata Sandeep Dhanalakota
Signed-off-by: Matt Roper
Reviewed-by: Lucas De Marchi
Lucas De Marchi
---
drivers/gpu/drm/i9
is should be `return err;` ?
+Chris
This patch itself looks good.
Reviewed-by: Lucas De Marchi
Lucas De Marchi
On Fri, Jul 02, 2021 at 01:33:50PM +0100, Tvrtko Ursulin wrote:
On 01/07/2021 21:23, Matt Roper wrote:
From: Lucas De Marchi
Besides the arch version returned by GRAPHICS_VER(), new platforms
contain a "release id" to make clear the difference from one platform to
another. Althou
On Mon, Jul 05, 2021 at 02:52:31PM +0300, Jani Nikula wrote:
On Fri, 02 Jul 2021, Tvrtko Ursulin wrote:
On 01/07/2021 21:23, Matt Roper wrote:
From: Lucas De Marchi
Besides the arch version returned by GRAPHICS_VER(), new platforms
contain a "release id" to make clear the diffe
(possible) VCS engines, and later VECS
Lucas De Marchi
On Thu, Jul 01, 2021 at 01:24:07PM -0700, Matt Roper wrote:
As with DG1, DG2 has an ICL-style south display interface provided on
the same PCI device. Add a fake PCH to ensure DG2 takes the appropriate
codepaths for south display handling.
Bspec: 54871, 50062, 49961, 53673
Cc: Lucas De Marchi
uot; and
replace the has_master_unit_irq feature flag with an IP version test.
Bspec: 50875
Cc: Daniele Spurio Ceraolo
Cc: Stuart Summers
Signed-off-by: Paulo Zanoni
Signed-off-by: Lucas De Marchi
Signed-off-by: Tomasz Lis
Signed-off-by: Matt Roper
So I know DG1 upstream is decidedly n
On Wed, Jul 07, 2021 at 11:34:36AM +0300, Jani Nikula wrote:
On Tue, 06 Jul 2021, Lucas De Marchi wrote:
On Mon, Jul 05, 2021 at 02:52:31PM +0300, Jani Nikula wrote:
On Fri, 02 Jul 2021, Tvrtko Ursulin wrote:
On 01/07/2021 21:23, Matt Roper wrote:
From: Lucas De Marchi
Besides the arch
On Wed, Jul 07, 2021 at 09:39:03AM +0200, Daniel Vetter wrote:
On Wed, Jul 7, 2021 at 12:48 AM Lucas De Marchi
wrote:
On Fri, Jul 02, 2021 at 11:21:10AM +0200, Daniel Vetter wrote:
>On Thu, Jul 1, 2021 at 10:26 PM Matt Roper wrote:
>>
>> From: Paulo Zanoni
>>
>> Th
Commit c816723b6b8a ("drm/i915/gt: replace IS_GEN and friends with
GRAPHICS_VER") converted INTEL_GEN and friends to the new version check
macros. Meanwhile, some changes sneaked in to use INTEL_GEN. Remove the
last users so we can remove the macros.
Signed-off-by: Lucas De Marchi
--
Now that all the codebase is converted to the new *VER macros, remove
the old GEN ones.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_drv.h | 15 ---
1 file changed, 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index
Commit 161058fb899e ("drm/i915: Add remaining conversions to GRAPHICS_VER")
did the last conversions to the new macros for version checks, but some
some changes sneaked in to use INTEL_GEN. Remove the last users so
we can remove the macros.
Signed-off-by: Lucas De Marchi
---
drive
tches 2 and 3 in drm-intel-next
Since patches are tested on drm-tip, CI should flag a build breakage if
someone uses the GEN macros. Another possibility is to simply apply the
3rd patch on both branches, but I don't see a real need for that.
Lucas De Marchi (3):
drm/i915/gt: finish INT
On Wed, Jul 07, 2021 at 12:39:28PM -0700, Matt Roper wrote:
On Wed, Jul 07, 2021 at 11:13:24AM -0700, Lucas De Marchi wrote:
Commit 161058fb899e ("drm/i915: Add remaining conversions to GRAPHICS_VER")
did the last conversions to the new macros for version checks, but some
some chang
is
I915_GEM_DOMAIN_CPU
In the end I think the warning would be ok if it was the cherry on top,
to guarantee we don't take those paths. We should probably have a
warn_once() to avoid spamming the console. But we also have to rework
the code to guarantee we are the only ones who may eventually
t doesn't really matter
Reviewed-by: Lucas De Marchi
Lucas De Marchi
in the patch
series which initiated this task
https://patchwork.freedesktop.org/series/99711/
This patch converts all access to the lrc_desc through iosys_map
interfaces.
Cc: Lucas De Marchi
Cc: John Harrison
Cc: Matthew Brost
Cc: Umesh Nerlige Ramappa
Signed-off-by: Balasubramani
in the patch
series which initiated this task
https://patchwork.freedesktop.org/series/99711/
This patch converts all access to the lrc_desc through iosys_map
interfaces.
Cc: Lucas De Marchi
Cc: John Harrison
Cc: Matthew Brost
Cc: Umesh Nerlige Ramappa
Signed-off-by: Balasubramani
_MAX_EU_STRIDE];
+ u8 subslice_mask[GEN_SS_MASK_SIZE];
+ u8 geometry_subslice_mask[GEN_SS_MASK_SIZE];
+ u8 compute_subslice_mask[GEN_SS_MASK_SIZE];
+ u8 eu_mask[GEN_SS_MASK_SIZE * GEN_MAX_EU_STRIDE];
Aside the minor things above, everything look correct.
Reviewed-by: Lucas De
const struct sseu_dev_info *sseu,
+ struct drm_printer *p)
+{
+ if (sseu->max_slices == 0) {
+ drm_printf(p, "Unavailable\n");
+ return;
either make this an early return, or remove the return
other than coding style nits metioned above,
Reviewed-by: Lucas De Marchi
Lucas De Marchi
On Fri, Mar 11, 2022 at 12:43:40PM -0800, Matt Roper wrote:
On Fri, Mar 11, 2022 at 12:38:17PM -0800, Matt Roper wrote:
On Fri, Mar 11, 2022 at 11:00:09AM -0800, Lucas De Marchi wrote:
> On Thu, Mar 10, 2022 at 10:15:42PM -0800, Matt Roper wrote:
> > Xe_HP removed "slice" as
.
Cc: John Harrison
Cc: Matt Roper
Signed-off-by: Daniele Ceraolo Spurio
Signed-off-by: Matt Roper
Reviewed-by: Lucas De Marchi
Lucas De Marchi
nd give
us the result from one specific instance), Wa_22013088509 suggests that
we leave the multicast bit enabled when performing read operations, so
we follow suit here.
Cc: Harish Chegondi
Signed-off-by: Matt Roper
Reviewed-by: Lucas De Marchi
Lucas De Marchi
Auto-generated diff between origin/internal..internal
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index bbaf1caca607f..ddbde96311eb
or the other platforms, I can't see why we are not
doing the mapping for them.
When sending upstream I will try to extend this up to gen11. For
internal use it's sufficient to fix it only for 12.50.
Signed-off-by: Lucas De Marchi
---
baseline: 204d0733767434b3b8e65206527e5a09e8db
From: Matthew Brost
PVC has non-standard logical mapping for the VDBOXs, add support for the
correct mapping.
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engi
Earlier versions of commit a5b7ef27da60 ("drm/i915: Add struct to hold
IP version") named "ver" as "arch" and then when it was renamed it
missed the rename on MEDIA_VER_FULL() since it it's currently not used.
Fixes: a5b7ef27da60 ("drm/i915: Add struct to h
rtial map and should
still work.
Cc: Matt Roper
Signed-off-by: Matthew Brost
[ Extend the mapping to media versions 11 and 12 and give proper
justification in the commit message why ]
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 22 +-
1
to hold IP version")
Cc: José Roberto de Souza
Cc: Matt Roper
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 26df561a4e94..7458b107a1d6
required for i915.
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: Thomas Zimmermann
Cc: David Airlie
Cc: Daniel Vetter
Cc: Thomas Hellstr_m
Cc: Lucas De Marchi
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/drm_cache.c | 54 +
include/drm
or system memory
and according setup the iosys_map (Lucas)
Cc: Lucas De Marchi
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc
.
Updated to use the functions provided by drm_cache.c.
v2: check if the source and destination memory address is from local
memory or system memory and initialize the iosys_map accordingly
(Lucas)
Cc: Lucas De Marchi
Cc: Matthew Auld
Cc: Thomas Hellstr_m
Signed-off-by: Balasubramani
Now Cc'ing Daniel properly
Lucas De Marchi
On Mon, Mar 21, 2022 at 04:00:56PM -0700, Lucas De Marchi wrote:
+Thomas Zimmermann and +Daniel Vetter
Could you take a look below regarding the I/O to I/O memory access?
On Thu, Mar 03, 2022 at 11:30:11PM +0530, Balasubramani Vivekanandan
ing
The previous placement of intel_guc_log.h was actually the correct one.
I'm squashing this and the previous blank line I mentioned as a fixup.
thanks
Lucas De Marchi
static void guc_log_copy_debuglogs_for_relay(struct intel_guc_log *log);
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