On Fri, 2022-01-07 at 14:53 -0500, Alex Deucher wrote:
> On Wed, Dec 29, 2021 at 11:07 PM Liu Ying wrote:
> >
> > Actual hardware state of CRTC is controlled by the member 'active'
> > in
> > struct drm_crtc_state instead of the member 'enable', ac
self refresh work(the CRTC is disabled, while the relevant encoder
and bridges could be disabled or not depending on the drivers).
Cc: Rob Clark
Cc: Sean Paul
Cc: Zain Wang
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: Thomas Zimmermann
Cc: David Airlie
Cc: Daniel Vetter
Signed-off-by: Liu
We should detach existing panels when unbinding the driver since
they are attached at the binding stage, otherwise, the attaching
function would return the -EBUSY value when the ldb driver module
is installed again.
Signed-off-by: Liu Ying
---
drivers/gpu/drm/imx/imx-ldb.c | 3 +++
1 file
plane reconfiguration support by forcing CRTC
mode change and disabling-enabling plane in plane's ->atomic_update
callback.
Suggested-by: Daniel Vetter
Cc: Philipp Zabel
Cc: David Airlie
Cc: Russell King
Cc: Daniel Vetter
Cc: Peter Senna Tschudin
Signed-off-by: Liu Ying
---
drivers/gp
2016-08-15 15:18 GMT+08:00 Daniel Vetter :
> On Mon, Aug 15, 2016 at 02:09:13PM +0800, Liu Ying wrote:
>> We don't support configuring active primary plane on-the-fly for imx-drm.
>> The relevant CRTC should be disabled before the plane configuration.
>> Of course,
bling plane in plane's ->atomic_update
callback.
Suggested-by: Daniel Vetter
Cc: Philipp Zabel
Cc: David Airlie
Cc: Russell King
Cc: Daniel Vetter
Cc: Peter Senna Tschudin
Signed-off-by: Liu Ying
---
v1->v2:
* Do not reject reconfiguring an active overlay plane.
drivers/gpu/drm/im
;atomic_disable callback, but not in each plane's ->atomic_update callback,
as suggested by Daniel Vetter.
* +Cc Lucas Stach, as he tested the patch v2.
v1->v2:
* Do not reject reconfiguring an active overlay plane.
Liu Ying (3):
drm/atomic-helper: Add atomic_disable CRTC helper call
the old CRTC state for
disable operation.
Suggested-by: Daniel Vetter
Cc: Philipp Zabel
Cc: David Airlie
Cc: Russell King
Cc: Daniel Vetter
Cc: Peter Senna Tschudin
Cc: Lucas Stach
Signed-off-by: Liu Ying
---
v3:
* Newly introduced in v3.
drivers/gpu/drm/drm_atomic_helper.c | 2
Now that the drm atomic core supports the callback ->atomic_disable,
we may replace the legacy one ->disable with it.
Cc: Philipp Zabel
Cc: David Airlie
Cc: Russell King
Cc: Daniel Vetter
Cc: Peter Senna Tschudin
Cc: Lucas Stach
Signed-off-by: Liu Ying
---
v3:
* Newly introduced
Cc: Russell King
Cc: Daniel Vetter
Cc: Peter Senna Tschudin
Cc: Lucas Stach
Signed-off-by: Liu Ying
---
v2->v3:
* Disable all appropriate affected planes(when necessary) in CRTC's
->atomic_disable callback, but not in each plane's ->atomic_update callback,
as suggested by
p LDB bridge driver.
* Use of_graph_get_endpoint_by_regs() and of_graph_get_remote_endpoint() to
get the input remote endpoint in imx8qxp_ldb_set_di_id() of i.MX8qxp LDB
bridge driver.
* Avoid using companion_port OF node after putting it in
imx8qxp_ldb_parse_dt_companion() of i.MX8qxp LDB
bus(12-bit per component) to a pixel link.
Reviewed-by: Robert Foss
Reviewed-by: Laurent Pinchart
Signed-off-by: Liu Ying
---
v7->v8:
* No change.
v6->v7:
* No change.
v5->v6:
* Add Laurent's R-b tag.
v4->v5:
* Add Robert's R-b tag.
v3->v4:
* No change.
v2->v3
or a 36-bit output bus(12-bit per component) to a pixel link.
Reviewed-by: Robert Foss
Reviewed-by: Laurent Pinchart
Signed-off-by: Liu Ying
---
Robert, I keep your R-b tag from v5. Let me know if you want me to drop it, as
v6 contains a fix.
v7->v8:
* No change.
v6->v7:
* No change.
This patch adds bindings for i.MX8qm/qxp pixel combiner.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v7->v8:
* No change.
v6->v7:
* No change.
v5->v6:
* No change.
v4->v5:
* No change.
v3->v4:
* No change.
v2->v3:
* Add Rob's R-b tag.
v1->v2:
* Use gra
-off-by: Liu Ying
---
Robert, I keep your R-b tag from v5. Let me know if you want me to drop it, as
v7 contains a fix for checkpatch complaints.
Marcel, as the fix is trivial, I add your T-b tag. Let me know if you want me
to drop it.
v7->v8:
* No change.
v6->v7:
* Fix 'Alignment s
This patch adds bindings for i.MX8qm/qxp display pixel link.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v7->v8:
* No change.
v6->v7:
* No change.
v5->v6:
* No change.
v4->v5:
* No change.
v3->v4:
* No change.
v2->v3:
* Add Rob's R-b tag.
v1->v2:
*
control interface.
Reviewed-by: Robert Foss
Tested-by: Marcel Ziswiler # Colibri iMX8X,
LT170410-2WHC, LP156WF1
Signed-off-by: Liu Ying
---
Robert, I keep your R-b tag from v5. Let me know if you want me to drop it, as
v7 contains a fix for checkpatch complaints.
Marcel, as the fix is trivial
This patch adds bindings for i.MX8qxp pixel link to DPI(PXL2DPI).
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v7->v8:
* No change.
v6->v7:
* No change.
v5->v6:
* Add Rob's R-b tag.
v4->v5:
* No change.
v3->v4:
* Add 'fsl,sc-resource' property. (Ro
codings between those modules. The PXL2DPI is purely
combinatorial.
Tested-by: Marcel Ziswiler # Colibri iMX8X,
LT170410-2WHC, LP156WF1
Reviewed-by: Robert Foss
Signed-off-by: Liu Ying
---
Marcel, I add your T-b tag from v6, let me know if you want me to drop it, as
the checkpatch fix and
-by: Liu Ying
---
Marcel, I add your T-b tag from v6, let me know if you want me to drop it, as
the checkpatch fix in v7 and the rebase in v8 are trivial.
v7->v8:
* Use devm_drm_of_get_bridge() due to the rebase upon v5.19-rc1.
v6->v7:
* Fix below complaints from 'checkpatch.pl --stric
This patch adds bindings for i.MX8qm/qxp LVDS display bridge(LDB).
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v7->v8:
* No change.
v6->v7:
* No change.
v5->v6:
* No change.
v4->v5:
* No change.
v3->v4:
* Add Rob's R-b tag.
v2->v3:
* Drop 'fsl,syscon&#x
supports the LDB single mode and split mode.
Tested-by: Marcel Ziswiler # Colibri iMX8X,
LT170410-2WHC, LP156WF1
Reviewed-by: Robert Foss
Signed-off-by: Liu Ying
---
Marcel, I add your T-b tag from v6, let me know if you want me to drop it, as
the checkpatch fix in v7 is trivial.
v7->v8:
* No cha
Reviewed-by: Robert Foss
Signed-off-by: Liu Ying
---
Marcel, I add your T-b tag from v6, let me know if you want me to drop it, as
the checkpatch fix in v7 is trivial.
v7->v8:
* No change.
v6->v7:
* Fix below complaints from 'checkpatch.pl --strict'. (Robert)
- 'Prefe
This patch adds bindings for i.MX8qm/qxp Control and Status Registers module.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v7->v8:
* No change.
v6->v7:
* Add Rob's R-b tag.
v5->v6:
* Drop 'select' schema. (Rob)
v4->v5:
* Newly introduced in v5. (Rob)
.
Add myself as the maintainer of DRM bridge drivers for i.MX SoCs.
Reviewed-by: Robert Foss
Signed-off-by: Liu Ying
---
v7->v8:
* No change.
v6->v7:
* Add Robert's R-b tag.
v5->v6:
* No change.
v4->v5:
* No change.
v3->v4:
* No change.
v2->v3:
* No chang
Hi Laurent,
On Thu, 2022-06-09 at 11:24 +0300, Laurent Pinchart wrote:
> Hi Liu,
>
> Thank you for the patch.
Thank you for the review.
>
> On Thu, Jun 09, 2022 at 02:49:20PM +0800, Liu Ying wrote:
> > This patch adds bindings for i.MX8qm/qxp pixel combiner.
> >
&
Hi Laurent,
On Thu, 2022-06-09 at 12:30 +0300, Laurent Pinchart wrote:
> Hi Liu,
>
> Thank you for the patch.
Thank you for the review.
>
> On Thu, Jun 09, 2022 at 02:49:23PM +0800, Liu Ying wrote:
> > This patch adds a drm bridge driver for i.MX8qm/qxp display pixel
&g
Hi Laurent,
On Thu, 2022-06-09 at 12:32 +0300, Laurent Pinchart wrote:
> Hi Liu,
>
> On Thu, Jun 09, 2022 at 02:49:17PM +0800, Liu Ying wrote:
> > Hi,
> >
> > This is the v8 series to add some DRM bridge drivers support
> > for i.MX8qm/qxp SoCs.
> >
>
On Thu, 2022-06-09 at 09:47 +0200, Alexander Stein wrote:
> Am Donnerstag, 9. Juni 2022, 08:49:26 CEST schrieb Liu Ying:
> > This patch adds a helper to support LDB drm bridge drivers for
> > i.MX SoCs. Helper functions supported by this helper should
> > implement comm
to
get the input remote endpoint in imx8qxp_ldb_set_di_id() of i.MX8qxp LDB
bridge driver.
* Avoid using companion_port OF node after putting it in
imx8qxp_ldb_parse_dt_companion() of i.MX8qxp LDB bridge driver.
* Drop unnecessary check for maximum available LDB channels from
i.MX8qm LDB bridge dr
bus(12-bit per component) to a pixel link.
Reviewed-by: Robert Foss
Reviewed-by: Laurent Pinchart
Signed-off-by: Liu Ying
---
v8->v9:
* No change.
v7->v8:
* No change.
v6->v7:
* No change.
v5->v6:
* Add Laurent's R-b tag.
v4->v5:
* Add Robert's R-b tag.
v3->v4
This patch adds bindings for i.MX8qm/qxp pixel combiner.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v8->v9:
* No change.
v7->v8:
* No change.
v6->v7:
* No change.
v5->v6:
* No change.
v4->v5:
* No change.
v3->v4:
* No change.
v2->v3:
* Add Rob's R-b
or a 36-bit output bus(12-bit per component) to a pixel link.
Reviewed-by: Robert Foss
Reviewed-by: Laurent Pinchart
Signed-off-by: Liu Ying
---
Robert, I keep your R-b tag from v5. Let me know if you want me to drop it, as
v6 contains a fix.
v8->v9:
* No change.
v7->v8:
* No change.
-off-by: Liu Ying
---
Robert, I keep your R-b tag from v5. Let me know if you want me to drop it, as
v7 contains a fix for checkpatch complaints.
Marcel, as the fix is trivial, I add your T-b tag. Let me know if you want me
to drop it.
v8->v9:
* No change.
v7->v8:
* No change.
v6->
This patch adds bindings for i.MX8qm/qxp display pixel link.
Signed-off-by: Liu Ying
---
v8->v9:
* Add 'fsl,dc-id' and 'fsl,dc-stream-id' properties. (Laurent)
* Drop Rob's R-b tag.
v7->v8:
* No change.
v6->v7:
* No change.
v5->v6:
* No change.
v4->v5
control interface.
Reviewed-by: Robert Foss
Tested-by: Marcel Ziswiler # Colibri iMX8X,
LT170410-2WHC, LP156WF1
Signed-off-by: Liu Ying
---
Robert, I keep your R-b tag from v5. Let me know if you want me to drop it, as
v7 contains a fix for checkpatch complaints and change in v9 is kinda
This patch adds bindings for i.MX8qxp pixel link to DPI(PXL2DPI).
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v8->v9:
* No change.
v7->v8:
* No change.
v6->v7:
* No change.
v5->v6:
* Add Rob's R-b tag.
v4->v5:
* No change.
v3->v4:
* Add 'fsl,sc-resou
codings between those modules. The PXL2DPI is purely
combinatorial.
Tested-by: Marcel Ziswiler # Colibri iMX8X,
LT170410-2WHC, LP156WF1
Reviewed-by: Robert Foss
Signed-off-by: Liu Ying
---
Marcel, I add your T-b tag from v6, let me know if you want me to drop it, as
the checkpatch fix and
-by: Liu Ying
---
Marcel, I add your T-b tag from v6, let me know if you want me to drop it, as
the checkpatch fix in v7 and the rebase in v8 are trivial.
v8->v9:
* No change.
v7->v8:
* Use devm_drm_of_get_bridge() due to the rebase upon v5.19-rc1.
v6->v7:
* Fix below compla
This patch adds bindings for i.MX8qm/qxp LVDS display bridge(LDB).
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v8->v9:
* No change.
v7->v8:
* No change.
v6->v7:
* No change.
v5->v6:
* No change.
v4->v5:
* No change.
v3->v4:
* Add Rob's R-b tag.
v2-
supports the LDB single mode and split mode.
Tested-by: Marcel Ziswiler # Colibri iMX8X,
LT170410-2WHC, LP156WF1
Reviewed-by: Robert Foss
Signed-off-by: Liu Ying
---
Marcel, I add your T-b tag from v6, let me know if you want me to drop it, as
the checkpatch fix in v7 is trivial.
v8->v9:
* No cha
Reviewed-by: Robert Foss
Signed-off-by: Liu Ying
---
Marcel, I add your T-b tag from v6, let me know if you want me to drop it, as
the checkpatch fix in v7 is trivial.
v8->v9:
* No change.
v7->v8:
* No change.
v6->v7:
* Fix below complaints from 'checkpatch.pl --strict'. (R
This patch adds bindings for i.MX8qm/qxp Control and Status Registers module.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v8->v9:
* No change.
v7->v8:
* No change.
v6->v7:
* Add Rob's R-b tag.
v5->v6:
* Drop 'select' schema. (Rob)
v4->v5:
Add myself as the maintainer of DRM bridge drivers for i.MX SoCs.
Reviewed-by: Robert Foss
Signed-off-by: Liu Ying
---
v8->v9:
* No change.
v7->v8:
* No change.
v6->v7:
* Add Robert's R-b tag.
v5->v6:
* No change.
v4->v5:
* No change.
v3->v4:
* No change.
v2-&g
On Tue, 2022-06-14 at 14:11 -0600, Rob Herring wrote:
> On Sat, Jun 11, 2022 at 10:14:12PM +0800, Liu Ying wrote:
> > This patch adds bindings for i.MX8qm/qxp display pixel link.
> >
> > Signed-off-by: Liu Ying
> > ---
> > v8->v9:
> > * Add 'fsl,dc-
support.
s/i.MX8MP/i.MX8/
For now, only i.MX8qm and i.MX8qxp display bridge drivers are in
bridge/imx directory, no i.MX8MP display bridge driver.
With this fixed:
Reviewed-by: Liu Ying
>
> Fixes: e60c4354840b2fe8 ("drm/bridge: imx: Add LDB support for
> i.MX8qm")
> Fixes:
struct device_attribute *attr,
> + char *buf)
> +{
> + struct drm_device *drm = dev_get_drvdata(dev);
> + struct mxsfb_drm_private *mxsfb = drm->dev_private;
> + u32 hwcrc = readl(mxsfb->base, LCDC_V4_CRC_STAT);
Access registe
self refresh work(the CRTC is disabled, while the relevant encoder
and bridges could be disabled or not depending on the drivers).
Cc: Rob Clark
Cc: Sean Paul
Cc: Zain Wang
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: Thomas Zimmermann
Cc: David Airlie
Cc: Daniel Vetter
Signed-off-by: Liu
On Mon, 2022-02-07 at 09:14 +0100, Marek Vasut wrote:
> On 2/7/22 06:13, Liu Ying wrote:
> > Hi Marek,
>
> Hi,
>
> > On Sun, 2022-02-06 at 19:56 +0100, Marek Vasut wrote:
> > > The LCDIF controller as present in i.MX6SX/i.MX8M Mini/Nano has a
> > > CRC
On Mon, 2022-02-07 at 11:43 +0100, Marek Vasut wrote:
> On 2/7/22 10:18, Liu Ying wrote:
>
> Hi,
>
> > > > On Sun, 2022-02-06 at 19:56 +0100, Marek Vasut wrote:
> > > > > The LCDIF controller as present in i.MX6SX/i.MX8M Mini/Nano
> > > > &
Hello Laurent,
On Tue, 2022-02-08 at 05:03 +0200, Laurent Pinchart wrote:
> Hello Liu Ying,
>
> On Tue, Feb 08, 2022 at 10:41:59AM +0800, Liu Ying wrote:
> > On Mon, 2022-02-07 at 11:43 +0100, Marek Vasut wrote:
> > > On 2/7/22 10:18, Liu Ying wrote:
> > > > &
On Tue, 2022-02-08 at 11:02 +0100, Marek Vasut wrote:
> On 2/8/22 03:41, Liu Ying wrote:
>
> Hello everyone,
>
> > > > > There are many blank areas which are undocumented, this LCDIF
> > > > > CRC32
> > > > > feature, i.MX8M M
To initialize register NWL_DSI_IRQ_MASK, it's enough to write it
only once in function nwl_dsi_init_interrupts().
Signed-off-by: Liu Ying
---
drivers/gpu/drm/bridge/nwl-dsi.c | 14 +-
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/bridge/nwl-ds
On Wed, 2022-04-20 at 13:00 +0530, Vinod Koul wrote:
> On 19-04-22, 09:08, Liu Ying wrote:
> > Hi,
> >
> > This is the v8 series to add i.MX8qxp LVDS PHY mode support for the
> > Mixel
> > PHY in the Freescale i.MX8qxp SoC.
> >
> > The Mixel PHY is M
Hi,
On Fri, 2022-04-22 at 19:24 +0200, Guido Günther wrote:
> Hi,
> On Tue, Apr 19, 2022 at 09:08:48AM +0800, Liu Ying wrote:
> > The Northwest Logic MIPI DSI host controller embedded in i.MX8qxp
> > works with a Mixel MIPI DPHY + LVDS PHY combo to support either
> > a MI
ire bypass0 and bypass1 clocks for both i.MX8qxp and i.MX8qm in DPU's
dt binding documentation.
* Use new dt binding way to add clocks in the dt binding examples.
* Address several comments from Laurentiu on the DPU DRM patch.
Liu Ying (6):
dt-bindings: display: imx: Add i.MX
This patch adds bindings for i.MX8qxp/qm Display Processing Unit.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v10->v11:
* No change.
v9->v10:
* No change.
v8->v9:
* No change.
v7->v8:
* No change.
v6->v7:
* Add Rob's R-b tag back.
v5->v6:
* Use graph schema.
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Gasket.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v10->v11:
* No change.
v9->v10:
* No change.
v8->v9:
* No change.
v7->v8:
* No change.
v6->v7:
* No change.
v5->v6:
* No change.
v4->v5:
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Channel.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v10->v11:
* No change.
v9->v10:
* Add Rob's R-b tag.
v8->v9:
* Reference 'interrupts-extended' schema instead of 'interrupts' to
Artificially use 'plane' and 'old_plane_state' to avoid 'not used' warning.
The precedent has already been set by other macros in the same file.
Acked-by: Daniel Vetter
Signed-off-by: Liu Ying
---
v10->v11:
* No change.
v9->v10:
* No change.
v8->v9:
* N
Add myself as the maintainer of the i.MX8qxp DPU DRM driver.
Acked-by: Laurentiu Palcu
Signed-off-by: Liu Ying
---
v10->v11:
* Rebase upon v6.0-rc1.
v9->v10:
* Add Laurentiu's A-b tag.
v8->v9:
* No change.
v7->v8:
* No change.
v6->v7:
* No change.
v5->v6:
* No chang
pport for
> > i.MX8qxp")
> > Fixes: 96988a526c97cfbe ("drm/bridge: imx: Add i.MX8qxp pixel link
> > to DPI support")
> > Fixes: 1ec17c26bc06289d ("drm/bridge: imx: Add i.MX8qm/qxp display
> > pixel link support")
> > Fixes: 93e163a9e0392aca
(31, 16)
> +#define HSYN_PARA_FP_H(n)
On Thu, 2022-06-30 at 22:47 +0200, Marek Vasut wrote:
> On 6/30/22 10:30, Liu Ying wrote:
> > Hi Marek,
>
> Hi,
>
> > > drivers/gpu/drm/Makefile | 2 +-
> > > drivers/gpu/drm/mxsfb/Kconfig | 16 +
> > > drivers/gpu/drm/mxsfb
t; Cc: Laurent Pinchart
> Cc: Liu Ying
> Cc: Lucas Stach
> Cc: Marek Vasut
> Cc: Martyn Welch
> Cc: Peng Fan
> Cc: Robby Cai
> Cc: Sam Ravnborg
> Cc: Stefan Agner
If you want to add my 'Reported-by: Liu Ying '
tag, you may add it.
Reviewed-by: Liu Ying
On Thu, 2022-06-30 at 22:57 +0200, Marek Vasut wrote:
> Drop the crtc_ prefix from mode, consistently use the plane one.
s/plane/plain/
Otherwise:
Reviewed-by: Liu Ying
If you want to add my 'Reported-by: Liu Ying '
tag, you may add it.
>
> Fixes: 9db35bb349a0e ("drm
Vasut
> Cc: Alexander Stein
> Cc: Laurent Pinchart
> Cc: Liu Ying
> Cc: Lucas Stach
> Cc: Marek Vasut
> Cc: Martyn Welch
> Cc: Peng Fan
> Cc: Robby Cai
> Cc: Sam Ravnborg
> Cc: Stefan Agner
If you want to add my 'Reported-by: Liu Ying '
tag, you may add it.
Reviewed-by: Liu Ying
if: Add support for i.MX8MP LCDIF
> variant")
> Signed-off-by: Marek Vasut
> Cc: Alexander Stein
> Cc: Laurent Pinchart
> Cc: Liu Ying
> Cc: Lucas Stach
> Cc: Marek Vasut
> Cc: Martyn Welch
> Cc: Peng Fan
> Cc: Robby Cai
> Cc: Sam Ravnborg
> C
Hi,
This series contains three fixes for the fsl-ldb bridge driver.
Patch 1/3 fixes mode clock rate validation.
Patch 2/3 fixes LVDS dual link mode.
Patch 3/3 fixes input data enable signal polarity.
Liu Ying (3):
drm/bridge: fsl-ldb: Fix mode clock rate validation
drm/bridge: fsl-ldb
scale i.MX8MP LDB
bridge")
Cc: Andrzej Hajda
Cc: Neil Armstrong
Cc: Robert Foss
Cc: Laurent Pinchart
Cc: Jonas Karlman
Cc: Jernej Skrabec
Cc: David Airlie
Cc: Daniel Vetter
Cc: Sam Ravnborg
Cc: Marek Vasut
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
drivers/gpu/drm/bridge/fsl-ldb.c
Cc: David Airlie
Cc: Daniel Vetter
Cc: Sam Ravnborg
Cc: Marek Vasut
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
drivers/gpu/drm/bridge/fsl-ldb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/fsl-ldb.c b/drivers/gpu/drm/bridge/fsl-ldb.c
index 3c
niel Vetter
Cc: Sam Ravnborg
Cc: Marek Vasut
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
drivers/gpu/drm/bridge/fsl-ldb.c | 17 -
1 file changed, 17 deletions(-)
diff --git a/drivers/gpu/drm/bridge/fsl-ldb.c b/drivers/gpu/drm/bridge/fsl-ldb.c
index d4f005eef6f6..4b503c54
Hi Neil, Robert,
On Tue, 2022-06-28 at 09:10 +0200, Neil Armstrong wrote:
> On 28/06/2022 04:31, Liu Ying wrote:
> > On Mon, 2022-06-27 at 14:22 +0200, Neil Armstrong wrote:
> > > Hi,
> >
> > Hi,
> >
> > >
> > > On 24/06/2022 14:10, Geert U
On Sat, 2022-07-09 at 03:17 +0200, Marek Vasut wrote:
> Drop the crtc_ prefix from mode, consistently use the plain one.
>
> Reviewed-by: Liu Ying
> Reported-by: Liu Ying
> Fixes: 9db35bb349a0e ("drm: lcdif: Add support for i.MX8MP LCDIF
> variant")
> Signed-off-b
nction call. As nwl_dsi_bridge_detach() only calls
drm_of_panel_bridge_remove(), it can also be dropped.
Cc: Robert Foss
Cc: Guido Günther
Cc: Jagan Teki
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
drivers/gpu/drm/bridge/nwl-dsi.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm/br
Y dt binding.
v1->v2:
* Convert mixel,mipi-dsi-phy plain text dt binding to json-schema. (Guido)
* Print invalid PHY mode in dmesg from the Mixel PHY driver. (Guido)
* Add Guido's R-b tag on the patch for the nwl-dsi drm bridge driver.
Liu Ying (5):
drm/bridge: nwl-dsi: Set PHY mode in nw
: Robert Chiras
Cc: Martin Kepplinger
Cc: Andrzej Hajda
Cc: Neil Armstrong
Cc: Laurent Pinchart
Cc: Jonas Karlman
Cc: Jernej Skrabec
Cc: David Airlie
Cc: Daniel Vetter
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
v5->v6:
* Rebase the series upon v5.17-rc1.
* Set PHY mode in ->mo
I
Cc: Vinod Koul
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
v5->v6:
* Rebase upon v5.17-rc1.
v4->v5:
* Align kernel-doc style to include/linux/phy/phy.h. (Vinod)
* Trivial tweaks.
* Drop Robert's R-b tag.
v3->v4:
* Add Robert's R-b tag.
v2->v3:
* No change
ido Günther
Cc: Kishon Vijay Abraham I
Cc: Vinod Koul
Cc: Rob Herring
Cc: NXP Linux Team
Reviewed-by: Rob Herring
Reviewed-by: Guido Günther
Signed-off-by: Liu Ying
---
v5->v6:
* No change.
v4->v5:
* No change.
v3->v4:
* Add Rob's and Guido's R-b tags.
v2->v3:
* I
Add support for Mixel MIPI DPHY + LVDS PHY combo IP
as found on Freescale i.MX8qxp SoC.
Cc: Guido Günther
Cc: Kishon Vijay Abraham I
Cc: Vinod Koul
Cc: Rob Herring
Cc: NXP Linux Team
Reviewed-by: Rob Herring
Reviewed-by: Guido Günther
Signed-off-by: Liu Ying
---
v5->v6:
* No change.
-by: Guido Günther
Signed-off-by: Liu Ying
---
v5->v6:
* No change.
v4->v5:
* No change.
v3->v4:
* Add Guido's R-b tag.
v2->v3:
* Improve readability of mixel_dphy_set_mode(). (Guido)
v1->v2:
* Print invalid PHY mode in dmesg. (Guido)
.../phy/freescale/phy-fsl-im
) in the Mixel PHY driver. (Guido)
* Improve the 'clock-names' property in the PHY dt binding.
v1->v2:
* Convert mixel,mipi-dsi-phy plain text dt binding to json-schema. (Guido)
* Print invalid PHY mode in dmesg from the Mixel PHY driver. (Guido)
* Add Guido's R-b tag on the pa
: Robert Chiras
Cc: Martin Kepplinger
Cc: Andrzej Hajda
Cc: Neil Armstrong
Cc: Laurent Pinchart
Cc: Jonas Karlman
Cc: Jernej Skrabec
Cc: David Airlie
Cc: Daniel Vetter
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
v5->v6:
* Rebase the series upon v5.17-rc1.
* Set PHY mode in ->mo
I
Cc: Vinod Koul
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
v5->v6:
* Rebase upon v5.17-rc1.
v4->v5:
* Align kernel-doc style to include/linux/phy/phy.h. (Vinod)
* Trivial tweaks.
* Drop Robert's R-b tag.
v3->v4:
* Add Robert's R-b tag.
v2->v3:
* No change
ido Günther
Cc: Kishon Vijay Abraham I
Cc: Vinod Koul
Cc: Rob Herring
Cc: NXP Linux Team
Reviewed-by: Rob Herring
Reviewed-by: Guido Günther
Signed-off-by: Liu Ying
---
v5->v6:
* No change.
v4->v5:
* No change.
v3->v4:
* Add Rob's and Guido's R-b tags.
v2->v3:
* I
Add support for Mixel MIPI DPHY + LVDS PHY combo IP
as found on Freescale i.MX8qxp SoC.
Cc: Guido Günther
Cc: Kishon Vijay Abraham I
Cc: Vinod Koul
Cc: Rob Herring
Cc: NXP Linux Team
Reviewed-by: Rob Herring
Reviewed-by: Guido Günther
Signed-off-by: Liu Ying
---
v5->v6:
* No change.
-by: Guido Günther
Signed-off-by: Liu Ying
---
v5->v6:
* No change.
v4->v5:
* No change.
v3->v4:
* Add Guido's R-b tag.
v2->v3:
* Improve readability of mixel_dphy_set_mode(). (Guido)
v1->v2:
* Print invalid PHY mode in dmesg. (Guido)
.../phy/freescale/phy-fsl-im
s.
* Require bypass0 and bypass1 clocks for both i.MX8qxp and i.MX8qm in DPU's
dt binding documentation.
* Use new dt binding way to add clocks in the dt binding examples.
* Address several comments from Laurentiu on the DPU DRM patch.
Liu Ying (6):
dt-bindings: display: imx: Add i.MX8qxp/qm
This patch adds bindings for i.MX8qxp/qm Display Processing Unit.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v9->v10:
* No change.
v8->v9:
* No change.
v7->v8:
* No change.
v6->v7:
* Add Rob's R-b tag back.
v5->v6:
* Use graph schema. So, drop Rob's R-
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Gasket.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v9->v10:
* No change.
v8->v9:
* No change.
v7->v8:
* No change.
v6->v7:
* No change.
v5->v6:
* No change.
v4->v5:
* No change.
v3->v4:
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Channel.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v9->v10:
* Add Rob's R-b tag.
v8->v9:
* Reference 'interrupts-extended' schema instead of 'interrupts' to require
an additional inter
Artificially use 'plane' and 'old_plane_state' to avoid 'not used' warning.
The precedent has already been set by other macros in the same file.
Acked-by: Daniel Vetter
Signed-off-by: Liu Ying
---
v9->v10:
* No change.
v8->v9:
* No change.
v7->v8:
* N
Add myself as the maintainer of the i.MX8qxp DPU DRM driver.
Acked-by: Laurentiu Palcu
Signed-off-by: Liu Ying
---
v9->v10:
* Add Laurentiu's A-b tag.
v8->v9:
* No change.
v7->v8:
* No change.
v6->v7:
* No change.
v5->v6:
* No change.
v4->v5:
* No change.
v3-&g
Hi Vinod,
On Wed, 2022-04-13 at 11:41 +0530, Vinod Koul wrote:
> On 02-04-22, 13:24, Liu Ying wrote:
> > This patch allows LVDS PHYs to be configured through
> > the generic functions and through a custom structure
> > added to the generic union.
> >
> > The p
Hi Vinod,
On Wed, 2022-04-13 at 11:51 +0530, Vinod Koul wrote:
> On 02-04-22, 13:24, Liu Ying wrote:
> > i.MX8qxp SoC embeds a Mixel MIPI DPHY + LVDS PHY combo which
> > supports
> > either a MIPI DSI display or a LVDS display. The PHY mode is
> > controlled
> &g
On Wed, 2022-04-13 at 16:19 +0530, Vinod Koul wrote:
> On 13-04-22, 18:04, Liu Ying wrote:
> > Hi Vinod,
> >
> > On Wed, 2022-04-13 at 11:41 +0530, Vinod Koul wrote:
> > > On 02-04-22, 13:24, Liu Ying wrote:
> > > > This patch allows LVDS PHYs to
On Thu, 2022-04-14 at 11:07 +0530, Vinod Koul wrote:
> On 13-04-22, 20:39, Liu Ying wrote:
> > On Wed, 2022-04-13 at 16:19 +0530, Vinod Koul wrote:
> > > On 13-04-22, 18:04, Liu Ying wrote:
> > > > Hi Vinod,
> > > >
> > > > On Wed, 2022-04-1
uido)
* Print invalid PHY mode in dmesg from the Mixel PHY driver. (Guido)
* Add Guido's R-b tag on the patch for the nwl-dsi drm bridge driver.
Liu Ying (5):
drm/bridge: nwl-dsi: Set PHY mode in nwl_dsi_mode_set()
phy: Add LVDS configuration options
dt-bindings: phy: Convert mixel,mipi
: Robert Chiras
Cc: Martin Kepplinger
Cc: Andrzej Hajda
Cc: Neil Armstrong
Cc: Laurent Pinchart
Cc: Jonas Karlman
Cc: Jernej Skrabec
Cc: David Airlie
Cc: Daniel Vetter
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
v6->v7:
* No change.
v5->v6:
* Rebase the series upon v5.17-rc1.
* Set PH
I
Cc: Vinod Koul
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
v6->v7:
* Update the year of copyright.
* Better variable explaination for bits_per_lane_and_dclk_cycle.
v5->v6:
* Rebase upon v5.17-rc1.
v4->v5:
* Align kernel-doc style to include/linux/phy/phy.h. (Vinod)
* Trivi
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