I
Cc: Vinod Koul
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
v1->v2:
* No change.
include/linux/phy/phy-lvds.h | 48
include/linux/phy/phy.h | 4
2 files changed, 52 insertions(+)
create mode 100644 include/linux/phy/phy-lvds.h
d
ido Günther
Cc: Kishon Vijay Abraham I
Cc: Vinod Koul
Cc: Rob Herring
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
v1->v2:
* Newly introduced in v2. (Guido)
.../devicetree/bindings/phy/mixel,mipi-dsi-phy.txt | 29 -
.../bindings/phy/mixel,mipi-dsi-phy.yaml | 73
Chiras
Cc: Martin Kepplinger
Cc: Andrzej Hajda
Cc: Neil Armstrong
Cc: Laurent Pinchart
Cc: Jonas Karlman
Cc: Jernej Skrabec
Cc: David Airlie
Cc: Daniel Vetter
Cc: NXP Linux Team
Reviewed-by: Guido Günther
Signed-off-by: Liu Ying
---
v1->v2:
* Add Guido's R-b tag.
drivers
off-by: Liu Ying
---
Guido, I also print invalid PHY mode from mixel_dphy_configure().
v1->v2:
* Print invalid PHY mode in dmesg. (Guido)
drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c | 270 -
1 file changed, 259 insertions(+), 11 deletions(-)
diff --git a/drive
Add support for Mixel MIPI DPHY + LVDS PHY combo IP
as found on Freescale i.MX8qxp SoC.
Cc: Guido Günther
Cc: Kishon Vijay Abraham I
Cc: Vinod Koul
Cc: Rob Herring
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
v1->v2:
* Add the binding for i.MX8qxp Mixel combo PHY based on the conver
Hi Guido,
On Tue, 2020-12-08 at 10:02 +0100, Guido Günther wrote:
> Hi Liu,
> On Fri, Dec 04, 2020 at 03:33:40PM +0800, Liu Ying wrote:
> > Hi,
> >
> > This series adds i.MX8qxp LVDS PHY mode support for the Mixel PHY in the
> > Freescale i.MX8qxp SoC.
>
> Th
and then add the binding support for the
i.MX8qxp Mixel combo PHY in it.
Liu Ying
> Cheers,
> -- Guido
>
> On Fri, Dec 04, 2020 at 03:33:43PM +0800, Liu Ying wrote:
> > Add support for Mixel MIPI DPHY + LVDS PHY combo IP
> > as found on Freescale i.MX8qxp SoC.
> &g
On Tue, 2020-12-08 at 10:24 +0100, Guido Günther wrote:
> Hi Liu,
> some minor comments inline:
>
> On Fri, Dec 04, 2020 at 03:33:44PM +0800, Liu Ying wrote:
> > i.MX8qxp SoC embeds a Mixel MIPI DPHY + LVDS PHY combo which supports
> > either a MIPI DSI display or a LVDS d
ver. (Guido)
* Add Guido's R-b tag on the patch for the nwl-dsi drm bridge driver.
Liu Ying (5):
drm/bridge: nwl-dsi: Set PHY mode in nwl_dsi_enable()
phy: Add LVDS configuration options
dt-bindings: phy: Convert mixel,mipi-dsi-phy to json-schema
dt-bindings: phy: mixel: mipi-dsi-phy: Add Mix
Hi Laurent,
On Tue, 2020-12-08 at 14:38 +0200, Laurent Pinchart wrote:
> Hi Liu,
>
> Thank you for the patch.
>
> On Fri, Dec 04, 2020 at 03:33:42PM +0800, Liu Ying wrote:
> > This patch allows LVDS PHYs to be configured through
> > the generic functions and through a
Artifically use 'plane' and 'old_plane_state' to avoid 'not used' warning.
The precedent has already been set by other macros in the same file.
Acked-by: Daniel Vetter
Signed-off-by: Liu Ying
---
v3->v4:
* Add Daniel's A-b tag.
v2->v3:
* Add a
Add myself as the maintainer of the i.MX8qxp DPU DRM driver.
Signed-off-by: Liu Ying
---
v3->v4:
* No change.
v2->v3:
* No change.
v1->v2:
* No change.
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 970d9ce..dee4586 100
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Channel.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
Note that this depends on the 'two cell binding' clock patch set which has
already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h
onversions for the platforms.
* Fix dt binding yamllint warnings.
* Require bypass0 and bypass1 clocks for both i.MX8qxp and i.MX8qm in DPU's
dt binding documentation.
* Use new dt binding way to add clocks in the dt binding examples.
* Address several comments from Laurentiu on the DPU DRM p
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Gasket.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
Note that this depends on the 'two cell binding' clock patch set which has
already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h
This patch adds bindings for i.MX8qxp/qm Display Processing Unit.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
Note that this depends on the 'two cell binding' clock patch set which has
already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h
won'
Hi Guido,
On Thu, 2020-12-10 at 08:14 +0100, Guido Günther wrote:
> Hi,
> On Tue, Dec 08, 2020 at 06:03:05PM +0800, Liu Ying wrote:
> > On Tue, 2020-12-08 at 10:24 +0100, Guido Günther wrote:
> > > Hi Liu,
> > > some minor comments inline:
> > >
> &g
HY dt binding.
v1->v2:
* Convert mixel,mipi-dsi-phy plain text dt binding to json-schema. (Guido)
* Print invalid PHY mode in dmesg from the Mixel PHY driver. (Guido)
* Add Guido's R-b tag on the patch for the nwl-dsi drm bridge driver.
Liu Ying (5):
drm/bridge: nwl-dsi: Set PHY mode in n
Chiras
Cc: Martin Kepplinger
Cc: Andrzej Hajda
Cc: Neil Armstrong
Cc: Laurent Pinchart
Cc: Jonas Karlman
Cc: Jernej Skrabec
Cc: David Airlie
Cc: Daniel Vetter
Cc: NXP Linux Team
Reviewed-by: Guido Günther
Signed-off-by: Liu Ying
---
v2->v3:
* No change.
v1->v2:
* Add Guido
off-by: Liu Ying
---
Guido, I also print invalid PHY mode from mixel_dphy_configure().
v2->v3:
* Improve readability of mixel_dphy_set_mode(). (Guido)
v1->v2:
* Print invalid PHY mode in dmesg. (Guido)
drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c | 269 -
1 fil
I
Cc: Vinod Koul
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
v2->v3:
* No change.
v1->v2:
* No change.
include/linux/phy/phy-lvds.h | 48
include/linux/phy/phy.h | 4
2 files changed, 52 insertions(+)
create mode 100644 i
ido Günther
Cc: Kishon Vijay Abraham I
Cc: Vinod Koul
Cc: Rob Herring
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
v2->v3:
* Improve the 'clock-names' property by dropping 'items:'.
v1->v2:
* Newly introduced in v2. (Guido)
.../devicetree/bindings/phy/mix
Add support for Mixel MIPI DPHY + LVDS PHY combo IP
as found on Freescale i.MX8qxp SoC.
Cc: Guido Günther
Cc: Kishon Vijay Abraham I
Cc: Vinod Koul
Cc: Rob Herring
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
v2->v3:
* No change.
v1->v2:
* Add the binding for i.MX8qxp Mixel com
() if it's child nodes 'port@0'
and 'port@1' contain 'dual-lvds-even-pixels' and 'dual-lvds-odd-pixels'
properties respectively.
Cc: Thierry Reding
Cc: Sam Ravnborg
Cc: David Airlie
Cc: Daniel Vetter
Cc: Rob Herring
Signed-off-by: Liu Ying
---
optional 'ports' property is
allowed
Suggested-by: Sam Ravnborg
Cc: Thierry Reding
Cc: Sam Ravnborg
Cc: David Airlie
Cc: Daniel Vetter
Cc: Rob Herring
Cc: Lucas Stach
Cc: Sebastian Reichel
Signed-off-by: Liu Ying
---
.../panel/panel-simple-lvds-dual-ports.yaml|
Hi Sam,
On Wed, 2020-11-04 at 11:47 +0100, Sam Ravnborg wrote:
> Hi Liu Ying
>
> On Wed, Nov 04, 2020 at 04:03:37PM +0800, Liu Ying wrote:
> > Some simple panels have dual LVDS interfaces which receive even and
> > odd
> > pixels respectively, like 'nl
optional 'ports' property is
allowed
Suggested-by: Sam Ravnborg
Cc: Thierry Reding
Cc: Sam Ravnborg
Cc: David Airlie
Cc: Daniel Vetter
Cc: Rob Herring
Cc: Lucas Stach
Cc: Sebastian Reichel
Signed-off-by: Liu Ying
---
v1->v2:
* Correct pixel order in example LVDS panel
On Tue, 2020-11-10 at 06:53 +0100, Sam Ravnborg wrote:
> Hi Liu Ying,
> On Tue, Nov 10, 2020 at 10:37:27AM +0800, Liu Ying wrote:
> > Hi Sam,
> >
> > On Wed, 2020-11-04 at 11:47 +0100, Sam Ravnborg wrote:
> > > Hi Liu Ying
> > >
> > > On We
On Wed, 2020-11-11 at 16:57 -0600, Rob Herring wrote:
> On Tue, Nov 10, 2020 at 03:36:37PM +0800, Liu Ying wrote:
> > To complement panel-simple.yaml, create panel-simple-lvds-dual-
> > ports.yaml.
> > panel-simple-lvds-dual-ports.yaml is for all simple LVDS panels
> > t
On Wed, 2020-11-11 at 16:55 -0600, Rob Herring wrote:
> On Tue, Nov 10, 2020 at 03:36:37PM +0800, Liu Ying wrote:
> > To complement panel-simple.yaml, create panel-simple-lvds-dual-
> > ports.yaml.
> > panel-simple-lvds-dual-ports.yaml is for all simple LVDS panels
> > t
ake it possible for drivers to get pixel order via
drm_of_lvds_get_dual_link_pixel_order(), as the optional 'ports' property is
allowed
Suggested-by: Sam Ravnborg
Cc: Thierry Reding
Cc: Sam Ravnborg
Cc: David Airlie
Cc: Daniel Vetter
Cc: Rob Herring
Cc: Lucas Stach
Cc: Sebastian Reichel
Signed-off-by
ake it possible for drivers to get pixel order via
drm_of_lvds_get_dual_link_pixel_order(), as the optional 'ports' property is
allowed
Suggested-by: Sam Ravnborg
Cc: Thierry Reding
Cc: Sam Ravnborg
Cc: David Airlie
Cc: Daniel Vetter
Cc: Rob Herring
Cc: Lucas Stach
Cc: Sebastian Reichel
Signed-off-by
On Mon, 2020-11-16 at 13:23 -0600, Rob Herring wrote:
> On Thu, Nov 12, 2020 at 02:17:11PM +0800, Liu Ying wrote:
> > To complement panel-simple.yaml, create panel-simple-lvds-dual-
> > ports.yaml.
> > panel-simple-lvds-dual-ports.yaml is for all simple LVDS panels
> &
DPU DRM support.
Patch 6 updates MAINTAINERS.
Patch 7 & 8 add DPU and prefetch engines support in the device tree of
i.MX8qxp MEK platform.
Welcome comments, thanks.
Liu Ying (8):
dt-bindings: display: imx: Add i.MX8qxp/qm DPU binding
dt-bindings: display: imx: Add i.MX8qxp/qm PRG binding
d
This patch adds bindings for i.MX8qxp/qm Display Processing Unit.
Signed-off-by: Liu Ying
---
.../bindings/display/imx/fsl,imx8qxp-dpu.yaml | 358 +
1 file changed, 358 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dpu.yaml
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Gasket.
Signed-off-by: Liu Ying
---
.../bindings/display/imx/fsl,imx8qxp-prg.yaml | 60 ++
1 file changed, 60 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Channel.
Signed-off-by: Liu Ying
---
.../bindings/display/imx/fsl,imx8qxp-dprc.yaml | 87 ++
1 file changed, 87 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp
Artifically use 'plane' and 'old_plane_state' to avoid 'not used' warning.
The precedent has already been set by other macros in the same file.
Signed-off-by: Liu Ying
---
include/drm/drm_atomic.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --gi
Add myself as the maintainer of the i.MX8qxp DPU DRM driver.
Signed-off-by: Liu Ying
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 970d9ce..dee4586 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5834,6 +5834,15 @@ F
y way instead of
the new "two cells" binding way. So, prone to update as soon as the SoC
device tree is converted to follow the new way.
Signed-off-by: Liu Ying
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 313 +
1 file changed, 313 insertions(+)
di
This patch enables DPU and it's prefetch engines for
the i.MX8qxp MEK platform.
Signed-off-by: Liu Ying
---
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 64 +++
1 file changed, 64 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
b/arch/
Hi Sebastian,
On Fri, 2020-11-20 at 00:20 +0100, Sebastian Reichel wrote:
> Hi,
>
> On Tue, Nov 17, 2020 at 09:47:25AM +0800, Liu Ying wrote:
> > To complement panel-simple.yaml, create panel-simple-lvds-dual-ports.yaml.
> > panel-simple-lvds-dual-ports.yaml is for all si
Hi Laurentiu,
On Thu, 2020-11-19 at 19:30 +0200, Laurentiu Palcu wrote:
> Hi Liu Ying,
>
> On Thu, Nov 19, 2020 at 05:22:17PM +0800, Liu Ying wrote:
> > Hi,
> >
> >
> > This patch set introduces i.MX8qxp Display Processing Unit(DPU) DRM support.
>
&g
On Thu, 2020-11-19 at 09:46 -0600, Rob Herring wrote:
> On Thu, 19 Nov 2020 17:22:18 +0800, Liu Ying wrote:
> > This patch adds bindings for i.MX8qxp/qm Display Processing Unit.
> >
> > Signed-off-by: Liu Ying
> > ---
> > .../bindings/display/im
Hi Laurentiu,
On Fri, 2020-11-20 at 16:38 +0200, Laurentiu Palcu wrote:
> Hi Liu Ying,
>
> I gave this a first look but, since this is a huge piece of code and I'm not
> very familiar with DPU, I'll probably give it another pass next week.
>
> Anyway, some comments/q
On Thu, 2022-03-17 at 18:58 +0100, José Expósito wrote:
> The function "drm_of_find_panel_or_bridge" has been deprecated in
> favor of "devm_drm_of_get_bridge".
>
> Switch to the new function and reduce boilerplate.
>
> Signed-off-by: José Expósito
Hi Kishon, Vinod,
On Thu, 2021-06-10 at 17:38 +0800, Liu Ying wrote:
> Hi Kishon, Vinod,
>
> Any follow-up comments/suggestions based on my previous reply?
> Or, perhaps, just keep the patch as-is to support the generic lvds
> phy
> configuration structure?
Ping... Any
Hi Philipp,
On Fri, 2022-01-28 at 17:19 +0800, Liu Ying wrote:
> In dw_hdmi_imx_probe(), if error happens after dw_hdmi_probe() returns
> successfully, dw_hdmi_remove() should be called where necessary as
> bailout.
>
> Fixes: c805ec7eb210 ("drm/imx: dw_hdmi-imx: move initi
sl,imx8mp-lcdif
Even if LCDIFv3 is covered by this dt-binding(which is obviously not
the case), 'fsl,imx8mp-lcdif' should be after 'fsl,imx6x-lcdif' as an
enum, otherwise LCDIFv3 is compatible to LCDIF.
Regards,
Liu Ying
>- fsl,imx8mq-lcdif
>- const: fsl,imx6sx-lcdif
>
On Mon, 2022-02-28 at 07:57 +0100, Marek Vasut wrote:
> On 2/28/22 07:37, Liu Ying wrote:
> > Hi Marek,
>
> Hi,
>
> > On Mon, 2022-02-28 at 01:45 +0100, Marek Vasut wrote:
> > > Add compatible string for i.MX8MP LCDIF variant. This is called LCDIFv3
> >
_state->crtc != new_state->crtc)
> + return true;
I think 'new_state->enable' should be changed to 'new_state->active',
because 'active' is the one to enable/disable the CRTC while 'enable'
reflects whether a mode blob is set to CRTC st
On Mon, 2022-02-28 at 16:34 +0100, Marek Vasut wrote:
> On 2/28/22 09:18, Liu Ying wrote:
>
> Hi,
Hi,
>
> > > > On Mon, 2022-02-28 at 01:45 +0100, Marek Vasut wrote:
> > > > > Add compatible string for i.MX8MP LCDIF variant. This is called
> &
tive" to
> reflect the intended hardware state, but it also is a little
> over-specific. We want to make a transition through "disabled" any
> time we're exiting PSR at the same time as a CRTC switch.
Cool. I don't see any particular issue regarding the drop.
panel_bridge);
Now that panel_bridge is resource managed, why not remove
drm_of_panel_bridge_remove() and its caller nwl_dsi_bridge_detach()?
Regards,
Liu Ying
>
> - if (panel) {
> - panel_bridge = drm_panel_bridge_add(panel);
> - if (IS_ERR(panel_bridge))
> - return PTR_ERR(panel_bridge);
> - }
> dsi->panel_bridge = panel_bridge;
>
> if (!dsi->panel_bridge)
% common code for the
> > > > LCDIF, why not either leave the driver as one or split the common code
> > > > into its own driver like lcdif-common and then have smaller drivers
> > > > that handle their specific variations.
> > >
> > > I don&#
On Wed, 2022-03-02 at 12:57 +0100, Lucas Stach wrote:
> Am Mittwoch, dem 02.03.2022 um 17:41 +0800 schrieb Liu Ying:
> > On Wed, 2022-03-02 at 10:23 +0100, Lucas Stach wrote:
> > > Am Mittwoch, dem 02.03.2022 um 03:54 +0100 schrieb Marek Vasut:
> > > > On 3
On Thu, 2022-03-03 at 09:19 +0100, Lucas Stach wrote:
> Am Donnerstag, dem 03.03.2022 um 10:54 +0800 schrieb Liu Ying:
> > On Wed, 2022-03-02 at 12:57 +0100, Lucas Stach wrote:
> > > Am Mittwoch, dem 02.03.2022 um 17:41 +0800 schrieb Liu Ying:
> > > > On Wed, 2022-03-
On Mon, 2022-02-07 at 13:46 +0800, Liu Ying wrote:
> If the CRTC state is already inactive, it doesn't make sense to trigger
> the entry timer for self refresh work to make the display enter self
> refresh mode, because the disabled CRTC hints that either the entire
> display pip
: Jonas Karlman
Cc: Jernej Skrabec
Cc: David Airlie
Cc: Daniel Vetter
Cc: Kishon Vijay Abraham I
Cc: Vinod Koul
Cc: Kevin Hilman
Cc: Jerome Brunet
Cc: Martin Blumenstingl
Cc: Heiko Stuebner
Cc: Maxime Ripard
Cc: Guido Günther
Tested-by: Liu Ying # RM67191 DSI panel on i.MX8mq EVK
Signe
Hi Andrzej,
Thanks for your review.
On Tue, 2022-01-18 at 10:24 +0100, Andrzej Hajda wrote:
> Hi,
>
> On 18.01.2022 03:59, Liu Ying wrote:
> > The D-PHY specification (v1.2) explicitly mentions that the T-CLK-PRE
> > parameter's unit is Unit Interval(UI) and the
ernej Skrabec
Cc: David Airlie
Cc: Daniel Vetter
Cc: Kishon Vijay Abraham I
Cc: Vinod Koul
Cc: Kevin Hilman
Cc: Jerome Brunet
Cc: Martin Blumenstingl
Cc: Heiko Stuebner
Cc: Maxime Ripard
Cc: Guido Günther
Tested-by: Liu Ying # RM67191 DSI panel on i.MX8mq EVK
Signed-off-by: Liu Yi
Hi Neil,
On Wed, 2022-01-19 at 10:11 +0100, Neil Armstrong wrote:
> On 19/01/2022 09:40, Neil Armstrong wrote:
> > Hi,
> >
> > On 19/01/2022 03:37, Liu Ying wrote:
> > > The D-PHY specification (v1.2) explicitly mentions that the T-CLK-PRE
> > > parame
Hi Heiko, Wyon,
On Wed, 2022-01-19 at 10:37 +0800, Liu Ying wrote:
> The D-PHY specification (v1.2) explicitly mentions that the T-CLK-PRE
> parameter's unit is Unit Interval(UI) and the minimum value is 8. Also,
> kernel doc of the 'clk_pre' member of struct phy_
Hi Laurent,
On Mon, 2022-01-24 at 00:15 +0200, Laurent Pinchart wrote:
> Hi Liu,
>
> Thank you for the patch.
Thank you for your review.
>
> On Wed, Jan 19, 2022 at 10:37:14AM +0800, Liu Ying wrote:
> > The D-PHY specification (v1.2) explicitly mentions that the T-CLK-PRE
ernej Skrabec
Cc: David Airlie
Cc: Daniel Vetter
Cc: Kishon Vijay Abraham I
Cc: Vinod Koul
Cc: Kevin Hilman
Cc: Jerome Brunet
Cc: Martin Blumenstingl
Cc: Heiko Stuebner
Cc: Maxime Ripard
Cc: Guido Günther
Cc: Wyon Bi
Tested-by: Liu Ying # RM67191 DSI panel on i.MX8mq EVK
Reviewe
ns")
Cc: Andrzej Hajda
Cc: Neil Armstrong
Cc: Robert Foss
Cc: Laurent Pinchart
Cc: Jonas Karlman
Cc: Jernej Skrabec
Cc: David Airlie
Cc: Daniel Vetter
Cc: Kishon Vijay Abraham I
Cc: Vinod Koul
Cc: Kevin Hilman
Cc: Jerome Brunet
Cc: Martin Blumenstingl
Cc: Heiko Stuebner
Cc: Maxime Ri
wn Guo
Cc: Sascha Hauer
Cc: Pengutronix Kernel Team
Cc: Fabio Estevam
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
drivers/gpu/drm/imx/dw_hdmi-imx.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/imx/dw_hdmi-imx.c
b/drivers/gpu/drm/imx/dw_hdmi-i
Hi,
On Thu, 2020-12-17 at 12:50 -0600, Rob Herring wrote:
> On Thu, 17 Dec 2020 17:59:23 +0800, Liu Ying wrote:
> > This patch adds bindings for i.MX8qm/qxp pixel combiner.
> >
> > Signed-off-by: Liu Ying
> > ---
> > .../display/bridge/fsl,
d drm bridge drivers and dt-bindings support for the
bridges.
Patch 14/14 updates MAINTAINERS.
I've tested this series with a koe,tx26d202vm0bwa dual link LVDS panel and
a LVDS to HDMI bridge(with a downstream drm bridge driver).
Welcome comments, thanks.
Liu Ying (14):
phy: Add LVDS con
bus(12-bit per component) to a pixel link.
Signed-off-by: Liu Ying
---
include/uapi/linux/media-bus-format.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/include/uapi/linux/media-bus-format.h
b/include/uapi/linux/media-bus-format.h
index 5d905ad..b218282 100644
--- a
.
Signed-off-by: Liu Ying
---
drivers/gpu/drm/bridge/imx/Kconfig | 10 +
drivers/gpu/drm/bridge/imx/Makefile | 1 +
drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c | 762 +++
3 files changed, 773 insertions(+)
create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp
This patch adds a helper to support LDB drm bridge drivers for
i.MX SoCs. Helper functions exported from this driver should
implement common logics for all LDB modules embedded in i.MX SoCs.
Signed-off-by: Liu Ying
---
drivers/gpu/drm/bridge/imx/Kconfig | 8 +
drivers/gpu/drm/bridge
This patch adds bindings for i.MX8qm/qxp LVDS display bridge(LDB).
Signed-off-by: Liu Ying
---
.../bindings/display/bridge/fsl,imx8qxp-ldb.yaml | 185 +
1 file changed, 185 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp
I
Cc: Vinod Koul
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
include/linux/phy/phy-lvds.h | 48
include/linux/phy/phy.h | 4
2 files changed, 52 insertions(+)
create mode 100644 include/linux/phy/phy-lvds.h
diff --git a/include/linux
This patch adds bindings for i.MX8qxp/qm Display Processing Unit.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
Note that this depends on the 'two cell binding' clock patch set which has
already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h
won'
This patch adds bindings for i.MX8qm/qxp display pixel link.
Signed-off-by: Liu Ying
---
.../display/bridge/fsl,imx8qxp-pixel-link.yaml | 128 +
1 file changed, 128 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel
or a 36-bit output bus(12-bit per component) to a pixel link.
Signed-off-by: Liu Ying
---
.../userspace-api/media/v4l/subdev-formats.rst | 156 +
1 file changed, 156 insertions(+)
diff --git a/Documentation/userspace-api/media/v4l/subdev-formats.rst
b/Documentation
This patch adds bindings for i.MX8qxp pixel link to DPI(PXL2DPI).
Signed-off-by: Liu Ying
---
.../display/bridge/fsl,imx8qxp-pxl2dpi.yaml| 134 +
1 file changed, 134 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp
screens, or virtual screens. The pixel
combiner is also responsible for generating some of the control signals
for the pixel link output channel. For now, the driver only supports
the bypass mode.
Signed-off-by: Liu Ying
---
drivers/gpu/drm/bridge/Kconfig | 2 +
drivers/gpu
This patch adds bindings for i.MX8qm/qxp pixel combiner.
Signed-off-by: Liu Ying
---
.../display/bridge/fsl,imx8qxp-pixel-combiner.yaml | 160 +
1 file changed, 160 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel
codings between those modules. The PXL2DPI is purely
combinatorial.
Signed-off-by: Liu Ying
---
drivers/gpu/drm/bridge/imx/Kconfig | 8 +
drivers/gpu/drm/bridge/imx/Makefile | 1 +
drivers/gpu/drm/bridge/imx/imx8qxp-pxl2dpi.c | 494 +++
3 files
Artifically use 'plane' and 'old_plane_state' to avoid 'not used' warning.
The precedent has already been set by other macros in the same file.
Acked-by: Daniel Vetter
Signed-off-by: Liu Ying
---
v4->v5:
* No change.
v3->v4:
* Add Daniel's A-b tag.
v2
Add myself as the maintainer of DRM bridge drivers for i.MX SoCs.
Signed-off-by: Liu Ying
---
MAINTAINERS | 10 ++
1 file changed, 10 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 7b073c4..4b4e40e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5846,6 +5846,16 @@ F
Require bypass0 and bypass1 clocks for both i.MX8qxp and i.MX8qm in DPU's
dt binding documentation.
* Use new dt binding way to add clocks in the dt binding examples.
* Address several comments from Laurentiu on the DPU DRM patch.
Liu Ying (6):
dt-bindings: display: imx: Add i.MX8qxp/qm D
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Gasket.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
Note that this depends on the 'two cell binding' clock patch set which has
already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h
dual mode, the two channels output identical data.
In split mode, channel0 outputs odd pixels and channel1 outputs even
pixels. This patch supports the LDB single mode and split mode.
Signed-off-by: Liu Ying
---
drivers/gpu/drm/bridge/imx/Kconfig | 10 +
drivers/gpu/drm/bridge/imx/Makefile
control interface.
Signed-off-by: Liu Ying
---
drivers/gpu/drm/bridge/imx/Kconfig | 8 +
drivers/gpu/drm/bridge/imx/Makefile | 1 +
drivers/gpu/drm/bridge/imx/imx8qxp-pixel-link.c | 411
3 files changed, 420 insertions(+)
create mode 100644
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Channel.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
Note that this depends on the 'two cell binding' clock patch set which has
already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h
Add myself as the maintainer of the i.MX8qxp DPU DRM driver.
Signed-off-by: Liu Ying
---
v4->v5:
* No change.
v3->v4:
* No change.
v2->v3:
* No change.
v1->v2:
* No change.
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
i
Hi,
On Fri, 2020-12-18 at 16:42 -0600, Rob Herring wrote:
> On Thu, Dec 17, 2020 at 7:48 PM Liu Ying wrote:
> >
> > Hi,
> >
> > On Thu, 2020-12-17 at 12:50 -0600, Rob Herring wrote:
> > > On Thu, 17 Dec 2020 17:59:23 +0800, Liu Ying wrote:
> > > >
On Mon, 2020-12-21 at 15:33 -0700, Rob Herring wrote:
> On Thu, Dec 17, 2020 at 05:59:30PM +0800, Liu Ying wrote:
> > This patch adds bindings for i.MX8qm/qxp LVDS display bridge(LDB).
> >
> > Signed-off-by: Liu Ying
> > ---
> > .../bindings/display/br
Hi Laurent,
On Tue, 2020-12-22 at 09:49 +0200, Laurent Pinchart wrote:
> Hi Liu,
>
> On Tue, Dec 22, 2020 at 09:36:37AM +0200, Laurent Pinchart wrote:
> > On Thu, Dec 17, 2020 at 05:59:30PM +0800, Liu Ying wrote:
> > > This patch adds bindings for i.MX8qm/qxp
On Mon, 2020-12-21 at 15:31 -0700, Rob Herring wrote:
> On Thu, Dec 17, 2020 at 05:59:25PM +0800, Liu Ying wrote:
> > This patch adds bindings for i.MX8qm/qxp display pixel link.
> >
> > Signed-off-by: Liu Ying
> > ---
> > .../display/bridge/fsl,
On Mon, 2020-12-21 at 15:07 -0700, Rob Herring wrote:
> On Thu, Dec 17, 2020 at 05:59:23PM +0800, Liu Ying wrote:
> > This patch adds bindings for i.MX8qm/qxp pixel combiner.
> >
> > Signed-off-by: Liu Ying
> > ---
> > .../display/bridge/fsl,
Hi Laurent,
On Tue, 2020-12-22 at 09:36 +0200, Laurent Pinchart wrote:
> Hi Liu,
>
> Thank you for the patch.
>
> On Thu, Dec 17, 2020 at 05:59:30PM +0800, Liu Ying wrote:
> > This patch adds bindings for i.MX8qm/qxp LVDS display bridge(LDB).
> >
On Mon, 2020-12-21 at 10:02 -0700, Rob Herring wrote:
> On Fri, Dec 18, 2020 at 9:15 PM Liu Ying wrote:
> > Hi,
> >
> > On Fri, 2020-12-18 at 16:42 -0600, Rob Herring wrote:
> > > On Thu, Dec 17, 2020 at 7:48 PM Liu Ying wrote:
> > > > Hi,
> > >
Hi,
On Tue, 2020-12-22 at 09:09 +0200, Laurent Pinchart wrote:
> Hi Liu,
>
> Thank you for the patch.
>
> On Thu, Dec 17, 2020 at 05:59:25PM +0800, Liu Ying wrote:
> > This patch adds bindings for i.MX8qm/qxp display pixel link.
> >
> > Signed-off-by: Liu Ying
On Thu, 2020-12-17 at 17:59 +0800, Liu Ying wrote:
> This patch adds a drm bridge driver for i.MX8qxp LVDS display bridge(LDB).
> The LDB has two channels. Each of them supports up to 24bpp parallel
> input color format and can map the input to VESA or JEIDA standards.
> The two cha
On Mon, 2020-12-21 at 15:29 -0700, Rob Herring wrote:
> On Thu, Dec 17, 2020 at 05:59:26PM +0800, Liu Ying wrote:
> > This patch adds a drm bridge driver for i.MX8qm/qxp display pixel link.
> > The pixel link forms a standard asynchronous linkage between
> > pixel sources(
e->enable.
Fixes: 1452c25b0e60 ("drm: Add helpers to kick off self refresh mode in
drivers")
Cc: Sean Paul
Cc: Rob Clark
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: Thomas Zimmermann
Cc: David Airlie
Cc: Daniel Vetter
Signed-off-by: Liu Ying
---
drivers/gpu/drm/drm_ato
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